src/gallium/winsys/radeon/drm/radeon_winsys.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #ifndef RADEON_WINSYS_H
  25 #define RADEON_WINSYS_H
  26
  27 /* The public winsys interface header for the radeon driver. */
  28
  29 /* R300 features in DRM.
  30  *
  31  * 2.6.0:
  32  * - Hyper-Z
  33  * - GB_Z_PEQ_CONFIG on rv350->r4xx
  34  * - R500 FG_ALPHA_VALUE
  35  *
  36  * 2.8.0:
  37  * - R500 US_FORMAT regs
  38  * - R500 ARGB2101010 colorbuffer
  39  * - CMask and AA regs
  40  * - R16F/RG16F
  41  */
  42
  43 #include "pipebuffer/pb_buffer.h"
  44 #include "libdrm/radeon_surface.h"
  45
  46 #define RADEON_MAX_CMDBUF_DWORDS (16 * 1024)
  47
  48 #define RADEON_FLUSH_ASYNC              (1 << 0)
  49 #define RADEON_FLUSH_KEEP_TILING_FLAGS  (1 << 1) /* needs DRM 2.12.0 */
  50 #define RADEON_FLUSH_COMPUTE            (1 << 2)
  51 #define RADEON_FLUSH_END_OF_FRAME       (1 << 3)
  52
  53 /* Tiling flags. */
  54 enum radeon_bo_layout {
  55     RADEON_LAYOUT_LINEAR = 0,
  56     RADEON_LAYOUT_TILED,
  57     RADEON_LAYOUT_SQUARETILED,
  58
  59     RADEON_LAYOUT_UNKNOWN
  60 };
  61
  62 enum radeon_bo_domain { /* bitfield */
  63     RADEON_DOMAIN_GTT  = 2,
  64     RADEON_DOMAIN_VRAM = 4
  65 };
  66
  67 enum radeon_bo_usage { /* bitfield */
  68     RADEON_USAGE_READ = 2,
  69     RADEON_USAGE_WRITE = 4,
  70     RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE
  71 };
  72
  73 enum radeon_family {
  74     CHIP_UNKNOWN = 0,
  75     CHIP_R300, /* R3xx-based cores. */
  76     CHIP_R350,
  77     CHIP_RV350,
  78     CHIP_RV370,
  79     CHIP_RV380,
  80     CHIP_RS400,
  81     CHIP_RC410,
  82     CHIP_RS480,
  83     CHIP_R420,     /* R4xx-based cores. */
  84     CHIP_R423,
  85     CHIP_R430,
  86     CHIP_R480,
  87     CHIP_R481,
  88     CHIP_RV410,
  89     CHIP_RS600,
  90     CHIP_RS690,
  91     CHIP_RS740,
  92     CHIP_RV515,    /* R5xx-based cores. */
  93     CHIP_R520,
  94     CHIP_RV530,
  95     CHIP_R580,
  96     CHIP_RV560,
  97     CHIP_RV570,
  98     CHIP_R600,
  99     CHIP_RV610,
 100     CHIP_RV630,
 101     CHIP_RV670,
 102     CHIP_RV620,
 103     CHIP_RV635,
 104     CHIP_RS780,
 105     CHIP_RS880,
 106     CHIP_RV770,
 107     CHIP_RV730,
 108     CHIP_RV710,
 109     CHIP_RV740,
 110     CHIP_CEDAR,
 111     CHIP_REDWOOD,
 112     CHIP_JUNIPER,
 113     CHIP_CYPRESS,
 114     CHIP_HEMLOCK,
 115     CHIP_PALM,
 116     CHIP_SUMO,
 117     CHIP_SUMO2,
 118     CHIP_BARTS,
 119     CHIP_TURKS,
 120     CHIP_CAICOS,
 121     CHIP_CAYMAN,
 122     CHIP_ARUBA,
 123     CHIP_TAHITI,
 124     CHIP_PITCAIRN,
 125     CHIP_VERDE,
 126     CHIP_LAST,
 127 };
 128
 129 enum chip_class {
 130     CLASS_UNKNOWN = 0,
 131     R300,
 132     R400,
 133     R500,
 134     R600,
 135     R700,
 136     EVERGREEN,
 137     CAYMAN,
 138     TAHITI,
 139 };
 140
 141 struct winsys_handle;
 142 struct radeon_winsys_cs_handle;
 143
 144 struct radeon_winsys_cs {
 145     unsigned cdw;  /* Number of used dwords. */
 146     uint32_t *buf; /* The command buffer. */
 147 };
 148
 149 struct radeon_info {
 150     uint32_t                    pci_id;
 151     enum radeon_family          family;
 152     enum chip_class             chip_class;
 153     uint32_t                    gart_size;
 154     uint32_t                    vram_size;
 155
 156     uint32_t                    drm_major; /* version */
 157     uint32_t                    drm_minor;
 158     uint32_t                    drm_patchlevel;
 159
 160     uint32_t                    r300_num_gb_pipes;
 161     uint32_t                    r300_num_z_pipes;
 162
 163     uint32_t                    r600_num_backends;
 164     uint32_t                    r600_clock_crystal_freq;
 165     uint32_t                    r600_tiling_config;
 166     uint32_t                    r600_num_tile_pipes;
 167     uint32_t                    r600_backend_map;
 168     uint32_t                    r600_va_start;
 169     uint32_t                    r600_ib_vm_max_size;
 170     uint32_t                    r600_max_pipes;
 171     boolean                     r600_backend_map_valid;
 172     boolean                     r600_virtual_address;
 173 };
 174
 175 enum radeon_feature_id {
 176     RADEON_FID_R300_HYPERZ_ACCESS,     /* ZMask + HiZ */
 177     RADEON_FID_R300_CMASK_ACCESS,
 178 };
 179
 180 struct radeon_winsys {
 181     /**
 182      * Reference counting
 183      */
 184     struct pipe_reference reference;
 185
 186     /**
 187      * Destroy this winsys.
 188      *
 189      * \param ws        The winsys this function is called from.
 190      */
 191     void (*destroy)(struct radeon_winsys *ws);
 192
 193     /**
 194      * Query an info structure from winsys.
 195      *
 196      * \param ws        The winsys this function is called from.
 197      * \param info      Return structure
 198      */
 199     void (*query_info)(struct radeon_winsys *ws,
 200                        struct radeon_info *info);
 201
 202     /**************************************************************************
 203      * Buffer management. Buffer attributes are mostly fixed over its lifetime.
 204      *
 205      * Remember that gallium gets to choose the interface it needs, and the
 206      * window systems must then implement that interface (rather than the
 207      * other way around...).
 208      *************************************************************************/
 209
 210     /**
 211      * Create a buffer object.
 212      *
 213      * \param ws        The winsys this function is called from.
 214      * \param size      The size to allocate.
 215      * \param alignment An alignment of the buffer in memory.
 216      * \param use_reusable_pool Whether the cache buffer manager should be used.
 217      * \param domain    A bitmask of the RADEON_DOMAIN_* flags.
 218      * \return          The created buffer object.
 219      */
 220     struct pb_buffer *(*buffer_create)(struct radeon_winsys *ws,
 221                                        unsigned size,
 222                                        unsigned alignment,
 223                                        boolean use_reusable_pool,
 224                                        enum radeon_bo_domain domain);
 225
 226     struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
 227             struct pb_buffer *buf);
 228
 229     /**
 230      * Map the entire data store of a buffer object into the client's address
 231      * space.
 232      *
 233      * \param buf       A winsys buffer object to map.
 234      * \param cs        A command stream to flush if the buffer is referenced by it.
 235      * \param usage     A bitmask of the PIPE_TRANSFER_* flags.
 236      * \return          The pointer at the beginning of the buffer.
 237      */
 238     void *(*buffer_map)(struct radeon_winsys_cs_handle *buf,
 239                         struct radeon_winsys_cs *cs,
 240                         enum pipe_transfer_usage usage);
 241
 242     /**
 243      * Unmap a buffer object from the client's address space.
 244      *
 245      * \param buf       A winsys buffer object to unmap.
 246      */
 247     void (*buffer_unmap)(struct radeon_winsys_cs_handle *buf);
 248
 249     /**
 250      * Return TRUE if a buffer object is being used by the GPU.
 251      *
 252      * \param buf       A winsys buffer object.
 253      * \param usage     Only check whether the buffer is busy for the given usage.
 254      */
 255     boolean (*buffer_is_busy)(struct pb_buffer *buf,
 256                               enum radeon_bo_usage usage);
 257
 258     /**
 259      * Wait for a buffer object until it is not used by a GPU. This is
 260      * equivalent to a fence placed after the last command using the buffer,
 261      * and synchronizing to the fence.
 262      *
 263      * \param buf       A winsys buffer object to wait for.
 264      * \param usage     Only wait until the buffer is idle for the given usage,
 265      *                  but may still be busy for some other usage.
 266      */
 267     void (*buffer_wait)(struct pb_buffer *buf, enum radeon_bo_usage usage);
 268
 269     /**
 270      * Return tiling flags describing a memory layout of a buffer object.
 271      *
 272      * \param buf       A winsys buffer object to get the flags from.
 273      * \param macrotile A pointer to the return value of the microtile flag.
 274      * \param microtile A pointer to the return value of the macrotile flag.
 275      *
 276      * \note microtile and macrotile are not bitmasks!
 277      */
 278     void (*buffer_get_tiling)(struct pb_buffer *buf,
 279                               enum radeon_bo_layout *microtile,
 280                               enum radeon_bo_layout *macrotile,
 281                               unsigned *bankw, unsigned *bankh,
 282                               unsigned *tile_split,
 283                               unsigned *stencil_tile_split,
 284                               unsigned *mtilea);
 285
 286     /**
 287      * Set tiling flags describing a memory layout of a buffer object.
 288      *
 289      * \param buf       A winsys buffer object to set the flags for.
 290      * \param cs        A command stream to flush if the buffer is referenced by it.
 291      * \param macrotile A macrotile flag.
 292      * \param microtile A microtile flag.
 293      * \param stride    A stride of the buffer in bytes, for texturing.
 294      *
 295      * \note microtile and macrotile are not bitmasks!
 296      */
 297     void (*buffer_set_tiling)(struct pb_buffer *buf,
 298                               struct radeon_winsys_cs *rcs,
 299                               enum radeon_bo_layout microtile,
 300                               enum radeon_bo_layout macrotile,
 301                               unsigned bankw, unsigned bankh,
 302                               unsigned tile_split,
 303                               unsigned stencil_tile_split,
 304                               unsigned mtilea,
 305                               unsigned stride);
 306
 307     /**
 308      * Get a winsys buffer from a winsys handle. The internal structure
 309      * of the handle is platform-specific and only a winsys should access it.
 310      *
 311      * \param ws        The winsys this function is called from.
 312      * \param whandle   A winsys handle pointer as was received from a state
 313      *                  tracker.
 314      * \param stride    The returned buffer stride in bytes.
 315      */
 316     struct pb_buffer *(*buffer_from_handle)(struct radeon_winsys *ws,
 317                                             struct winsys_handle *whandle,
 318                                             unsigned *stride);
 319
 320     /**
 321      * Get a winsys handle from a winsys buffer. The internal structure
 322      * of the handle is platform-specific and only a winsys should access it.
 323      *
 324      * \param buf       A winsys buffer object to get the handle from.
 325      * \param whandle   A winsys handle pointer.
 326      * \param stride    A stride of the buffer in bytes, for texturing.
 327      * \return          TRUE on success.
 328      */
 329     boolean (*buffer_get_handle)(struct pb_buffer *buf,
 330                                  unsigned stride,
 331                                  struct winsys_handle *whandle);
 332
 333     /**
 334      * Return the virtual address of a buffer.
 335      *
 336      * \param buf       A winsys buffer object
 337      * \return          virtual address
 338      */
 339     uint64_t (*buffer_get_virtual_address)(struct radeon_winsys_cs_handle *buf);
 340
 341     /**************************************************************************
 342      * Command submission.
 343      *
 344      * Each pipe context should create its own command stream and submit
 345      * commands independently of other contexts.
 346      *************************************************************************/
 347
 348     /**
 349      * Create a command stream.
 350      *
 351      * \param ws        The winsys this function is called from.
 352      */
 353     struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws);
 354
 355     /**
 356      * Destroy a command stream.
 357      *
 358      * \param cs        A command stream to destroy.
 359      */
 360     void (*cs_destroy)(struct radeon_winsys_cs *cs);
 361
 362     /**
 363      * Add a new buffer relocation. Every relocation must first be added
 364      * before it can be written.
 365      *
 366      * \param cs  A command stream to add buffer for validation against.
 367      * \param buf A winsys buffer to validate.
 368      * \param usage   Whether the buffer is used for read and/or write.
 369      * \param domain  Bitmask of the RADEON_DOMAIN_* flags.
 370      * \return Relocation index.
 371      */
 372     unsigned (*cs_add_reloc)(struct radeon_winsys_cs *cs,
 373                              struct radeon_winsys_cs_handle *buf,
 374                              enum radeon_bo_usage usage,
 375                              enum radeon_bo_domain domain);
 376
 377     /**
 378      * Return TRUE if there is enough memory in VRAM and GTT for the relocs
 379      * added so far. If the validation fails, all the relocations which have
 380      * been added since the last call of cs_validate will be removed and
 381      * the CS will be flushed (provided there are still any relocations).
 382      *
 383      * \param cs        A command stream to validate.
 384      */
 385     boolean (*cs_validate)(struct radeon_winsys_cs *cs);
 386
 387     /**
 388      * Write a relocated dword to a command buffer.
 389      *
 390      * \param cs        A command stream the relocation is written to.
 391      * \param buf       A winsys buffer to write the relocation for.
 392      */
 393     void (*cs_write_reloc)(struct radeon_winsys_cs *cs,
 394                            struct radeon_winsys_cs_handle *buf);
 395
 396     /**
 397      * Flush a command stream.
 398      *
 399      * \param cs        A command stream to flush.
 400      * \param flags,    RADEON_FLUSH_ASYNC or 0.
 401      */
 402     void (*cs_flush)(struct radeon_winsys_cs *cs, unsigned flags);
 403
 404     /**
 405      * Set a flush callback which is called from winsys when flush is
 406      * required.
 407      *
 408      * \param cs        A command stream to set the callback for.
 409      * \param flush     A flush callback function associated with the command stream.
 410      * \param user      A user pointer that will be passed to the flush callback.
 411      */
 412     void (*cs_set_flush_callback)(struct radeon_winsys_cs *cs,
 413                                   void (*flush)(void *ctx, unsigned flags),
 414                                   void *ctx);
 415
 416     /**
 417      * Return TRUE if a buffer is referenced by a command stream.
 418      *
 419      * \param cs        A command stream.
 420      * \param buf       A winsys buffer.
 421      */
 422     boolean (*cs_is_buffer_referenced)(struct radeon_winsys_cs *cs,
 423                                        struct radeon_winsys_cs_handle *buf,
 424                                        enum radeon_bo_usage usage);
 425
 426     /**
 427      * Request access to a feature for a command stream.
 428      *
 429      * \param cs        A command stream.
 430      * \param fid       Feature ID, one of RADEON_FID_*
 431      * \param enable    Whether to enable or disable the feature.
 432      */
 433     boolean (*cs_request_feature)(struct radeon_winsys_cs *cs,
 434                                   enum radeon_feature_id fid,
 435                                   boolean enable);
 436
 437     /**
 438      * Initialize surface
 439      *
 440      * \param ws        The winsys this function is called from.
 441      * \param surf      Surface structure ptr
 442      */
 443     int (*surface_init)(struct radeon_winsys *ws,
 444                         struct radeon_surface *surf);
 445
 446     /**
 447      * Find best values for a surface
 448      *
 449      * \param ws        The winsys this function is called from.
 450      * \param surf      Surface structure ptr
 451      */
 452     int (*surface_best)(struct radeon_winsys *ws,
 453                         struct radeon_surface *surf);
 454
 455     /**
 456      * Return the current timestamp (gpu clock) on r600 and later GPUs.
 457      *
 458      * \param ws        The winsys this function is called from.
 459      */
 460     uint64_t (*query_timestamp)(struct radeon_winsys *ws);
 461 };
 462
 463 #endif