src/gallium/winsys/svga/drm/vmwgfx_drm.h

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  27
  28 #ifndef __VMWGFX_DRM_H__
  29 #define __VMWGFX_DRM_H__
  30
  31 #ifndef __KERNEL__
  32 #include <drm.h>
  33 #endif
  34
  35 #define DRM_VMW_MAX_SURFACE_FACES 6
  36 #define DRM_VMW_MAX_MIP_LEVELS 24
  37
  38
  39 #define DRM_VMW_GET_PARAM            0
  40 #define DRM_VMW_ALLOC_DMABUF         1
  41 #define DRM_VMW_UNREF_DMABUF         2
  42 #define DRM_VMW_CURSOR_BYPASS        3
  43 /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  44 #define DRM_VMW_CONTROL_STREAM       4
  45 #define DRM_VMW_CLAIM_STREAM         5
  46 #define DRM_VMW_UNREF_STREAM         6
  47 /* guarded by DRM_VMW_PARAM_3D == 1 */
  48 #define DRM_VMW_CREATE_CONTEXT       7
  49 #define DRM_VMW_UNREF_CONTEXT        8
  50 #define DRM_VMW_CREATE_SURFACE       9
  51 #define DRM_VMW_UNREF_SURFACE        10
  52 #define DRM_VMW_REF_SURFACE          11
  53 #define DRM_VMW_EXECBUF              12
  54 #define DRM_VMW_GET_3D_CAP           13
  55 #define DRM_VMW_FENCE_WAIT           14
  56 #define DRM_VMW_FENCE_SIGNALED       15
  57 #define DRM_VMW_FENCE_UNREF          16
  58 #define DRM_VMW_FENCE_EVENT          17
  59 #define DRM_VMW_PRESENT              18
  60 #define DRM_VMW_PRESENT_READBACK     19
  61 #define DRM_VMW_UPDATE_LAYOUT        20
  62 #define DRM_VMW_CREATE_SHADER        21
  63 #define DRM_VMW_UNREF_SHADER         22
  64 #define DRM_VMW_GB_SURFACE_CREATE    23
  65 #define DRM_VMW_GB_SURFACE_REF       24
  66 #define DRM_VMW_SYNCCPU              25
  67 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26
  68 #define DRM_VMW_GB_SURFACE_CREATE_EXT   27
  69 #define DRM_VMW_GB_SURFACE_REF_EXT      28
  70
  71 /*************************************************************************/
  72 /**
  73  * DRM_VMW_GET_PARAM - get device information.
  74  *
  75  * DRM_VMW_PARAM_FIFO_OFFSET:
  76  * Offset to use to map the first page of the FIFO read-only.
  77  * The fifo is mapped using the mmap() system call on the drm device.
  78  *
  79  * DRM_VMW_PARAM_OVERLAY_IOCTL:
  80  * Does the driver support the overlay ioctl.
  81  *
  82  * DRM_VMW_PARAM_SM4_1
  83  * SM4_1 support is enabled.
  84  */
  85
  86 #define DRM_VMW_PARAM_NUM_STREAMS      0
  87 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  88 #define DRM_VMW_PARAM_3D               2
  89 #define DRM_VMW_PARAM_HW_CAPS          3
  90 #define DRM_VMW_PARAM_FIFO_CAPS        4
  91 #define DRM_VMW_PARAM_MAX_FB_SIZE      5
  92 #define DRM_VMW_PARAM_FIFO_HW_VERSION  6
  93 #define DRM_VMW_PARAM_MAX_SURF_MEMORY  7
  94 #define DRM_VMW_PARAM_3D_CAPS_SIZE     8
  95 #define DRM_VMW_PARAM_MAX_MOB_MEMORY   9
  96 #define DRM_VMW_PARAM_MAX_MOB_SIZE     10
  97 #define DRM_VMW_PARAM_SCREEN_TARGET    11
  98 #define DRM_VMW_PARAM_VGPU10           12
  99 #define DRM_VMW_PARAM_HW_CAPS2         13
 100 #define DRM_VMW_PARAM_SM4_1            14
 101
 102 /**
 103  * enum drm_vmw_handle_type - handle type for ref ioctls
 104  *
 105  */
 106 enum drm_vmw_handle_type {
 107         DRM_VMW_HANDLE_LEGACY = 0,
 108         DRM_VMW_HANDLE_PRIME = 1
 109 };
 110
 111 /**
 112  * struct drm_vmw_getparam_arg
 113  *
 114  * @value: Returned value. //Out
 115  * @param: Parameter to query. //In.
 116  *
 117  * Argument to the DRM_VMW_GET_PARAM Ioctl.
 118  */
 119
 120 struct drm_vmw_getparam_arg {
 121         uint64_t value;
 122         uint32_t param;
 123         uint32_t pad64;
 124 };
 125
 126 /*************************************************************************/
 127 /**
 128  * DRM_VMW_CREATE_CONTEXT - Create a host context.
 129  *
 130  * Allocates a device unique context id, and queues a create context command
 131  * for the host. Does not wait for host completion.
 132  */
 133
 134 /**
 135  * struct drm_vmw_context_arg
 136  *
 137  * @cid: Device unique context ID.
 138  *
 139  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
 140  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
 141  */
 142
 143 struct drm_vmw_context_arg {
 144         int32_t cid;
 145         uint32_t pad64;
 146 };
 147
 148 /*************************************************************************/
 149 /**
 150  * DRM_VMW_UNREF_CONTEXT - Create a host context.
 151  *
 152  * Frees a global context id, and queues a destroy host command for the host.
 153  * Does not wait for host completion. The context ID can be used directly
 154  * in the command stream and shows up as the same context ID on the host.
 155  */
 156
 157 /*************************************************************************/
 158 /**
 159  * DRM_VMW_CREATE_SURFACE - Create a host suface.
 160  *
 161  * Allocates a device unique surface id, and queues a create surface command
 162  * for the host. Does not wait for host completion. The surface ID can be
 163  * used directly in the command stream and shows up as the same surface
 164  * ID on the host.
 165  */
 166
 167 /**
 168  * struct drm_wmv_surface_create_req
 169  *
 170  * @flags: Surface flags as understood by the host.
 171  * @format: Surface format as understood by the host.
 172  * @mip_levels: Number of mip levels for each face.
 173  * An unused face should have 0 encoded.
 174  * @size_addr: Address of a user-space array of sruct drm_vmw_size
 175  * cast to an uint64_t for 32-64 bit compatibility.
 176  * The size of the array should equal the total number of mipmap levels.
 177  * @shareable: Boolean whether other clients (as identified by file descriptors)
 178  * may reference this surface.
 179  * @scanout: Boolean whether the surface is intended to be used as a
 180  * scanout.
 181  *
 182  * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
 183  * Output data from the DRM_VMW_REF_SURFACE Ioctl.
 184  */
 185
 186 struct drm_vmw_surface_create_req {
 187         uint32_t flags;
 188         uint32_t format;
 189         uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
 190         uint64_t size_addr;
 191         int32_t shareable;
 192         int32_t scanout;
 193 };
 194
 195 /**
 196  * struct drm_wmv_surface_arg
 197  *
 198  * @sid: Surface id of created surface or surface to destroy or reference.
 199  * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl.
 200  *
 201  * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
 202  * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
 203  * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
 204  */
 205
 206 struct drm_vmw_surface_arg {
 207         int32_t sid;
 208         enum drm_vmw_handle_type handle_type;
 209 };
 210
 211 /**
 212  * struct drm_vmw_size ioctl.
 213  *
 214  * @width - mip level width
 215  * @height - mip level height
 216  * @depth - mip level depth
 217  *
 218  * Description of a mip level.
 219  * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
 220  */
 221
 222 struct drm_vmw_size {
 223         uint32_t width;
 224         uint32_t height;
 225         uint32_t depth;
 226         uint32_t pad64;
 227 };
 228
 229 /**
 230  * union drm_vmw_surface_create_arg
 231  *
 232  * @rep: Output data as described above.
 233  * @req: Input data as described above.
 234  *
 235  * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
 236  */
 237
 238 union drm_vmw_surface_create_arg {
 239         struct drm_vmw_surface_arg rep;
 240         struct drm_vmw_surface_create_req req;
 241 };
 242
 243 /*************************************************************************/
 244 /**
 245  * DRM_VMW_REF_SURFACE - Reference a host surface.
 246  *
 247  * Puts a reference on a host surface with a give sid, as previously
 248  * returned by the DRM_VMW_CREATE_SURFACE ioctl.
 249  * A reference will make sure the surface isn't destroyed while we hold
 250  * it and will allow the calling client to use the surface ID in the command
 251  * stream.
 252  *
 253  * On successful return, the Ioctl returns the surface information given
 254  * in the DRM_VMW_CREATE_SURFACE ioctl.
 255  */
 256
 257 /**
 258  * union drm_vmw_surface_reference_arg
 259  *
 260  * @rep: Output data as described above.
 261  * @req: Input data as described above.
 262  *
 263  * Argument to the DRM_VMW_REF_SURFACE Ioctl.
 264  */
 265
 266 union drm_vmw_surface_reference_arg {
 267         struct drm_vmw_surface_create_req rep;
 268         struct drm_vmw_surface_arg req;
 269 };
 270
 271 /*************************************************************************/
 272 /**
 273  * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
 274  *
 275  * Clear a reference previously put on a host surface.
 276  * When all references are gone, including the one implicitly placed
 277  * on creation,
 278  * a destroy surface command will be queued for the host.
 279  * Does not wait for completion.
 280  */
 281
 282 /*************************************************************************/
 283 /**
 284  * DRM_VMW_EXECBUF
 285  *
 286  * Submit a command buffer for execution on the host, and return a
 287  * fence seqno that when signaled, indicates that the command buffer has
 288  * executed.
 289  */
 290
 291 /**
 292  * struct drm_vmw_execbuf_arg
 293  *
 294  * @commands: User-space address of a command buffer cast to an uint64_t.
 295  * @command-size: Size in bytes of the command buffer.
 296  * @throttle-us: Sleep until software is less than @throttle_us
 297  * microseconds ahead of hardware. The driver may round this value
 298  * to the nearest kernel tick.
 299  * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
 300  * uint64_t.
 301  * @version: Allows expanding the execbuf ioctl parameters without breaking
 302  * backwards compatibility, since user-space will always tell the kernel
 303  * which version it uses.
 304  * @flags: Execbuf flags.
 305  * @imported_fence_fd:  FD for a fence imported from another device
 306  *
 307  * Argument to the DRM_VMW_EXECBUF Ioctl.
 308  */
 309
 310 #define DRM_VMW_EXECBUF_VERSION 2
 311
 312 #define DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD (1 << 0)
 313 #define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1)
 314
 315 struct drm_vmw_execbuf_arg {
 316         uint64_t commands;
 317         uint32_t command_size;
 318         uint32_t throttle_us;
 319         uint64_t fence_rep;
 320         uint32_t version;
 321         uint32_t flags;
 322         uint32_t context_handle;
 323         int32_t imported_fence_fd;
 324 };
 325
 326 /**
 327  * struct drm_vmw_fence_rep
 328  *
 329  * @handle: Fence object handle for fence associated with a command submission.
 330  * @mask: Fence flags relevant for this fence object.
 331  * @seqno: Fence sequence number in fifo. A fence object with a lower
 332  * seqno will signal the EXEC flag before a fence object with a higher
 333  * seqno. This can be used by user-space to avoid kernel calls to determine
 334  * whether a fence has signaled the EXEC flag. Note that @seqno will
 335  * wrap at 32-bit.
 336  * @passed_seqno: The highest seqno number processed by the hardware
 337  * so far. This can be used to mark user-space fence objects as signaled, and
 338  * to determine whether a fence seqno might be stale.
 339  * @fd: FD associated with the fence, -1 if not exported
 340  * @error: This member should've been set to -EFAULT on submission.
 341  * The following actions should be take on completion:
 342  * error == -EFAULT: Fence communication failed. The host is synchronized.
 343  * Use the last fence id read from the FIFO fence register.
 344  * error != 0 && error != -EFAULT:
 345  * Fence submission failed. The host is synchronized. Use the fence_seq member.
 346  * error == 0: All is OK, The host may not be synchronized.
 347  * Use the fence_seq member.
 348  *
 349  * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
 350  */
 351
 352 struct drm_vmw_fence_rep {
 353         uint32_t handle;
 354         uint32_t mask;
 355         uint32_t seqno;
 356         uint32_t passed_seqno;
 357         int32_t fd;
 358         int32_t error;
 359 };
 360
 361 /*************************************************************************/
 362 /**
 363  * DRM_VMW_ALLOC_DMABUF
 364  *
 365  * Allocate a DMA buffer that is visible also to the host.
 366  * NOTE: The buffer is
 367  * identified by a handle and an offset, which are private to the guest, but
 368  * useable in the command stream. The guest kernel may translate these
 369  * and patch up the command stream accordingly. In the future, the offset may
 370  * be zero at all times, or it may disappear from the interface before it is
 371  * fixed.
 372  *
 373  * The DMA buffer may stay user-space mapped in the guest at all times,
 374  * and is thus suitable for sub-allocation.
 375  *
 376  * DMA buffers are mapped using the mmap() syscall on the drm device.
 377  */
 378
 379 /**
 380  * struct drm_vmw_alloc_dmabuf_req
 381  *
 382  * @size: Required minimum size of the buffer.
 383  *
 384  * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
 385  */
 386
 387 struct drm_vmw_alloc_dmabuf_req {
 388         uint32_t size;
 389         uint32_t pad64;
 390 };
 391
 392 /**
 393  * struct drm_vmw_dmabuf_rep
 394  *
 395  * @map_handle: Offset to use in the mmap() call used to map the buffer.
 396  * @handle: Handle unique to this buffer. Used for unreferencing.
 397  * @cur_gmr_id: GMR id to use in the command stream when this buffer is
 398  * referenced. See not above.
 399  * @cur_gmr_offset: Offset to use in the command stream when this buffer is
 400  * referenced. See note above.
 401  *
 402  * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
 403  */
 404
 405 struct drm_vmw_dmabuf_rep {
 406         uint64_t map_handle;
 407         uint32_t handle;
 408         uint32_t cur_gmr_id;
 409         uint32_t cur_gmr_offset;
 410         uint32_t pad64;
 411 };
 412
 413 /**
 414  * union drm_vmw_dmabuf_arg
 415  *
 416  * @req: Input data as described above.
 417  * @rep: Output data as described above.
 418  *
 419  * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
 420  */
 421
 422 union drm_vmw_alloc_dmabuf_arg {
 423         struct drm_vmw_alloc_dmabuf_req req;
 424         struct drm_vmw_dmabuf_rep rep;
 425 };
 426
 427 /*************************************************************************/
 428 /**
 429  * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
 430  *
 431  */
 432
 433 /**
 434  * struct drm_vmw_unref_dmabuf_arg
 435  *
 436  * @handle: Handle indicating what buffer to free. Obtained from the
 437  * DRM_VMW_ALLOC_DMABUF Ioctl.
 438  *
 439  * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
 440  */
 441
 442 struct drm_vmw_unref_dmabuf_arg {
 443         uint32_t handle;
 444         uint32_t pad64;
 445 };
 446
 447 /*************************************************************************/
 448 /**
 449  * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
 450  *
 451  * This IOCTL controls the overlay units of the svga device.
 452  * The SVGA overlay units does not work like regular hardware units in
 453  * that they do not automaticaly read back the contents of the given dma
 454  * buffer. But instead only read back for each call to this ioctl, and
 455  * at any point between this call being made and a following call that
 456  * either changes the buffer or disables the stream.
 457  */
 458
 459 /**
 460  * struct drm_vmw_rect
 461  *
 462  * Defines a rectangle. Used in the overlay ioctl to define
 463  * source and destination rectangle.
 464  */
 465
 466 struct drm_vmw_rect {
 467         int32_t x;
 468         int32_t y;
 469         uint32_t w;
 470         uint32_t h;
 471 };
 472
 473 /**
 474  * struct drm_vmw_control_stream_arg
 475  *
 476  * @stream_id: Stearm to control
 477  * @enabled: If false all following arguments are ignored.
 478  * @handle: Handle to buffer for getting data from.
 479  * @format: Format of the overlay as understood by the host.
 480  * @width: Width of the overlay.
 481  * @height: Height of the overlay.
 482  * @size: Size of the overlay in bytes.
 483  * @pitch: Array of pitches, the two last are only used for YUV12 formats.
 484  * @offset: Offset from start of dma buffer to overlay.
 485  * @src: Source rect, must be within the defined area above.
 486  * @dst: Destination rect, x and y may be negative.
 487  *
 488  * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
 489  */
 490
 491 struct drm_vmw_control_stream_arg {
 492         uint32_t stream_id;
 493         uint32_t enabled;
 494
 495         uint32_t flags;
 496         uint32_t color_key;
 497
 498         uint32_t handle;
 499         uint32_t offset;
 500         int32_t format;
 501         uint32_t size;
 502         uint32_t width;
 503         uint32_t height;
 504         uint32_t pitch[3];
 505
 506         uint32_t pad64;
 507         struct drm_vmw_rect src;
 508         struct drm_vmw_rect dst;
 509 };
 510
 511 /*************************************************************************/
 512 /**
 513  * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
 514  *
 515  */
 516
 517 #define DRM_VMW_CURSOR_BYPASS_ALL    (1 << 0)
 518 #define DRM_VMW_CURSOR_BYPASS_FLAGS       (1)
 519
 520 /**
 521  * struct drm_vmw_cursor_bypass_arg
 522  *
 523  * @flags: Flags.
 524  * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
 525  * @xpos: X position of cursor.
 526  * @ypos: Y position of cursor.
 527  * @xhot: X hotspot.
 528  * @yhot: Y hotspot.
 529  *
 530  * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
 531  */
 532
 533 struct drm_vmw_cursor_bypass_arg {
 534         uint32_t flags;
 535         uint32_t crtc_id;
 536         int32_t xpos;
 537         int32_t ypos;
 538         int32_t xhot;
 539         int32_t yhot;
 540 };
 541
 542 /*************************************************************************/
 543 /**
 544  * DRM_VMW_CLAIM_STREAM - Claim a single stream.
 545  */
 546
 547 /**
 548  * struct drm_vmw_context_arg
 549  *
 550  * @stream_id: Device unique context ID.
 551  *
 552  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
 553  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
 554  */
 555
 556 struct drm_vmw_stream_arg {
 557         uint32_t stream_id;
 558         uint32_t pad64;
 559 };
 560
 561 /*************************************************************************/
 562 /**
 563  * DRM_VMW_UNREF_STREAM - Unclaim a stream.
 564  *
 565  * Return a single stream that was claimed by this process. Also makes
 566  * sure that the stream has been stopped.
 567  */
 568
 569 /*************************************************************************/
 570 /**
 571  * DRM_VMW_GET_3D_CAP
 572  *
 573  * Read 3D capabilities from the FIFO
 574  *
 575  */
 576
 577 /**
 578  * struct drm_vmw_get_3d_cap_arg
 579  *
 580  * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
 581  * @size: Max size to copy
 582  *
 583  * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
 584  * ioctls.
 585  */
 586
 587 struct drm_vmw_get_3d_cap_arg {
 588         uint64_t buffer;
 589         uint32_t max_size;
 590         uint32_t pad64;
 591 };
 592
 593
 594 /*************************************************************************/
 595 /**
 596  * DRM_VMW_FENCE_WAIT
 597  *
 598  * Waits for a fence object to signal. The wait is interruptible, so that
 599  * signals may be delivered during the interrupt. The wait may timeout,
 600  * in which case the calls returns -EBUSY. If the wait is restarted,
 601  * that is restarting without resetting @cookie_valid to zero,
 602  * the timeout is computed from the first call.
 603  *
 604  * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
 605  * on:
 606  * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
 607  * stream
 608  * have executed.
 609  * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
 610  * commands
 611  * in the buffer given to the EXECBUF ioctl returning the fence object handle
 612  * are available to user-space.
 613  *
 614  * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
 615  * fenc wait ioctl returns 0, the fence object has been unreferenced after
 616  * the wait.
 617  */
 618
 619 #define DRM_VMW_FENCE_FLAG_EXEC   (1 << 0)
 620 #define DRM_VMW_FENCE_FLAG_QUERY  (1 << 1)
 621
 622 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
 623
 624 /**
 625  * struct drm_vmw_fence_wait_arg
 626  *
 627  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 628  * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
 629  * @kernel_cookie: Set to 0 on first call. Left alone on restart.
 630  * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
 631  * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
 632  * before returning.
 633  * @flags: Fence flags to wait on.
 634  * @wait_options: Options that control the behaviour of the wait ioctl.
 635  *
 636  * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
 637  */
 638
 639 struct drm_vmw_fence_wait_arg {
 640         uint32_t handle;
 641         int32_t  cookie_valid;
 642         uint64_t kernel_cookie;
 643         uint64_t timeout_us;
 644         int32_t lazy;
 645         int32_t flags;
 646         int32_t wait_options;
 647         int32_t pad64;
 648 };
 649
 650 /*************************************************************************/
 651 /**
 652  * DRM_VMW_FENCE_SIGNALED
 653  *
 654  * Checks if a fence object is signaled..
 655  */
 656
 657 /**
 658  * struct drm_vmw_fence_signaled_arg
 659  *
 660  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 661  * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
 662  * @signaled: Out: Flags signaled.
 663  * @sequence: Out: Highest sequence passed so far. Can be used to signal the
 664  * EXEC flag of user-space fence objects.
 665  *
 666  * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
 667  * ioctls.
 668  */
 669
 670 struct drm_vmw_fence_signaled_arg {
 671          uint32_t handle;
 672          uint32_t flags;
 673          int32_t signaled;
 674          uint32_t passed_seqno;
 675          uint32_t signaled_flags;
 676          uint32_t pad64;
 677 };
 678
 679 /*************************************************************************/
 680 /**
 681  * DRM_VMW_FENCE_UNREF
 682  *
 683  * Unreferences a fence object, and causes it to be destroyed if there are no
 684  * other references to it.
 685  *
 686  */
 687
 688 /**
 689  * struct drm_vmw_fence_arg
 690  *
 691  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 692  *
 693  * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
 694  */
 695
 696 struct drm_vmw_fence_arg {
 697          uint32_t handle;
 698          uint32_t pad64;
 699 };
 700
 701
 702 /*************************************************************************/
 703 /**
 704  * DRM_VMW_FENCE_EVENT
 705  *
 706  * Queues an event on a fence to be delivered on the drm character device
 707  * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
 708  * Optionally the approximate time when the fence signaled is
 709  * given by the event.
 710  */
 711
 712 /*
 713  * The event type
 714  */
 715 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
 716
 717 struct drm_vmw_event_fence {
 718         struct drm_event base;
 719         uint64_t user_data;
 720         uint32_t tv_sec;
 721         uint32_t tv_usec;
 722 };
 723
 724 /*
 725  * Flags that may be given to the command.
 726  */
 727 /* Request fence signaled time on the event. */
 728 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
 729
 730 /**
 731  * struct drm_vmw_fence_event_arg
 732  *
 733  * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
 734  * the fence is not supposed to be referenced by user-space.
 735  * @user_info: Info to be delivered with the event.
 736  * @handle: Attach the event to this fence only.
 737  * @flags: A set of flags as defined above.
 738  */
 739 struct drm_vmw_fence_event_arg {
 740         uint64_t fence_rep;
 741         uint64_t user_data;
 742         uint32_t handle;
 743         uint32_t flags;
 744 };
 745
 746
 747 /*************************************************************************/
 748 /**
 749  * DRM_VMW_PRESENT
 750  *
 751  * Executes an SVGA present on a given fb for a given surface. The surface
 752  * is placed on the framebuffer. Cliprects are given relative to the given
 753  * point (the point disignated by dest_{x|y}).
 754  *
 755  */
 756
 757 /**
 758  * struct drm_vmw_present_arg
 759  * @fb_id: framebuffer id to present / read back from.
 760  * @sid: Surface id to present from.
 761  * @dest_x: X placement coordinate for surface.
 762  * @dest_y: Y placement coordinate for surface.
 763  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
 764  * @num_clips: Number of cliprects given relative to the framebuffer origin,
 765  * in the same coordinate space as the frame buffer.
 766  * @pad64: Unused 64-bit padding.
 767  *
 768  * Input argument to the DRM_VMW_PRESENT ioctl.
 769  */
 770
 771 struct drm_vmw_present_arg {
 772         uint32_t fb_id;
 773         uint32_t sid;
 774         int32_t dest_x;
 775         int32_t dest_y;
 776         uint64_t clips_ptr;
 777         uint32_t num_clips;
 778         uint32_t pad64;
 779 };
 780
 781
 782 /*************************************************************************/
 783 /**
 784  * DRM_VMW_PRESENT_READBACK
 785  *
 786  * Executes an SVGA present readback from a given fb to the dma buffer
 787  * currently bound as the fb. If there is no dma buffer bound to the fb,
 788  * an error will be returned.
 789  *
 790  */
 791
 792 /**
 793  * struct drm_vmw_present_arg
 794  * @fb_id: fb_id to present / read back from.
 795  * @num_clips: Number of cliprects.
 796  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
 797  * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
 798  * If this member is NULL, then the ioctl should not return a fence.
 799  */
 800
 801 struct drm_vmw_present_readback_arg {
 802          uint32_t fb_id;
 803          uint32_t num_clips;
 804          uint64_t clips_ptr;
 805          uint64_t fence_rep;
 806 };
 807
 808 /*************************************************************************/
 809 /**
 810  * DRM_VMW_UPDATE_LAYOUT - Update layout
 811  *
 812  * Updates the preferred modes and connection status for connectors. The
 813  * command consists of one drm_vmw_update_layout_arg pointing to an array
 814  * of num_outputs drm_vmw_rect's.
 815  */
 816
 817 /**
 818  * struct drm_vmw_update_layout_arg
 819  *
 820  * @num_outputs: number of active connectors
 821  * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
 822  *
 823  * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
 824  */
 825 struct drm_vmw_update_layout_arg {
 826         uint32_t num_outputs;
 827         uint32_t pad64;
 828         uint64_t rects;
 829 };
 830
 831
 832 /*************************************************************************/
 833 /**
 834  * DRM_VMW_CREATE_SHADER - Create shader
 835  *
 836  * Creates a shader and optionally binds it to a dma buffer containing
 837  * the shader byte-code.
 838  */
 839
 840 /**
 841  * enum drm_vmw_shader_type - Shader types
 842  */
 843 enum drm_vmw_shader_type {
 844         drm_vmw_shader_type_vs = 0,
 845         drm_vmw_shader_type_ps,
 846 };
 847
 848
 849 /**
 850  * struct drm_vmw_shader_create_arg
 851  *
 852  * @shader_type: Shader type of the shader to create.
 853  * @size: Size of the byte-code in bytes.
 854  * where the shader byte-code starts
 855  * @buffer_handle: Buffer handle identifying the buffer containing the
 856  * shader byte-code
 857  * @shader_handle: On successful completion contains a handle that
 858  * can be used to subsequently identify the shader.
 859  * @offset: Offset in bytes into the buffer given by @buffer_handle,
 860  *
 861  * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
 862  */
 863 struct drm_vmw_shader_create_arg {
 864         enum drm_vmw_shader_type shader_type;
 865         uint32_t size;
 866         uint32_t buffer_handle;
 867         uint32_t shader_handle;
 868         uint64_t offset;
 869 };
 870
 871 /*************************************************************************/
 872 /**
 873  * DRM_VMW_UNREF_SHADER - Unreferences a shader
 874  *
 875  * Destroys a user-space reference to a shader, optionally destroying
 876  * it.
 877  */
 878
 879 /**
 880  * struct drm_vmw_shader_arg
 881  *
 882  * @handle: Handle identifying the shader to destroy.
 883  *
 884  * Input argument to the DRM_VMW_UNREF_SHADER ioctl.
 885  */
 886 struct drm_vmw_shader_arg {
 887         uint32_t handle;
 888         uint32_t pad64;
 889 };
 890
 891 /*************************************************************************/
 892 /**
 893  * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
 894  *
 895  * Allocates a surface handle and queues a create surface command
 896  * for the host on the first use of the surface. The surface ID can
 897  * be used as the surface ID in commands referencing the surface.
 898  */
 899
 900 /**
 901  * enum drm_vmw_surface_flags
 902  *
 903  * @drm_vmw_surface_flag_shareable:     Whether the surface is shareable
 904  * @drm_vmw_surface_flag_scanout:       Whether the surface is a scanout
 905  *                                      surface.
 906  * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
 907  *                                      given.
 908  */
 909 enum drm_vmw_surface_flags {
 910         drm_vmw_surface_flag_shareable = (1 << 0),
 911         drm_vmw_surface_flag_scanout = (1 << 1),
 912         drm_vmw_surface_flag_create_buffer = (1 << 2)
 913 };
 914
 915 /**
 916  * struct drm_vmw_gb_surface_create_req
 917  *
 918  * @svga3d_flags:     SVGA3d surface flags for the device.
 919  * @format:           SVGA3d format.
 920  * @mip_level:        Number of mip levels for all faces.
 921  * @drm_surface_flags Flags as described above.
 922  * @multisample_count Future use. Set to 0.
 923  * @autogen_filter    Future use. Set to 0.
 924  * @buffer_handle     Buffer handle of backup buffer. SVGA3D_INVALID_ID
 925  *                    if none.
 926  * @base_size         Size of the base mip level for all faces.
 927  * @array_size        Must be zero for non-vgpu10 hardware, and if non-zero
 928  *                    svga3d_flags must have proper bind flags setup.
 929  *
 930  * Input argument to the  DRM_VMW_GB_SURFACE_CREATE Ioctl.
 931  * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
 932  */
 933 struct drm_vmw_gb_surface_create_req {
 934         uint32_t svga3d_flags;
 935         uint32_t format;
 936         uint32_t mip_levels;
 937         enum drm_vmw_surface_flags drm_surface_flags;
 938         uint32_t multisample_count;
 939         uint32_t autogen_filter;
 940         uint32_t buffer_handle;
 941         uint32_t array_size;
 942         struct drm_vmw_size base_size;
 943 };
 944
 945 /**
 946  * struct drm_vmw_gb_surface_create_rep
 947  *
 948  * @handle:            Surface handle.
 949  * @backup_size:       Size of backup buffers for this surface.
 950  * @buffer_handle:     Handle of backup buffer. SVGA3D_INVALID_ID if none.
 951  * @buffer_size:       Actual size of the buffer identified by
 952  *                     @buffer_handle
 953  * @buffer_map_handle: Offset into device address space for the buffer
 954  *                     identified by @buffer_handle.
 955  *
 956  * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
 957  * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
 958  */
 959 struct drm_vmw_gb_surface_create_rep {
 960         uint32_t handle;
 961         uint32_t backup_size;
 962         uint32_t buffer_handle;
 963         uint32_t buffer_size;
 964         uint64_t buffer_map_handle;
 965 };
 966
 967 /**
 968  * union drm_vmw_gb_surface_create_arg
 969  *
 970  * @req: Input argument as described above.
 971  * @rep: Output argument as described above.
 972  *
 973  * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
 974  */
 975 union drm_vmw_gb_surface_create_arg {
 976         struct drm_vmw_gb_surface_create_rep rep;
 977         struct drm_vmw_gb_surface_create_req req;
 978 };
 979
 980 /*************************************************************************/
 981 /**
 982  * DRM_VMW_GB_SURFACE_REF - Reference a host surface.
 983  *
 984  * Puts a reference on a host surface with a given handle, as previously
 985  * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
 986  * A reference will make sure the surface isn't destroyed while we hold
 987  * it and will allow the calling client to use the surface handle in
 988  * the command stream.
 989  *
 990  * On successful return, the Ioctl returns the surface information given
 991  * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
 992  */
 993
 994 /**
 995  * struct drm_vmw_gb_surface_reference_arg
 996  *
 997  * @creq: The data used as input when the surface was created, as described
 998  *        above at "struct drm_vmw_gb_surface_create_req"
 999  * @crep: Additional data output when the surface was created, as described
1000  *        above at "struct drm_vmw_gb_surface_create_rep"
1001  *
1002  * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
1003  */
1004 struct drm_vmw_gb_surface_ref_rep {
1005         struct drm_vmw_gb_surface_create_req creq;
1006         struct drm_vmw_gb_surface_create_rep crep;
1007 };
1008
1009 /**
1010  * union drm_vmw_gb_surface_reference_arg
1011  *
1012  * @req: Input data as described above at "struct drm_vmw_surface_arg"
1013  * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
1014  *
1015  * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
1016  */
1017 union drm_vmw_gb_surface_reference_arg {
1018         struct drm_vmw_gb_surface_ref_rep rep;
1019         struct drm_vmw_surface_arg req;
1020 };
1021
1022
1023 /*************************************************************************/
1024 /**
1025  * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
1026  *
1027  * Idles any previously submitted GPU operations on the buffer and
1028  * by default blocks command submissions that reference the buffer.
1029  * If the file descriptor used to grab a blocking CPU sync is closed, the
1030  * cpu sync is released.
1031  * The flags argument indicates how the grab / release operation should be
1032  * performed:
1033  */
1034
1035 /**
1036  * enum drm_vmw_synccpu_flags - Synccpu flags:
1037  *
1038  * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
1039  * hint to the kernel to allow command submissions that references the buffer
1040  * for read-only.
1041  * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
1042  * referencing this buffer.
1043  * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
1044  * -EBUSY should the buffer be busy.
1045  * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
1046  * while the buffer is synced for CPU. This is similar to the GEM bo idle
1047  * behavior.
1048  */
1049 enum drm_vmw_synccpu_flags {
1050         drm_vmw_synccpu_read = (1 << 0),
1051         drm_vmw_synccpu_write = (1 << 1),
1052         drm_vmw_synccpu_dontblock = (1 << 2),
1053         drm_vmw_synccpu_allow_cs = (1 << 3)
1054 };
1055
1056 /**
1057  * enum drm_vmw_synccpu_op - Synccpu operations:
1058  *
1059  * @drm_vmw_synccpu_grab:    Grab the buffer for CPU operations
1060  * @drm_vmw_synccpu_release: Release a previous grab.
1061  */
1062 enum drm_vmw_synccpu_op {
1063         drm_vmw_synccpu_grab,
1064         drm_vmw_synccpu_release
1065 };
1066
1067 /**
1068  * struct drm_vmw_synccpu_arg
1069  *
1070  * @op:                      The synccpu operation as described above.
1071  * @handle:                  Handle identifying the buffer object.
1072  * @flags:                   Flags as described above.
1073  */
1074 struct drm_vmw_synccpu_arg {
1075         enum drm_vmw_synccpu_op op;
1076         enum drm_vmw_synccpu_flags flags;
1077         uint32_t handle;
1078         uint32_t pad64;
1079 };
1080
1081 /*************************************************************************/
1082 /**
1083  * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context.
1084  *
1085  * Allocates a device unique context id, and queues a create context command
1086  * for the host. Does not wait for host completion.
1087  */
1088 enum drm_vmw_extended_context {
1089         drm_vmw_context_legacy,
1090         drm_vmw_context_vgpu10
1091 };
1092
1093 /**
1094  * union drm_vmw_extended_context_arg
1095  *
1096  * @req: Context type.
1097  * @rep: Context identifier.
1098  *
1099  * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl.
1100  */
1101 union drm_vmw_extended_context_arg {
1102         enum drm_vmw_extended_context req;
1103         struct drm_vmw_context_arg rep;
1104 };
1105
1106 /*************************************************************************/
1107 /**
1108  * DRM_VMW_GB_SURFACE_CREATE_EXT - Create a host guest-backed surface.
1109  *
1110  * Allocates a surface handle and queues a create surface command
1111  * for the host on the first use of the surface. The surface ID can
1112  * be used as the surface ID in commands referencing the surface.
1113  *
1114  * This new command extends DRM_VMW_GB_SURFACE_CREATE by adding version
1115  * parameter and 64 bit svga flag.
1116  */
1117
1118 /**
1119  * enum drm_vmw_surface_version
1120  *
1121  * @drm_vmw_surface_gb_v1: Corresponds to current gb surface format with
1122  * svga3d surface flags split into 2, upper half and lower half.
1123  */
1124 enum drm_vmw_surface_version {
1125         drm_vmw_gb_surface_v1
1126 };
1127
1128 /**
1129  * struct drm_vmw_gb_surface_create_ext_req
1130  *
1131  * @base: Surface create parameters.
1132  * @version: Version of surface create ioctl.
1133  * @svga3d_flags_upper_32_bits: Upper 32 bits of svga3d flags.
1134  * @multisample_pattern: Multisampling pattern when msaa is supported.
1135  * @must_be_zero: Reserved for future usage.
1136  *
1137  * Input argument to the  DRM_VMW_GB_SURFACE_CREATE_EXT Ioctl.
1138  * Part of output argument for the DRM_VMW_GB_SURFACE_REF_EXT Ioctl.
1139  */
1140 struct drm_vmw_gb_surface_create_ext_req {
1141         struct drm_vmw_gb_surface_create_req base;
1142         enum drm_vmw_surface_version version;
1143         uint32_t svga3d_flags_upper_32_bits;
1144         SVGA3dMSPattern multisample_pattern;
1145         uint32_t pad64;
1146         uint64_t must_be_zero;
1147 };
1148
1149 /**
1150  * union drm_vmw_gb_surface_create_ext_arg
1151  *
1152  * @req: Input argument as described above.
1153  * @rep: Output argument as described above.
1154  *
1155  * Argument to the DRM_VMW_GB_SURFACE_CREATE_EXT ioctl.
1156  */
1157 union drm_vmw_gb_surface_create_ext_arg {
1158         struct drm_vmw_gb_surface_create_rep rep;
1159         struct drm_vmw_gb_surface_create_ext_req req;
1160 };
1161
1162 /*************************************************************************/
1163 /**
1164  * DRM_VMW_GB_SURFACE_REF_EXT - Reference a host surface.
1165  *
1166  * Puts a reference on a host surface with a given handle, as previously
1167  * returned by the DRM_VMW_GB_SURFACE_CREATE_EXT ioctl.
1168  * A reference will make sure the surface isn't destroyed while we hold
1169  * it and will allow the calling client to use the surface handle in
1170  * the command stream.
1171  *
1172  * On successful return, the Ioctl returns the surface information given
1173  * to and returned from the DRM_VMW_GB_SURFACE_CREATE_EXT ioctl.
1174  */
1175
1176 /**
1177  * struct drm_vmw_gb_surface_ref_ext_rep
1178  *
1179  * @creq: The data used as input when the surface was created, as described
1180  *        above at "struct drm_vmw_gb_surface_create_ext_req"
1181  * @crep: Additional data output when the surface was created, as described
1182  *        above at "struct drm_vmw_gb_surface_create_rep"
1183  *
1184  * Output Argument to the DRM_VMW_GB_SURFACE_REF_EXT ioctl.
1185  */
1186 struct drm_vmw_gb_surface_ref_ext_rep {
1187         struct drm_vmw_gb_surface_create_ext_req creq;
1188         struct drm_vmw_gb_surface_create_rep crep;
1189 };
1190
1191 /**
1192  * union drm_vmw_gb_surface_reference_ext_arg
1193  *
1194  * @req: Input data as described above at "struct drm_vmw_surface_arg"
1195  * @rep: Output data as described above at
1196  *       "struct drm_vmw_gb_surface_ref_ext_rep"
1197  *
1198  * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
1199  */
1200 union drm_vmw_gb_surface_reference_ext_arg {
1201         struct drm_vmw_gb_surface_ref_ext_rep rep;
1202         struct drm_vmw_surface_arg req;
1203 };
1204
1205 #endif