2 * Copyright 2014, 2015 Red Hat.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <sys/ioctl.h>
30 #include "os/os_mman.h"
31 #include "util/os_time.h"
32 #include "util/u_memory.h"
33 #include "util/u_format.h"
34 #include "util/u_hash_table.h"
35 #include "util/u_inlines.h"
36 #include "state_tracker/drm_driver.h"
37 #include "virgl/virgl_screen.h"
38 #include "virgl/virgl_public.h"
42 #include "virtgpu_drm.h"
44 #include "virgl_drm_winsys.h"
45 #include "virgl_drm_public.h"
48 #define VIRGL_DRM_VERSION(major, minor) ((major) << 16 | (minor))
49 #define VIRGL_DRM_VERSION_FENCE_FD VIRGL_DRM_VERSION(1, 0)
52 static inline boolean
can_cache_resource(struct virgl_hw_res
*res
)
54 return res
->cacheable
== TRUE
;
57 static void virgl_hw_res_destroy(struct virgl_drm_winsys
*qdws
,
58 struct virgl_hw_res
*res
)
60 struct drm_gem_close args
;
63 mtx_lock(&qdws
->bo_handles_mutex
);
64 util_hash_table_remove(qdws
->bo_names
,
65 (void *)(uintptr_t)res
->flink
);
66 mtx_unlock(&qdws
->bo_handles_mutex
);
70 mtx_lock(&qdws
->bo_handles_mutex
);
71 util_hash_table_remove(qdws
->bo_handles
,
72 (void *)(uintptr_t)res
->bo_handle
);
73 mtx_unlock(&qdws
->bo_handles_mutex
);
77 os_munmap(res
->ptr
, res
->size
);
79 if (res
->fence_fd
!= -1)
82 memset(&args
, 0, sizeof(args
));
83 args
.handle
= res
->bo_handle
;
84 drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_CLOSE
, &args
);
88 static boolean
virgl_drm_resource_is_busy(struct virgl_drm_winsys
*qdws
,
89 struct virgl_hw_res
*res
)
91 struct drm_virtgpu_3d_wait waitcmd
;
94 memset(&waitcmd
, 0, sizeof(waitcmd
));
95 waitcmd
.handle
= res
->bo_handle
;
96 waitcmd
.flags
= VIRTGPU_WAIT_NOWAIT
;
98 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_WAIT
, &waitcmd
);
99 if (ret
&& errno
== EBUSY
)
105 virgl_cache_flush(struct virgl_drm_winsys
*qdws
)
107 struct list_head
*curr
, *next
;
108 struct virgl_hw_res
*res
;
110 mtx_lock(&qdws
->mutex
);
111 curr
= qdws
->delayed
.next
;
114 while (curr
!= &qdws
->delayed
) {
115 res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
116 LIST_DEL(&res
->head
);
117 virgl_hw_res_destroy(qdws
, res
);
121 mtx_unlock(&qdws
->mutex
);
124 virgl_drm_winsys_destroy(struct virgl_winsys
*qws
)
126 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
128 virgl_cache_flush(qdws
);
130 util_hash_table_destroy(qdws
->bo_handles
);
131 util_hash_table_destroy(qdws
->bo_names
);
132 mtx_destroy(&qdws
->bo_handles_mutex
);
133 mtx_destroy(&qdws
->mutex
);
139 virgl_cache_list_check_free(struct virgl_drm_winsys
*qdws
)
141 struct list_head
*curr
, *next
;
142 struct virgl_hw_res
*res
;
146 curr
= qdws
->delayed
.next
;
148 while (curr
!= &qdws
->delayed
) {
149 res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
150 if (!os_time_timeout(res
->start
, res
->end
, now
))
153 LIST_DEL(&res
->head
);
154 virgl_hw_res_destroy(qdws
, res
);
160 static void virgl_drm_resource_reference(struct virgl_drm_winsys
*qdws
,
161 struct virgl_hw_res
**dres
,
162 struct virgl_hw_res
*sres
)
164 struct virgl_hw_res
*old
= *dres
;
165 if (pipe_reference(&(*dres
)->reference
, &sres
->reference
)) {
167 if (!can_cache_resource(old
)) {
168 virgl_hw_res_destroy(qdws
, old
);
170 mtx_lock(&qdws
->mutex
);
171 virgl_cache_list_check_free(qdws
);
173 old
->start
= os_time_get();
174 old
->end
= old
->start
+ qdws
->usecs
;
175 LIST_ADDTAIL(&old
->head
, &qdws
->delayed
);
177 mtx_unlock(&qdws
->mutex
);
183 static struct virgl_hw_res
*
184 virgl_drm_winsys_resource_create(struct virgl_winsys
*qws
,
185 enum pipe_texture_target target
,
196 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
197 struct drm_virtgpu_resource_create createcmd
;
199 struct virgl_hw_res
*res
;
200 uint32_t stride
= width
* util_format_get_blocksize(format
);
202 res
= CALLOC_STRUCT(virgl_hw_res
);
206 memset(&createcmd
, 0, sizeof(createcmd
));
207 createcmd
.target
= target
;
208 createcmd
.format
= format
;
209 createcmd
.bind
= bind
;
210 createcmd
.width
= width
;
211 createcmd
.height
= height
;
212 createcmd
.depth
= depth
;
213 createcmd
.array_size
= array_size
;
214 createcmd
.last_level
= last_level
;
215 createcmd
.nr_samples
= nr_samples
;
216 createcmd
.stride
= stride
;
217 createcmd
.size
= size
;
219 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE
, &createcmd
);
226 res
->format
= format
;
228 res
->res_handle
= createcmd
.res_handle
;
229 res
->bo_handle
= createcmd
.bo_handle
;
231 res
->stride
= stride
;
232 pipe_reference_init(&res
->reference
, 1);
233 p_atomic_set(&res
->num_cs_references
, 0);
238 static inline int virgl_is_res_compat(struct virgl_drm_winsys
*qdws
,
239 struct virgl_hw_res
*res
,
240 uint32_t size
, uint32_t bind
,
243 if (res
->bind
!= bind
)
245 if (res
->format
!= format
)
247 if (res
->size
< size
)
249 if (res
->size
> size
* 2)
252 if (virgl_drm_resource_is_busy(qdws
, res
)) {
260 virgl_bo_transfer_put(struct virgl_winsys
*vws
,
261 struct virgl_hw_res
*res
,
262 const struct pipe_box
*box
,
263 uint32_t stride
, uint32_t layer_stride
,
264 uint32_t buf_offset
, uint32_t level
)
266 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
267 struct drm_virtgpu_3d_transfer_to_host tohostcmd
;
269 memset(&tohostcmd
, 0, sizeof(tohostcmd
));
270 tohostcmd
.bo_handle
= res
->bo_handle
;
271 tohostcmd
.box
.x
= box
->x
;
272 tohostcmd
.box
.y
= box
->y
;
273 tohostcmd
.box
.z
= box
->z
;
274 tohostcmd
.box
.w
= box
->width
;
275 tohostcmd
.box
.h
= box
->height
;
276 tohostcmd
.box
.d
= box
->depth
;
277 tohostcmd
.offset
= buf_offset
;
278 tohostcmd
.level
= level
;
279 // tohostcmd.stride = stride;
280 // tohostcmd.layer_stride = stride;
281 return drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST
, &tohostcmd
);
285 virgl_bo_transfer_get(struct virgl_winsys
*vws
,
286 struct virgl_hw_res
*res
,
287 const struct pipe_box
*box
,
288 uint32_t stride
, uint32_t layer_stride
,
289 uint32_t buf_offset
, uint32_t level
)
291 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
292 struct drm_virtgpu_3d_transfer_from_host fromhostcmd
;
294 memset(&fromhostcmd
, 0, sizeof(fromhostcmd
));
295 fromhostcmd
.bo_handle
= res
->bo_handle
;
296 fromhostcmd
.level
= level
;
297 fromhostcmd
.offset
= buf_offset
;
298 // fromhostcmd.stride = stride;
299 // fromhostcmd.layer_stride = layer_stride;
300 fromhostcmd
.box
.x
= box
->x
;
301 fromhostcmd
.box
.y
= box
->y
;
302 fromhostcmd
.box
.z
= box
->z
;
303 fromhostcmd
.box
.w
= box
->width
;
304 fromhostcmd
.box
.h
= box
->height
;
305 fromhostcmd
.box
.d
= box
->depth
;
306 return drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST
, &fromhostcmd
);
309 static struct virgl_hw_res
*
310 virgl_drm_winsys_resource_cache_create(struct virgl_winsys
*qws
,
311 enum pipe_texture_target target
,
322 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
323 struct virgl_hw_res
*res
, *curr_res
;
324 struct list_head
*curr
, *next
;
328 /* only store binds for vertex/index/const buffers */
329 if (bind
!= VIRGL_BIND_CONSTANT_BUFFER
&& bind
!= VIRGL_BIND_INDEX_BUFFER
&&
330 bind
!= VIRGL_BIND_VERTEX_BUFFER
&& bind
!= VIRGL_BIND_CUSTOM
)
333 mtx_lock(&qdws
->mutex
);
336 curr
= qdws
->delayed
.next
;
340 while (curr
!= &qdws
->delayed
) {
341 curr_res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
343 if (!res
&& ((ret
= virgl_is_res_compat(qdws
, curr_res
, size
, bind
, format
)) > 0))
345 else if (os_time_timeout(curr_res
->start
, curr_res
->end
, now
)) {
346 LIST_DEL(&curr_res
->head
);
347 virgl_hw_res_destroy(qdws
, curr_res
);
358 if (!res
&& ret
!= -1) {
359 while (curr
!= &qdws
->delayed
) {
360 curr_res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
361 ret
= virgl_is_res_compat(qdws
, curr_res
, size
, bind
, format
);
374 LIST_DEL(&res
->head
);
376 mtx_unlock(&qdws
->mutex
);
377 pipe_reference_init(&res
->reference
, 1);
381 mtx_unlock(&qdws
->mutex
);
384 res
= virgl_drm_winsys_resource_create(qws
, target
, format
, bind
,
385 width
, height
, depth
, array_size
,
386 last_level
, nr_samples
, size
);
387 if (bind
== VIRGL_BIND_CONSTANT_BUFFER
|| bind
== VIRGL_BIND_INDEX_BUFFER
||
388 bind
== VIRGL_BIND_VERTEX_BUFFER
)
389 res
->cacheable
= TRUE
;
393 static struct virgl_hw_res
*
394 virgl_drm_winsys_resource_create_handle(struct virgl_winsys
*qws
,
395 struct winsys_handle
*whandle
)
397 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
398 struct drm_gem_open open_arg
= {};
399 struct drm_virtgpu_resource_info info_arg
= {};
400 struct virgl_hw_res
*res
;
401 uint32_t handle
= whandle
->handle
;
403 if (whandle
->offset
!= 0) {
404 fprintf(stderr
, "attempt to import unsupported winsys offset %u\n",
409 mtx_lock(&qdws
->bo_handles_mutex
);
411 if (whandle
->type
== WINSYS_HANDLE_TYPE_SHARED
) {
412 res
= util_hash_table_get(qdws
->bo_names
, (void*)(uintptr_t)handle
);
414 struct virgl_hw_res
*r
= NULL
;
415 virgl_drm_resource_reference(qdws
, &r
, res
);
420 if (whandle
->type
== WINSYS_HANDLE_TYPE_FD
) {
422 r
= drmPrimeFDToHandle(qdws
->fd
, whandle
->handle
, &handle
);
429 res
= util_hash_table_get(qdws
->bo_handles
, (void*)(uintptr_t)handle
);
431 struct virgl_hw_res
*r
= NULL
;
432 virgl_drm_resource_reference(qdws
, &r
, res
);
436 res
= CALLOC_STRUCT(virgl_hw_res
);
440 if (whandle
->type
== WINSYS_HANDLE_TYPE_FD
) {
441 res
->bo_handle
= handle
;
443 memset(&open_arg
, 0, sizeof(open_arg
));
444 open_arg
.name
= whandle
->handle
;
445 if (drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_OPEN
, &open_arg
)) {
450 res
->bo_handle
= open_arg
.handle
;
454 memset(&info_arg
, 0, sizeof(info_arg
));
455 info_arg
.bo_handle
= res
->bo_handle
;
457 if (drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_RESOURCE_INFO
, &info_arg
)) {
464 res
->res_handle
= info_arg
.res_handle
;
466 res
->size
= info_arg
.size
;
467 res
->stride
= info_arg
.stride
;
468 pipe_reference_init(&res
->reference
, 1);
469 res
->num_cs_references
= 0;
472 util_hash_table_set(qdws
->bo_handles
, (void *)(uintptr_t)handle
, res
);
475 mtx_unlock(&qdws
->bo_handles_mutex
);
479 static boolean
virgl_drm_winsys_resource_get_handle(struct virgl_winsys
*qws
,
480 struct virgl_hw_res
*res
,
482 struct winsys_handle
*whandle
)
484 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
485 struct drm_gem_flink flink
;
490 if (whandle
->type
== WINSYS_HANDLE_TYPE_SHARED
) {
492 memset(&flink
, 0, sizeof(flink
));
493 flink
.handle
= res
->bo_handle
;
495 if (drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_FLINK
, &flink
)) {
499 res
->flink
= flink
.name
;
501 mtx_lock(&qdws
->bo_handles_mutex
);
502 util_hash_table_set(qdws
->bo_names
, (void *)(uintptr_t)res
->flink
, res
);
503 mtx_unlock(&qdws
->bo_handles_mutex
);
505 whandle
->handle
= res
->flink
;
506 } else if (whandle
->type
== WINSYS_HANDLE_TYPE_KMS
) {
507 whandle
->handle
= res
->bo_handle
;
508 } else if (whandle
->type
== WINSYS_HANDLE_TYPE_FD
) {
509 if (drmPrimeHandleToFD(qdws
->fd
, res
->bo_handle
, DRM_CLOEXEC
, (int*)&whandle
->handle
))
511 mtx_lock(&qdws
->bo_handles_mutex
);
512 util_hash_table_set(qdws
->bo_handles
, (void *)(uintptr_t)res
->bo_handle
, res
);
513 mtx_unlock(&qdws
->bo_handles_mutex
);
515 whandle
->stride
= stride
;
519 static void virgl_drm_winsys_resource_unref(struct virgl_winsys
*qws
,
520 struct virgl_hw_res
*hres
)
522 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
524 virgl_drm_resource_reference(qdws
, &hres
, NULL
);
527 static void *virgl_drm_resource_map(struct virgl_winsys
*qws
,
528 struct virgl_hw_res
*res
)
530 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
531 struct drm_virtgpu_map mmap_arg
;
537 memset(&mmap_arg
, 0, sizeof(mmap_arg
));
538 mmap_arg
.handle
= res
->bo_handle
;
539 if (drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_MAP
, &mmap_arg
))
542 ptr
= os_mmap(0, res
->size
, PROT_READ
|PROT_WRITE
, MAP_SHARED
,
543 qdws
->fd
, mmap_arg
.offset
);
544 if (ptr
== MAP_FAILED
)
552 static void virgl_drm_resource_wait(struct virgl_winsys
*qws
,
553 struct virgl_hw_res
*res
)
555 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
556 struct drm_virtgpu_3d_wait waitcmd
;
559 memset(&waitcmd
, 0, sizeof(waitcmd
));
560 waitcmd
.handle
= res
->bo_handle
;
562 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_WAIT
, &waitcmd
);
567 static boolean
virgl_drm_lookup_res(struct virgl_drm_cmd_buf
*cbuf
,
568 struct virgl_hw_res
*res
)
570 unsigned hash
= res
->res_handle
& (sizeof(cbuf
->is_handle_added
)-1);
573 if (cbuf
->is_handle_added
[hash
]) {
574 i
= cbuf
->reloc_indices_hashlist
[hash
];
575 if (cbuf
->res_bo
[i
] == res
)
578 for (i
= 0; i
< cbuf
->cres
; i
++) {
579 if (cbuf
->res_bo
[i
] == res
) {
580 cbuf
->reloc_indices_hashlist
[hash
] = i
;
588 static void virgl_drm_add_res(struct virgl_drm_winsys
*qdws
,
589 struct virgl_drm_cmd_buf
*cbuf
,
590 struct virgl_hw_res
*res
)
592 unsigned hash
= res
->res_handle
& (sizeof(cbuf
->is_handle_added
)-1);
594 if (cbuf
->cres
>= cbuf
->nres
) {
595 unsigned new_nres
= cbuf
->nres
+ 256;
596 void *new_ptr
= REALLOC(cbuf
->res_bo
,
597 cbuf
->nres
* sizeof(struct virgl_hw_buf
*),
598 new_nres
* sizeof(struct virgl_hw_buf
*));
600 fprintf(stderr
,"failure to add relocation %d, %d\n", cbuf
->cres
, new_nres
);
603 cbuf
->res_bo
= new_ptr
;
605 new_ptr
= REALLOC(cbuf
->res_hlist
,
606 cbuf
->nres
* sizeof(uint32_t),
607 new_nres
* sizeof(uint32_t));
609 fprintf(stderr
,"failure to add hlist relocation %d, %d\n", cbuf
->cres
, cbuf
->nres
);
612 cbuf
->res_hlist
= new_ptr
;
613 cbuf
->nres
= new_nres
;
616 cbuf
->res_bo
[cbuf
->cres
] = NULL
;
617 virgl_drm_resource_reference(qdws
, &cbuf
->res_bo
[cbuf
->cres
], res
);
618 cbuf
->res_hlist
[cbuf
->cres
] = res
->bo_handle
;
619 cbuf
->is_handle_added
[hash
] = TRUE
;
621 cbuf
->reloc_indices_hashlist
[hash
] = cbuf
->cres
;
622 p_atomic_inc(&res
->num_cs_references
);
626 static void virgl_drm_release_all_res(struct virgl_drm_winsys
*qdws
,
627 struct virgl_drm_cmd_buf
*cbuf
)
631 for (i
= 0; i
< cbuf
->cres
; i
++) {
632 p_atomic_dec(&cbuf
->res_bo
[i
]->num_cs_references
);
633 virgl_drm_resource_reference(qdws
, &cbuf
->res_bo
[i
], NULL
);
638 static void virgl_drm_emit_res(struct virgl_winsys
*qws
,
639 struct virgl_cmd_buf
*_cbuf
,
640 struct virgl_hw_res
*res
, boolean write_buf
)
642 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
643 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
644 boolean already_in_list
= virgl_drm_lookup_res(cbuf
, res
);
647 cbuf
->base
.buf
[cbuf
->base
.cdw
++] = res
->res_handle
;
649 if (!already_in_list
)
650 virgl_drm_add_res(qdws
, cbuf
, res
);
653 static boolean
virgl_drm_res_is_ref(struct virgl_winsys
*qws
,
654 struct virgl_cmd_buf
*_cbuf
,
655 struct virgl_hw_res
*res
)
657 if (!p_atomic_read(&res
->num_cs_references
))
663 static struct virgl_cmd_buf
*virgl_drm_cmd_buf_create(struct virgl_winsys
*qws
,
666 struct virgl_drm_cmd_buf
*cbuf
;
668 cbuf
= CALLOC_STRUCT(virgl_drm_cmd_buf
);
675 cbuf
->res_bo
= CALLOC(cbuf
->nres
, sizeof(struct virgl_hw_buf
*));
680 cbuf
->res_hlist
= MALLOC(cbuf
->nres
* sizeof(uint32_t));
681 if (!cbuf
->res_hlist
) {
687 cbuf
->buf
= CALLOC(size
, sizeof(uint32_t));
689 FREE(cbuf
->res_hlist
);
695 cbuf
->in_fence_fd
= -1;
696 cbuf
->base
.buf
= cbuf
->buf
;
700 static void virgl_drm_cmd_buf_destroy(struct virgl_cmd_buf
*_cbuf
)
702 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
704 virgl_drm_release_all_res(virgl_drm_winsys(cbuf
->ws
), cbuf
);
705 FREE(cbuf
->res_hlist
);
712 static int virgl_drm_winsys_submit_cmd(struct virgl_winsys
*qws
,
713 struct virgl_cmd_buf
*_cbuf
,
716 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
717 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
718 struct drm_virtgpu_execbuffer eb
;
721 if (cbuf
->base
.cdw
== 0)
724 memset(&eb
, 0, sizeof(struct drm_virtgpu_execbuffer
));
725 eb
.command
= (unsigned long)(void*)cbuf
->buf
;
726 eb
.size
= cbuf
->base
.cdw
* 4;
727 eb
.num_bo_handles
= cbuf
->cres
;
728 eb
.bo_handles
= (unsigned long)(void *)cbuf
->res_hlist
;
731 if (qws
->supports_fences
) {
732 if (cbuf
->in_fence_fd
>= 0) {
733 eb
.flags
|= VIRTGPU_EXECBUF_FENCE_FD_IN
;
734 eb
.fence_fd
= cbuf
->in_fence_fd
;
737 if (out_fence_fd
!= NULL
)
738 eb
.flags
|= VIRTGPU_EXECBUF_FENCE_FD_OUT
;
740 assert(cbuf
->in_fence_fd
< 0);
741 assert(out_fence_fd
== NULL
);
744 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_EXECBUFFER
, &eb
);
746 fprintf(stderr
,"got error from kernel - expect bad rendering %d\n", errno
);
749 if (qws
->supports_fences
) {
750 if (cbuf
->in_fence_fd
>= 0) {
751 close(cbuf
->in_fence_fd
);
752 cbuf
->in_fence_fd
= -1;
756 if (out_fence_fd
!= NULL
)
757 *out_fence_fd
= eb
.fence_fd
;
759 virgl_drm_release_all_res(qdws
, cbuf
);
761 memset(cbuf
->is_handle_added
, 0, sizeof(cbuf
->is_handle_added
));
765 static int virgl_drm_get_caps(struct virgl_winsys
*vws
,
766 struct virgl_drm_caps
*caps
)
768 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
769 struct drm_virtgpu_get_caps args
;
772 virgl_ws_fill_new_caps_defaults(caps
);
774 memset(&args
, 0, sizeof(args
));
775 if (vdws
->has_capset_query_fix
) {
776 /* if we have the query fix - try and get cap set id 2 first */
778 args
.size
= sizeof(union virgl_caps
);
781 args
.size
= sizeof(struct virgl_caps_v1
);
783 args
.addr
= (unsigned long)&caps
->caps
;
785 ret
= drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_GET_CAPS
, &args
);
786 if (ret
== -1 && errno
== EINVAL
) {
789 args
.size
= sizeof(struct virgl_caps_v1
);
790 ret
= drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_GET_CAPS
, &args
);
797 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
799 static unsigned handle_hash(void *key
)
801 return PTR_TO_UINT(key
);
804 static int handle_compare(void *key1
, void *key2
)
806 return PTR_TO_UINT(key1
) != PTR_TO_UINT(key2
);
809 static struct pipe_fence_handle
*
810 virgl_cs_create_fence(struct virgl_winsys
*vws
, int fd
)
812 struct virgl_hw_res
*res
;
814 res
= virgl_drm_winsys_resource_cache_create(vws
,
816 PIPE_FORMAT_R8_UNORM
,
818 8, 1, 1, 0, 0, 0, 8);
821 return (struct pipe_fence_handle
*)res
;
824 static bool virgl_fence_wait(struct virgl_winsys
*vws
,
825 struct pipe_fence_handle
*fence
,
828 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
829 struct virgl_hw_res
*res
= virgl_hw_res(fence
);
832 return !virgl_drm_resource_is_busy(vdws
, res
);
834 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
835 int64_t start_time
= os_time_get();
837 while (virgl_drm_resource_is_busy(vdws
, res
)) {
838 if (os_time_get() - start_time
>= timeout
)
844 virgl_drm_resource_wait(vws
, res
);
846 if (res
->fence_fd
!= -1) {
847 int ret
= sync_wait(res
->fence_fd
, timeout
/ 1000000);
854 static void virgl_fence_reference(struct virgl_winsys
*vws
,
855 struct pipe_fence_handle
**dst
,
856 struct pipe_fence_handle
*src
)
858 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
859 virgl_drm_resource_reference(vdws
, (struct virgl_hw_res
**)dst
,
863 static void virgl_fence_server_sync(struct virgl_winsys
*vws
,
864 struct virgl_cmd_buf
*_cbuf
,
865 struct pipe_fence_handle
*fence
)
867 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
868 struct virgl_hw_res
*hw_res
= virgl_hw_res(fence
);
870 /* if not an external fence, then nothing more to do without preemption: */
871 if (hw_res
->fence_fd
== -1)
874 sync_accumulate("virgl", &cbuf
->in_fence_fd
, hw_res
->fence_fd
);
877 static int virgl_fence_get_fd(struct virgl_winsys
*vws
,
878 struct pipe_fence_handle
*fence
)
880 struct virgl_hw_res
*hw_res
= virgl_hw_res(fence
);
882 return dup(hw_res
->fence_fd
);
885 static int virgl_drm_get_version(int fd
)
888 drmVersionPtr version
;
890 version
= drmGetVersion(fd
);
894 else if (version
->version_major
!= 0)
897 ret
= version
->version_minor
;
899 drmFreeVersion(version
);
904 static struct virgl_winsys
*
905 virgl_drm_winsys_create(int drmFD
)
907 struct virgl_drm_winsys
*qdws
;
911 struct drm_virtgpu_getparam getparam
= {0};
913 getparam
.param
= VIRTGPU_PARAM_3D_FEATURES
;
914 getparam
.value
= (uint64_t)(uintptr_t)&gl
;
915 ret
= drmIoctl(drmFD
, DRM_IOCTL_VIRTGPU_GETPARAM
, &getparam
);
919 drm_version
= virgl_drm_get_version(drmFD
);
923 qdws
= CALLOC_STRUCT(virgl_drm_winsys
);
928 qdws
->num_delayed
= 0;
929 qdws
->usecs
= 1000000;
930 LIST_INITHEAD(&qdws
->delayed
);
931 (void) mtx_init(&qdws
->mutex
, mtx_plain
);
932 (void) mtx_init(&qdws
->bo_handles_mutex
, mtx_plain
);
933 qdws
->bo_handles
= util_hash_table_create(handle_hash
, handle_compare
);
934 qdws
->bo_names
= util_hash_table_create(handle_hash
, handle_compare
);
935 qdws
->base
.destroy
= virgl_drm_winsys_destroy
;
937 qdws
->base
.transfer_put
= virgl_bo_transfer_put
;
938 qdws
->base
.transfer_get
= virgl_bo_transfer_get
;
939 qdws
->base
.resource_create
= virgl_drm_winsys_resource_cache_create
;
940 qdws
->base
.resource_unref
= virgl_drm_winsys_resource_unref
;
941 qdws
->base
.resource_create_from_handle
= virgl_drm_winsys_resource_create_handle
;
942 qdws
->base
.resource_get_handle
= virgl_drm_winsys_resource_get_handle
;
943 qdws
->base
.resource_map
= virgl_drm_resource_map
;
944 qdws
->base
.resource_wait
= virgl_drm_resource_wait
;
945 qdws
->base
.cmd_buf_create
= virgl_drm_cmd_buf_create
;
946 qdws
->base
.cmd_buf_destroy
= virgl_drm_cmd_buf_destroy
;
947 qdws
->base
.submit_cmd
= virgl_drm_winsys_submit_cmd
;
948 qdws
->base
.emit_res
= virgl_drm_emit_res
;
949 qdws
->base
.res_is_referenced
= virgl_drm_res_is_ref
;
951 qdws
->base
.cs_create_fence
= virgl_cs_create_fence
;
952 qdws
->base
.fence_wait
= virgl_fence_wait
;
953 qdws
->base
.fence_reference
= virgl_fence_reference
;
954 qdws
->base
.fence_server_sync
= virgl_fence_server_sync
;
955 qdws
->base
.fence_get_fd
= virgl_fence_get_fd
;
956 qdws
->base
.supports_fences
= drm_version
>= VIRGL_DRM_VERSION_FENCE_FD
;
957 qdws
->base
.supports_encoded_transfers
= 1;
959 qdws
->base
.get_caps
= virgl_drm_get_caps
;
962 getparam
.param
= VIRTGPU_PARAM_CAPSET_QUERY_FIX
;
963 getparam
.value
= (uint64_t)(uintptr_t)&value
;
964 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_GETPARAM
, &getparam
);
967 qdws
->has_capset_query_fix
= true;
974 static struct util_hash_table
*fd_tab
= NULL
;
975 static mtx_t virgl_screen_mutex
= _MTX_INITIALIZER_NP
;
978 virgl_drm_screen_destroy(struct pipe_screen
*pscreen
)
980 struct virgl_screen
*screen
= virgl_screen(pscreen
);
983 mtx_lock(&virgl_screen_mutex
);
984 destroy
= --screen
->refcnt
== 0;
986 int fd
= virgl_drm_winsys(screen
->vws
)->fd
;
987 util_hash_table_remove(fd_tab
, intptr_to_pointer(fd
));
990 mtx_unlock(&virgl_screen_mutex
);
993 pscreen
->destroy
= screen
->winsys_priv
;
994 pscreen
->destroy(pscreen
);
998 static unsigned hash_fd(void *key
)
1000 int fd
= pointer_to_intptr(key
);
1004 return stat
.st_dev
^ stat
.st_ino
^ stat
.st_rdev
;
1007 static int compare_fd(void *key1
, void *key2
)
1009 int fd1
= pointer_to_intptr(key1
);
1010 int fd2
= pointer_to_intptr(key2
);
1011 struct stat stat1
, stat2
;
1015 return stat1
.st_dev
!= stat2
.st_dev
||
1016 stat1
.st_ino
!= stat2
.st_ino
||
1017 stat1
.st_rdev
!= stat2
.st_rdev
;
1020 struct pipe_screen
*
1021 virgl_drm_screen_create(int fd
)
1023 struct pipe_screen
*pscreen
= NULL
;
1025 mtx_lock(&virgl_screen_mutex
);
1027 fd_tab
= util_hash_table_create(hash_fd
, compare_fd
);
1032 pscreen
= util_hash_table_get(fd_tab
, intptr_to_pointer(fd
));
1034 virgl_screen(pscreen
)->refcnt
++;
1036 struct virgl_winsys
*vws
;
1037 int dup_fd
= fcntl(fd
, F_DUPFD_CLOEXEC
, 3);
1039 vws
= virgl_drm_winsys_create(dup_fd
);
1045 pscreen
= virgl_create_screen(vws
);
1047 util_hash_table_set(fd_tab
, intptr_to_pointer(dup_fd
), pscreen
);
1049 /* Bit of a hack, to avoid circular linkage dependency,
1050 * ie. pipe driver having to call in to winsys, we
1051 * override the pipe drivers screen->destroy():
1053 virgl_screen(pscreen
)->winsys_priv
= pscreen
->destroy
;
1054 pscreen
->destroy
= virgl_drm_screen_destroy
;
1059 mtx_unlock(&virgl_screen_mutex
);