src/gallium/winsys/virgl/drm/virgl_drm_winsys.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include <errno.h>
  25 #include <fcntl.h>
  26 #include <stdio.h>
  27 #include <sys/ioctl.h>
  28 #include <sys/stat.h>
  29
  30 #include "os/os_mman.h"
  31 #include "util/os_time.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_hash_table.h"
  35 #include "util/u_inlines.h"
  36 #include "state_tracker/drm_driver.h"
  37 #include "virgl/virgl_screen.h"
  38 #include "virgl/virgl_public.h"
  39
  40 #include <xf86drm.h>
  41 #include "virtgpu_drm.h"
  42
  43 #include "virgl_drm_winsys.h"
  44 #include "virgl_drm_public.h"
  45
  46 static inline boolean can_cache_resource(struct virgl_hw_res *res)
  47 {
  48    return res->cacheable == TRUE;
  49 }
  50
  51 static void virgl_hw_res_destroy(struct virgl_drm_winsys *qdws,
  52                                  struct virgl_hw_res *res)
  53 {
  54       struct drm_gem_close args;
  55
  56       if (res->flinked) {
  57          mtx_lock(&qdws->bo_handles_mutex);
  58          util_hash_table_remove(qdws->bo_names,
  59                                 (void *)(uintptr_t)res->flink);
  60          mtx_unlock(&qdws->bo_handles_mutex);
  61       }
  62
  63       if (res->bo_handle) {
  64          mtx_lock(&qdws->bo_handles_mutex);
  65          util_hash_table_remove(qdws->bo_handles,
  66                                 (void *)(uintptr_t)res->bo_handle);
  67          mtx_unlock(&qdws->bo_handles_mutex);
  68       }
  69
  70       if (res->ptr)
  71          os_munmap(res->ptr, res->size);
  72
  73       memset(&args, 0, sizeof(args));
  74       args.handle = res->bo_handle;
  75       drmIoctl(qdws->fd, DRM_IOCTL_GEM_CLOSE, &args);
  76       FREE(res);
  77 }
  78
  79 static boolean virgl_drm_resource_is_busy(struct virgl_drm_winsys *qdws,
  80                                           struct virgl_hw_res *res)
  81 {
  82    struct drm_virtgpu_3d_wait waitcmd;
  83    int ret;
  84
  85    memset(&waitcmd, 0, sizeof(waitcmd));
  86    waitcmd.handle = res->bo_handle;
  87    waitcmd.flags = VIRTGPU_WAIT_NOWAIT;
  88
  89    ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
  90    if (ret && errno == EBUSY)
  91       return TRUE;
  92    return FALSE;
  93 }
  94
  95 static void
  96 virgl_cache_flush(struct virgl_drm_winsys *qdws)
  97 {
  98    struct list_head *curr, *next;
  99    struct virgl_hw_res *res;
 100
 101    mtx_lock(&qdws->mutex);
 102    curr = qdws->delayed.next;
 103    next = curr->next;
 104
 105    while (curr != &qdws->delayed) {
 106       res = LIST_ENTRY(struct virgl_hw_res, curr, head);
 107       LIST_DEL(&res->head);
 108       virgl_hw_res_destroy(qdws, res);
 109       curr = next;
 110       next = curr->next;
 111    }
 112    mtx_unlock(&qdws->mutex);
 113 }
 114 static void
 115 virgl_drm_winsys_destroy(struct virgl_winsys *qws)
 116 {
 117    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 118
 119    virgl_cache_flush(qdws);
 120
 121    util_hash_table_destroy(qdws->bo_handles);
 122    util_hash_table_destroy(qdws->bo_names);
 123    mtx_destroy(&qdws->bo_handles_mutex);
 124    mtx_destroy(&qdws->mutex);
 125
 126    FREE(qdws);
 127 }
 128
 129 static void
 130 virgl_cache_list_check_free(struct virgl_drm_winsys *qdws)
 131 {
 132    struct list_head *curr, *next;
 133    struct virgl_hw_res *res;
 134    int64_t now;
 135
 136    now = os_time_get();
 137    curr = qdws->delayed.next;
 138    next = curr->next;
 139    while (curr != &qdws->delayed) {
 140       res = LIST_ENTRY(struct virgl_hw_res, curr, head);
 141       if (!os_time_timeout(res->start, res->end, now))
 142          break;
 143
 144       LIST_DEL(&res->head);
 145       virgl_hw_res_destroy(qdws, res);
 146       curr = next;
 147       next = curr->next;
 148    }
 149 }
 150
 151 static void virgl_drm_resource_reference(struct virgl_drm_winsys *qdws,
 152                                        struct virgl_hw_res **dres,
 153                                        struct virgl_hw_res *sres)
 154 {
 155    struct virgl_hw_res *old = *dres;
 156    if (pipe_reference(&(*dres)->reference, &sres->reference)) {
 157
 158       if (!can_cache_resource(old)) {
 159          virgl_hw_res_destroy(qdws, old);
 160       } else {
 161          mtx_lock(&qdws->mutex);
 162          virgl_cache_list_check_free(qdws);
 163
 164          old->start = os_time_get();
 165          old->end = old->start + qdws->usecs;
 166          LIST_ADDTAIL(&old->head, &qdws->delayed);
 167          qdws->num_delayed++;
 168          mtx_unlock(&qdws->mutex);
 169       }
 170    }
 171    *dres = sres;
 172 }
 173
 174 static struct virgl_hw_res *
 175 virgl_drm_winsys_resource_create(struct virgl_winsys *qws,
 176                                  enum pipe_texture_target target,
 177                                  uint32_t format,
 178                                  uint32_t bind,
 179                                  uint32_t width,
 180                                  uint32_t height,
 181                                  uint32_t depth,
 182                                  uint32_t array_size,
 183                                  uint32_t last_level,
 184                                  uint32_t nr_samples,
 185                                  uint32_t size)
 186 {
 187    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 188    struct drm_virtgpu_resource_create createcmd;
 189    int ret;
 190    struct virgl_hw_res *res;
 191    uint32_t stride = width * util_format_get_blocksize(format);
 192
 193    res = CALLOC_STRUCT(virgl_hw_res);
 194    if (!res)
 195       return NULL;
 196
 197    memset(&createcmd, 0, sizeof(createcmd));
 198    createcmd.target = target;
 199    createcmd.format = format;
 200    createcmd.bind = bind;
 201    createcmd.width = width;
 202    createcmd.height = height;
 203    createcmd.depth = depth;
 204    createcmd.array_size = array_size;
 205    createcmd.last_level = last_level;
 206    createcmd.nr_samples = nr_samples;
 207    createcmd.stride = stride;
 208    createcmd.size = size;
 209
 210    ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &createcmd);
 211    if (ret != 0) {
 212       FREE(res);
 213       return NULL;
 214    }
 215
 216    res->bind = bind;
 217    res->format = format;
 218
 219    res->res_handle = createcmd.res_handle;
 220    res->bo_handle = createcmd.bo_handle;
 221    res->size = size;
 222    res->stride = stride;
 223    pipe_reference_init(&res->reference, 1);
 224    res->num_cs_references = 0;
 225    return res;
 226 }
 227
 228 static inline int virgl_is_res_compat(struct virgl_drm_winsys *qdws,
 229                                       struct virgl_hw_res *res,
 230                                       uint32_t size, uint32_t bind,
 231                                       uint32_t format)
 232 {
 233    if (res->bind != bind)
 234       return 0;
 235    if (res->format != format)
 236       return 0;
 237    if (res->size < size)
 238       return 0;
 239    if (res->size > size * 2)
 240       return 0;
 241
 242    if (virgl_drm_resource_is_busy(qdws, res)) {
 243       return -1;
 244    }
 245
 246    return 1;
 247 }
 248
 249 static int
 250 virgl_bo_transfer_put(struct virgl_winsys *vws,
 251                       struct virgl_hw_res *res,
 252                       const struct pipe_box *box,
 253                       uint32_t buf_offset, uint32_t level)
 254 {
 255    struct virgl_drm_winsys *vdws = virgl_drm_winsys(vws);
 256    struct drm_virtgpu_3d_transfer_to_host tohostcmd;
 257
 258    memset(&tohostcmd, 0, sizeof(tohostcmd));
 259    tohostcmd.bo_handle = res->bo_handle;
 260    tohostcmd.box.x = box->x;
 261    tohostcmd.box.y = box->y;
 262    tohostcmd.box.z = box->z;
 263    tohostcmd.box.w = box->width;
 264    tohostcmd.box.h = box->height;
 265    tohostcmd.box.d = box->depth;
 266    tohostcmd.offset = buf_offset;
 267    tohostcmd.level = level;
 268    return drmIoctl(vdws->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &tohostcmd);
 269 }
 270
 271 static int
 272 virgl_bo_transfer_get(struct virgl_winsys *vws,
 273                       struct virgl_hw_res *res,
 274                       const struct pipe_box *box,
 275                       uint32_t buf_offset, uint32_t level)
 276 {
 277    struct virgl_drm_winsys *vdws = virgl_drm_winsys(vws);
 278    struct drm_virtgpu_3d_transfer_from_host fromhostcmd;
 279
 280    memset(&fromhostcmd, 0, sizeof(fromhostcmd));
 281    fromhostcmd.bo_handle = res->bo_handle;
 282    fromhostcmd.level = level;
 283    fromhostcmd.offset = buf_offset;
 284    fromhostcmd.box.x = box->x;
 285    fromhostcmd.box.y = box->y;
 286    fromhostcmd.box.z = box->z;
 287    fromhostcmd.box.w = box->width;
 288    fromhostcmd.box.h = box->height;
 289    fromhostcmd.box.d = box->depth;
 290    return drmIoctl(vdws->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &fromhostcmd);
 291 }
 292
 293 static struct virgl_hw_res *
 294 virgl_drm_winsys_resource_cache_create(struct virgl_winsys *qws,
 295                                        enum pipe_texture_target target,
 296                                        uint32_t format,
 297                                        uint32_t bind,
 298                                        uint32_t width,
 299                                        uint32_t height,
 300                                        uint32_t depth,
 301                                        uint32_t array_size,
 302                                        uint32_t last_level,
 303                                        uint32_t nr_samples,
 304                                        uint32_t size)
 305 {
 306    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 307    struct virgl_hw_res *res, *curr_res;
 308    struct list_head *curr, *next;
 309    int64_t now;
 310    int ret;
 311
 312    /* only store binds for vertex/index/const buffers */
 313    if (bind != VIRGL_BIND_CONSTANT_BUFFER && bind != VIRGL_BIND_INDEX_BUFFER &&
 314        bind != VIRGL_BIND_VERTEX_BUFFER && bind != VIRGL_BIND_CUSTOM)
 315       goto alloc;
 316
 317    mtx_lock(&qdws->mutex);
 318
 319    res = NULL;
 320    curr = qdws->delayed.next;
 321    next = curr->next;
 322
 323    now = os_time_get();
 324    while (curr != &qdws->delayed) {
 325       curr_res = LIST_ENTRY(struct virgl_hw_res, curr, head);
 326
 327       if (!res && ((ret = virgl_is_res_compat(qdws, curr_res, size, bind, format)) > 0))
 328          res = curr_res;
 329       else if (os_time_timeout(curr_res->start, curr_res->end, now)) {
 330          LIST_DEL(&curr_res->head);
 331          virgl_hw_res_destroy(qdws, curr_res);
 332       } else
 333          break;
 334
 335       if (ret == -1)
 336          break;
 337
 338       curr = next;
 339       next = curr->next;
 340    }
 341
 342    if (!res && ret != -1) {
 343       while (curr != &qdws->delayed) {
 344          curr_res = LIST_ENTRY(struct virgl_hw_res, curr, head);
 345          ret = virgl_is_res_compat(qdws, curr_res, size, bind, format);
 346          if (ret > 0) {
 347             res = curr_res;
 348             break;
 349          }
 350          if (ret == -1)
 351             break;
 352          curr = next;
 353          next = curr->next;
 354       }
 355    }
 356
 357    if (res) {
 358       LIST_DEL(&res->head);
 359       --qdws->num_delayed;
 360       mtx_unlock(&qdws->mutex);
 361       pipe_reference_init(&res->reference, 1);
 362       return res;
 363    }
 364
 365    mtx_unlock(&qdws->mutex);
 366
 367 alloc:
 368    res = virgl_drm_winsys_resource_create(qws, target, format, bind,
 369                                            width, height, depth, array_size,
 370                                            last_level, nr_samples, size);
 371    if (bind == VIRGL_BIND_CONSTANT_BUFFER || bind == VIRGL_BIND_INDEX_BUFFER ||
 372        bind == VIRGL_BIND_VERTEX_BUFFER)
 373       res->cacheable = TRUE;
 374    return res;
 375 }
 376
 377 static struct virgl_hw_res *
 378 virgl_drm_winsys_resource_create_handle(struct virgl_winsys *qws,
 379                                         struct winsys_handle *whandle)
 380 {
 381    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 382    struct drm_gem_open open_arg = {};
 383    struct drm_virtgpu_resource_info info_arg = {};
 384    struct virgl_hw_res *res;
 385    uint32_t handle = whandle->handle;
 386
 387    if (whandle->offset != 0) {
 388       fprintf(stderr, "attempt to import unsupported winsys offset %u\n",
 389               whandle->offset);
 390       return NULL;
 391    }
 392
 393    mtx_lock(&qdws->bo_handles_mutex);
 394
 395    if (whandle->type == WINSYS_HANDLE_TYPE_SHARED) {
 396       res = util_hash_table_get(qdws->bo_names, (void*)(uintptr_t)handle);
 397       if (res) {
 398          struct virgl_hw_res *r = NULL;
 399          virgl_drm_resource_reference(qdws, &r, res);
 400          goto done;
 401       }
 402    }
 403
 404    if (whandle->type == WINSYS_HANDLE_TYPE_FD) {
 405       int r;
 406       r = drmPrimeFDToHandle(qdws->fd, whandle->handle, &handle);
 407       if (r) {
 408          res = NULL;
 409          goto done;
 410       }
 411    }
 412
 413    res = util_hash_table_get(qdws->bo_handles, (void*)(uintptr_t)handle);
 414    if (res) {
 415       struct virgl_hw_res *r = NULL;
 416       virgl_drm_resource_reference(qdws, &r, res);
 417       goto done;
 418    }
 419
 420    res = CALLOC_STRUCT(virgl_hw_res);
 421    if (!res)
 422       goto done;
 423
 424    if (whandle->type == WINSYS_HANDLE_TYPE_FD) {
 425       res->bo_handle = handle;
 426    } else {
 427       memset(&open_arg, 0, sizeof(open_arg));
 428       open_arg.name = whandle->handle;
 429       if (drmIoctl(qdws->fd, DRM_IOCTL_GEM_OPEN, &open_arg)) {
 430          FREE(res);
 431          res = NULL;
 432          goto done;
 433       }
 434       res->bo_handle = open_arg.handle;
 435    }
 436    res->name = handle;
 437
 438    memset(&info_arg, 0, sizeof(info_arg));
 439    info_arg.bo_handle = res->bo_handle;
 440
 441    if (drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_RESOURCE_INFO, &info_arg)) {
 442       /* close */
 443       FREE(res);
 444       res = NULL;
 445       goto done;
 446    }
 447
 448    res->res_handle = info_arg.res_handle;
 449
 450    res->size = info_arg.size;
 451    res->stride = info_arg.stride;
 452    pipe_reference_init(&res->reference, 1);
 453    res->num_cs_references = 0;
 454
 455    util_hash_table_set(qdws->bo_handles, (void *)(uintptr_t)handle, res);
 456
 457 done:
 458    mtx_unlock(&qdws->bo_handles_mutex);
 459    return res;
 460 }
 461
 462 static boolean virgl_drm_winsys_resource_get_handle(struct virgl_winsys *qws,
 463                                                     struct virgl_hw_res *res,
 464                                                     uint32_t stride,
 465                                                     struct winsys_handle *whandle)
 466  {
 467    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 468    struct drm_gem_flink flink;
 469
 470    if (!res)
 471        return FALSE;
 472
 473    if (whandle->type == WINSYS_HANDLE_TYPE_SHARED) {
 474       if (!res->flinked) {
 475          memset(&flink, 0, sizeof(flink));
 476          flink.handle = res->bo_handle;
 477
 478          if (drmIoctl(qdws->fd, DRM_IOCTL_GEM_FLINK, &flink)) {
 479             return FALSE;
 480          }
 481          res->flinked = TRUE;
 482          res->flink = flink.name;
 483
 484          mtx_lock(&qdws->bo_handles_mutex);
 485          util_hash_table_set(qdws->bo_names, (void *)(uintptr_t)res->flink, res);
 486          mtx_unlock(&qdws->bo_handles_mutex);
 487       }
 488       whandle->handle = res->flink;
 489    } else if (whandle->type == WINSYS_HANDLE_TYPE_KMS) {
 490       whandle->handle = res->bo_handle;
 491    } else if (whandle->type == WINSYS_HANDLE_TYPE_FD) {
 492       if (drmPrimeHandleToFD(qdws->fd, res->bo_handle, DRM_CLOEXEC, (int*)&whandle->handle))
 493             return FALSE;
 494       mtx_lock(&qdws->bo_handles_mutex);
 495       util_hash_table_set(qdws->bo_handles, (void *)(uintptr_t)res->bo_handle, res);
 496       mtx_unlock(&qdws->bo_handles_mutex);
 497    }
 498    whandle->stride = stride;
 499    return TRUE;
 500 }
 501
 502 static void virgl_drm_winsys_resource_unref(struct virgl_winsys *qws,
 503                                             struct virgl_hw_res *hres)
 504 {
 505    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 506
 507    virgl_drm_resource_reference(qdws, &hres, NULL);
 508 }
 509
 510 static void *virgl_drm_resource_map(struct virgl_winsys *qws,
 511                                     struct virgl_hw_res *res)
 512 {
 513    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 514    struct drm_virtgpu_map mmap_arg;
 515    void *ptr;
 516
 517    if (res->ptr)
 518       return res->ptr;
 519
 520    memset(&mmap_arg, 0, sizeof(mmap_arg));
 521    mmap_arg.handle = res->bo_handle;
 522    if (drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_MAP, &mmap_arg))
 523       return NULL;
 524
 525    ptr = os_mmap(0, res->size, PROT_READ|PROT_WRITE, MAP_SHARED,
 526                  qdws->fd, mmap_arg.offset);
 527    if (ptr == MAP_FAILED)
 528       return NULL;
 529
 530    res->ptr = ptr;
 531    return ptr;
 532
 533 }
 534
 535 static void virgl_drm_resource_wait(struct virgl_winsys *qws,
 536                                     struct virgl_hw_res *res)
 537 {
 538    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 539    struct drm_virtgpu_3d_wait waitcmd;
 540    int ret;
 541
 542    memset(&waitcmd, 0, sizeof(waitcmd));
 543    waitcmd.handle = res->bo_handle;
 544  again:
 545    ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
 546    if (ret == -EAGAIN)
 547       goto again;
 548 }
 549
 550 static struct virgl_cmd_buf *virgl_drm_cmd_buf_create(struct virgl_winsys *qws)
 551 {
 552    struct virgl_drm_cmd_buf *cbuf;
 553
 554    cbuf = CALLOC_STRUCT(virgl_drm_cmd_buf);
 555    if (!cbuf)
 556       return NULL;
 557
 558    cbuf->ws = qws;
 559
 560    cbuf->nres = 512;
 561    cbuf->res_bo = CALLOC(cbuf->nres, sizeof(struct virgl_hw_buf*));
 562    if (!cbuf->res_bo) {
 563       FREE(cbuf);
 564       return NULL;
 565    }
 566    cbuf->res_hlist = MALLOC(cbuf->nres * sizeof(uint32_t));
 567    if (!cbuf->res_hlist) {
 568       FREE(cbuf->res_bo);
 569       FREE(cbuf);
 570       return NULL;
 571    }
 572
 573    cbuf->base.buf = cbuf->buf;
 574    return &cbuf->base;
 575 }
 576
 577 static void virgl_drm_cmd_buf_destroy(struct virgl_cmd_buf *_cbuf)
 578 {
 579    struct virgl_drm_cmd_buf *cbuf = virgl_drm_cmd_buf(_cbuf);
 580
 581    FREE(cbuf->res_hlist);
 582    FREE(cbuf->res_bo);
 583    FREE(cbuf);
 584
 585 }
 586
 587 static boolean virgl_drm_lookup_res(struct virgl_drm_cmd_buf *cbuf,
 588                                     struct virgl_hw_res *res)
 589 {
 590    unsigned hash = res->res_handle & (sizeof(cbuf->is_handle_added)-1);
 591    int i;
 592
 593    if (cbuf->is_handle_added[hash]) {
 594       i = cbuf->reloc_indices_hashlist[hash];
 595       if (cbuf->res_bo[i] == res)
 596          return true;
 597
 598       for (i = 0; i < cbuf->cres; i++) {
 599          if (cbuf->res_bo[i] == res) {
 600             cbuf->reloc_indices_hashlist[hash] = i;
 601             return true;
 602          }
 603       }
 604    }
 605    return false;
 606 }
 607
 608 static void virgl_drm_add_res(struct virgl_drm_winsys *qdws,
 609                               struct virgl_drm_cmd_buf *cbuf,
 610                               struct virgl_hw_res *res)
 611 {
 612    unsigned hash = res->res_handle & (sizeof(cbuf->is_handle_added)-1);
 613
 614    if (cbuf->cres > cbuf->nres) {
 615       cbuf->nres += 256;
 616       cbuf->res_bo = realloc(cbuf->res_bo, cbuf->nres * sizeof(struct virgl_hw_buf*));
 617       if (!cbuf->res_bo) {
 618           fprintf(stderr,"failure to add relocation %d, %d\n", cbuf->cres, cbuf->nres);
 619           return;
 620       }
 621    }
 622
 623    cbuf->res_bo[cbuf->cres] = NULL;
 624    virgl_drm_resource_reference(qdws, &cbuf->res_bo[cbuf->cres], res);
 625    cbuf->res_hlist[cbuf->cres] = res->bo_handle;
 626    cbuf->is_handle_added[hash] = TRUE;
 627
 628    cbuf->reloc_indices_hashlist[hash] = cbuf->cres;
 629    p_atomic_inc(&res->num_cs_references);
 630    cbuf->cres++;
 631 }
 632
 633 static void virgl_drm_release_all_res(struct virgl_drm_winsys *qdws,
 634                                       struct virgl_drm_cmd_buf *cbuf)
 635 {
 636    int i;
 637
 638    for (i = 0; i < cbuf->cres; i++) {
 639       p_atomic_dec(&cbuf->res_bo[i]->num_cs_references);
 640       virgl_drm_resource_reference(qdws, &cbuf->res_bo[i], NULL);
 641    }
 642    cbuf->cres = 0;
 643 }
 644
 645 static void virgl_drm_emit_res(struct virgl_winsys *qws,
 646                                struct virgl_cmd_buf *_cbuf,
 647                                struct virgl_hw_res *res, boolean write_buf)
 648 {
 649    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 650    struct virgl_drm_cmd_buf *cbuf = virgl_drm_cmd_buf(_cbuf);
 651    boolean already_in_list = virgl_drm_lookup_res(cbuf, res);
 652
 653    if (write_buf)
 654       cbuf->base.buf[cbuf->base.cdw++] = res->res_handle;
 655
 656    if (!already_in_list)
 657       virgl_drm_add_res(qdws, cbuf, res);
 658 }
 659
 660 static boolean virgl_drm_res_is_ref(struct virgl_winsys *qws,
 661                                     struct virgl_cmd_buf *_cbuf,
 662                                     struct virgl_hw_res *res)
 663 {
 664    if (!res->num_cs_references)
 665       return FALSE;
 666
 667    return TRUE;
 668 }
 669
 670 static int virgl_drm_winsys_submit_cmd(struct virgl_winsys *qws,
 671                                        struct virgl_cmd_buf *_cbuf)
 672 {
 673    struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
 674    struct virgl_drm_cmd_buf *cbuf = virgl_drm_cmd_buf(_cbuf);
 675    struct drm_virtgpu_execbuffer eb;
 676    int ret;
 677
 678    if (cbuf->base.cdw == 0)
 679       return 0;
 680
 681    memset(&eb, 0, sizeof(struct drm_virtgpu_execbuffer));
 682    eb.command = (unsigned long)(void*)cbuf->buf;
 683    eb.size = cbuf->base.cdw * 4;
 684    eb.num_bo_handles = cbuf->cres;
 685    eb.bo_handles = (unsigned long)(void *)cbuf->res_hlist;
 686
 687    ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_EXECBUFFER, &eb);
 688    if (ret == -1)
 689       fprintf(stderr,"got error from kernel - expect bad rendering %d\n", errno);
 690    cbuf->base.cdw = 0;
 691
 692    virgl_drm_release_all_res(qdws, cbuf);
 693
 694    memset(cbuf->is_handle_added, 0, sizeof(cbuf->is_handle_added));
 695    return ret;
 696 }
 697
 698 static int virgl_drm_get_caps(struct virgl_winsys *vws,
 699                               struct virgl_drm_caps *caps)
 700 {
 701    struct virgl_drm_winsys *vdws = virgl_drm_winsys(vws);
 702    struct drm_virtgpu_get_caps args;
 703    int ret;
 704
 705    virgl_ws_fill_new_caps_defaults(caps);
 706
 707    memset(&args, 0, sizeof(args));
 708    if (vdws->has_capset_query_fix) {
 709       /* if we have the query fix - try and get cap set id 2 first */
 710       args.cap_set_id = 2;
 711       args.size = sizeof(union virgl_caps);
 712    } else {
 713       args.cap_set_id = 1;
 714       args.size = sizeof(struct virgl_caps_v1);
 715    }
 716    args.addr = (unsigned long)&caps->caps;
 717
 718    ret = drmIoctl(vdws->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &args);
 719    if (ret == -1 && errno == EINVAL) {
 720       /* Fallback to v1 */
 721       args.cap_set_id = 1;
 722       args.size = sizeof(struct virgl_caps_v1);
 723       ret = drmIoctl(vdws->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &args);
 724       if (ret == -1)
 725           return ret;
 726    }
 727    return ret;
 728 }
 729
 730 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 731
 732 static unsigned handle_hash(void *key)
 733 {
 734     return PTR_TO_UINT(key);
 735 }
 736
 737 static int handle_compare(void *key1, void *key2)
 738 {
 739     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 740 }
 741
 742 static struct pipe_fence_handle *
 743 virgl_cs_create_fence(struct virgl_winsys *vws)
 744 {
 745    struct virgl_hw_res *res;
 746
 747    res = virgl_drm_winsys_resource_cache_create(vws,
 748                                                 PIPE_BUFFER,
 749                                                 PIPE_FORMAT_R8_UNORM,
 750                                                 VIRGL_BIND_CUSTOM,
 751                                                 8, 1, 1, 0, 0, 0, 8);
 752
 753    return (struct pipe_fence_handle *)res;
 754 }
 755
 756 static bool virgl_fence_wait(struct virgl_winsys *vws,
 757                              struct pipe_fence_handle *fence,
 758                              uint64_t timeout)
 759 {
 760    struct virgl_drm_winsys *vdws = virgl_drm_winsys(vws);
 761    struct virgl_hw_res *res = virgl_hw_res(fence);
 762
 763    if (timeout == 0)
 764       return !virgl_drm_resource_is_busy(vdws, res);
 765
 766    if (timeout != PIPE_TIMEOUT_INFINITE) {
 767       int64_t start_time = os_time_get();
 768       timeout /= 1000;
 769       while (virgl_drm_resource_is_busy(vdws, res)) {
 770          if (os_time_get() - start_time >= timeout)
 771             return FALSE;
 772          os_time_sleep(10);
 773       }
 774       return TRUE;
 775    }
 776    virgl_drm_resource_wait(vws, res);
 777    return TRUE;
 778 }
 779
 780 static void virgl_fence_reference(struct virgl_winsys *vws,
 781                                   struct pipe_fence_handle **dst,
 782                                   struct pipe_fence_handle *src)
 783 {
 784    struct virgl_drm_winsys *vdws = virgl_drm_winsys(vws);
 785    virgl_drm_resource_reference(vdws, (struct virgl_hw_res **)dst,
 786                                 virgl_hw_res(src));
 787 }
 788
 789
 790 static struct virgl_winsys *
 791 virgl_drm_winsys_create(int drmFD)
 792 {
 793    struct virgl_drm_winsys *qdws;
 794    int ret;
 795    int gl = 0;
 796    struct drm_virtgpu_getparam getparam = {0};
 797
 798    getparam.param = VIRTGPU_PARAM_3D_FEATURES;
 799    getparam.value = (uint64_t)(uintptr_t)&gl;
 800    ret = drmIoctl(drmFD, DRM_IOCTL_VIRTGPU_GETPARAM, &getparam);
 801    if (ret < 0 || !gl)
 802       return NULL;
 803
 804    qdws = CALLOC_STRUCT(virgl_drm_winsys);
 805    if (!qdws)
 806       return NULL;
 807
 808    qdws->fd = drmFD;
 809    qdws->num_delayed = 0;
 810    qdws->usecs = 1000000;
 811    LIST_INITHEAD(&qdws->delayed);
 812    (void) mtx_init(&qdws->mutex, mtx_plain);
 813    (void) mtx_init(&qdws->bo_handles_mutex, mtx_plain);
 814    qdws->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 815    qdws->bo_names = util_hash_table_create(handle_hash, handle_compare);
 816    qdws->base.destroy = virgl_drm_winsys_destroy;
 817
 818    qdws->base.transfer_put = virgl_bo_transfer_put;
 819    qdws->base.transfer_get = virgl_bo_transfer_get;
 820    qdws->base.resource_create = virgl_drm_winsys_resource_cache_create;
 821    qdws->base.resource_unref = virgl_drm_winsys_resource_unref;
 822    qdws->base.resource_create_from_handle = virgl_drm_winsys_resource_create_handle;
 823    qdws->base.resource_get_handle = virgl_drm_winsys_resource_get_handle;
 824    qdws->base.resource_map = virgl_drm_resource_map;
 825    qdws->base.resource_wait = virgl_drm_resource_wait;
 826    qdws->base.cmd_buf_create = virgl_drm_cmd_buf_create;
 827    qdws->base.cmd_buf_destroy = virgl_drm_cmd_buf_destroy;
 828    qdws->base.submit_cmd = virgl_drm_winsys_submit_cmd;
 829    qdws->base.emit_res = virgl_drm_emit_res;
 830    qdws->base.res_is_referenced = virgl_drm_res_is_ref;
 831
 832    qdws->base.cs_create_fence = virgl_cs_create_fence;
 833    qdws->base.fence_wait = virgl_fence_wait;
 834    qdws->base.fence_reference = virgl_fence_reference;
 835
 836    qdws->base.get_caps = virgl_drm_get_caps;
 837
 838    uint32_t value;
 839    getparam.param = VIRTGPU_PARAM_CAPSET_QUERY_FIX;
 840    getparam.value = (uint64_t)(uintptr_t)&value;
 841    ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &getparam);
 842    if (ret == 0) {
 843       if (value == 1)
 844          qdws->has_capset_query_fix = true;
 845    }
 846
 847    return &qdws->base;
 848
 849 }
 850
 851 static struct util_hash_table *fd_tab = NULL;
 852 static mtx_t virgl_screen_mutex = _MTX_INITIALIZER_NP;
 853
 854 static void
 855 virgl_drm_screen_destroy(struct pipe_screen *pscreen)
 856 {
 857    struct virgl_screen *screen = virgl_screen(pscreen);
 858    boolean destroy;
 859
 860    mtx_lock(&virgl_screen_mutex);
 861    destroy = --screen->refcnt == 0;
 862    if (destroy) {
 863       int fd = virgl_drm_winsys(screen->vws)->fd;
 864       util_hash_table_remove(fd_tab, intptr_to_pointer(fd));
 865    }
 866    mtx_unlock(&virgl_screen_mutex);
 867
 868    if (destroy) {
 869       pscreen->destroy = screen->winsys_priv;
 870       pscreen->destroy(pscreen);
 871    }
 872 }
 873
 874 static unsigned hash_fd(void *key)
 875 {
 876    int fd = pointer_to_intptr(key);
 877    struct stat stat;
 878    fstat(fd, &stat);
 879
 880    return stat.st_dev ^ stat.st_ino ^ stat.st_rdev;
 881 }
 882
 883 static int compare_fd(void *key1, void *key2)
 884 {
 885    int fd1 = pointer_to_intptr(key1);
 886    int fd2 = pointer_to_intptr(key2);
 887    struct stat stat1, stat2;
 888    fstat(fd1, &stat1);
 889    fstat(fd2, &stat2);
 890
 891    return stat1.st_dev != stat2.st_dev ||
 892          stat1.st_ino != stat2.st_ino ||
 893          stat1.st_rdev != stat2.st_rdev;
 894 }
 895
 896 struct pipe_screen *
 897 virgl_drm_screen_create(int fd)
 898 {
 899    struct pipe_screen *pscreen = NULL;
 900
 901    mtx_lock(&virgl_screen_mutex);
 902    if (!fd_tab) {
 903       fd_tab = util_hash_table_create(hash_fd, compare_fd);
 904       if (!fd_tab)
 905          goto unlock;
 906    }
 907
 908    pscreen = util_hash_table_get(fd_tab, intptr_to_pointer(fd));
 909    if (pscreen) {
 910       virgl_screen(pscreen)->refcnt++;
 911    } else {
 912       struct virgl_winsys *vws;
 913       int dup_fd = fcntl(fd, F_DUPFD_CLOEXEC, 3);
 914
 915       vws = virgl_drm_winsys_create(dup_fd);
 916       if (!vws) {
 917          close(dup_fd);
 918          goto unlock;
 919       }
 920
 921       pscreen = virgl_create_screen(vws);
 922       if (pscreen) {
 923          util_hash_table_set(fd_tab, intptr_to_pointer(dup_fd), pscreen);
 924
 925          /* Bit of a hack, to avoid circular linkage dependency,
 926           * ie. pipe driver having to call in to winsys, we
 927           * override the pipe drivers screen->destroy():
 928           */
 929          virgl_screen(pscreen)->winsys_priv = pscreen->destroy;
 930          pscreen->destroy = virgl_drm_screen_destroy;
 931       }
 932    }
 933
 934 unlock:
 935    mtx_unlock(&virgl_screen_mutex);
 936    return pscreen;
 937 }