2 * Copyright 2014, 2015 Red Hat.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <sys/ioctl.h>
30 #include "os/os_mman.h"
31 #include "os/os_time.h"
32 #include "util/u_memory.h"
33 #include "util/u_format.h"
34 #include "util/u_hash_table.h"
35 #include "util/u_inlines.h"
36 #include "state_tracker/drm_driver.h"
37 #include "virgl/virgl_screen.h"
38 #include "virgl/virgl_public.h"
41 #include "virtgpu_drm.h"
43 #include "virgl_drm_winsys.h"
44 #include "virgl_drm_public.h"
46 static inline boolean
can_cache_resource(struct virgl_hw_res
*res
)
48 return res
->cacheable
== TRUE
;
51 static void virgl_hw_res_destroy(struct virgl_drm_winsys
*qdws
,
52 struct virgl_hw_res
*res
)
54 struct drm_gem_close args
;
57 pipe_mutex_lock(qdws
->bo_handles_mutex
);
58 util_hash_table_remove(qdws
->bo_handles
,
59 (void *)(uintptr_t)res
->name
);
60 pipe_mutex_unlock(qdws
->bo_handles_mutex
);
64 os_munmap(res
->ptr
, res
->size
);
66 memset(&args
, 0, sizeof(args
));
67 args
.handle
= res
->bo_handle
;
68 drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_CLOSE
, &args
);
72 static boolean
virgl_drm_resource_is_busy(struct virgl_drm_winsys
*qdws
,
73 struct virgl_hw_res
*res
)
75 struct drm_virtgpu_3d_wait waitcmd
;
78 memset(&waitcmd
, 0, sizeof(waitcmd
));
79 waitcmd
.handle
= res
->bo_handle
;
80 waitcmd
.flags
= VIRTGPU_WAIT_NOWAIT
;
82 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_WAIT
, &waitcmd
);
83 if (ret
&& errno
== EBUSY
)
89 virgl_cache_flush(struct virgl_drm_winsys
*qdws
)
91 struct list_head
*curr
, *next
;
92 struct virgl_hw_res
*res
;
94 pipe_mutex_lock(qdws
->mutex
);
95 curr
= qdws
->delayed
.next
;
98 while (curr
!= &qdws
->delayed
) {
99 res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
100 LIST_DEL(&res
->head
);
101 virgl_hw_res_destroy(qdws
, res
);
105 pipe_mutex_unlock(qdws
->mutex
);
108 virgl_drm_winsys_destroy(struct virgl_winsys
*qws
)
110 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
112 virgl_cache_flush(qdws
);
114 util_hash_table_destroy(qdws
->bo_handles
);
115 pipe_mutex_destroy(qdws
->bo_handles_mutex
);
116 pipe_mutex_destroy(qdws
->mutex
);
122 virgl_cache_list_check_free(struct virgl_drm_winsys
*qdws
)
124 struct list_head
*curr
, *next
;
125 struct virgl_hw_res
*res
;
129 curr
= qdws
->delayed
.next
;
131 while (curr
!= &qdws
->delayed
) {
132 res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
133 if (!os_time_timeout(res
->start
, res
->end
, now
))
136 LIST_DEL(&res
->head
);
137 virgl_hw_res_destroy(qdws
, res
);
143 static void virgl_drm_resource_reference(struct virgl_drm_winsys
*qdws
,
144 struct virgl_hw_res
**dres
,
145 struct virgl_hw_res
*sres
)
147 struct virgl_hw_res
*old
= *dres
;
148 if (pipe_reference(&(*dres
)->reference
, &sres
->reference
)) {
150 if (!can_cache_resource(old
)) {
151 virgl_hw_res_destroy(qdws
, old
);
153 pipe_mutex_lock(qdws
->mutex
);
154 virgl_cache_list_check_free(qdws
);
156 old
->start
= os_time_get();
157 old
->end
= old
->start
+ qdws
->usecs
;
158 LIST_ADDTAIL(&old
->head
, &qdws
->delayed
);
160 pipe_mutex_unlock(qdws
->mutex
);
166 static struct virgl_hw_res
*
167 virgl_drm_winsys_resource_create(struct virgl_winsys
*qws
,
168 enum pipe_texture_target target
,
179 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
180 struct drm_virtgpu_resource_create createcmd
;
182 struct virgl_hw_res
*res
;
183 uint32_t stride
= width
* util_format_get_blocksize(format
);
185 res
= CALLOC_STRUCT(virgl_hw_res
);
189 memset(&createcmd
, 0, sizeof(createcmd
));
190 createcmd
.target
= target
;
191 createcmd
.format
= format
;
192 createcmd
.bind
= bind
;
193 createcmd
.width
= width
;
194 createcmd
.height
= height
;
195 createcmd
.depth
= depth
;
196 createcmd
.array_size
= array_size
;
197 createcmd
.last_level
= last_level
;
198 createcmd
.nr_samples
= nr_samples
;
199 createcmd
.stride
= stride
;
200 createcmd
.size
= size
;
202 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE
, &createcmd
);
209 res
->format
= format
;
211 res
->res_handle
= createcmd
.res_handle
;
212 res
->bo_handle
= createcmd
.bo_handle
;
214 res
->stride
= stride
;
215 pipe_reference_init(&res
->reference
, 1);
216 res
->num_cs_references
= 0;
220 static inline int virgl_is_res_compat(struct virgl_drm_winsys
*qdws
,
221 struct virgl_hw_res
*res
,
222 uint32_t size
, uint32_t bind
,
225 if (res
->bind
!= bind
)
227 if (res
->format
!= format
)
229 if (res
->size
< size
)
231 if (res
->size
> size
* 2)
234 if (virgl_drm_resource_is_busy(qdws
, res
)) {
242 virgl_bo_transfer_put(struct virgl_winsys
*vws
,
243 struct virgl_hw_res
*res
,
244 const struct pipe_box
*box
,
245 uint32_t stride
, uint32_t layer_stride
,
246 uint32_t buf_offset
, uint32_t level
)
248 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
249 struct drm_virtgpu_3d_transfer_to_host tohostcmd
;
251 memset(&tohostcmd
, 0, sizeof(tohostcmd
));
252 tohostcmd
.bo_handle
= res
->bo_handle
;
253 tohostcmd
.box
= *(struct drm_virtgpu_3d_box
*)box
;
254 tohostcmd
.offset
= buf_offset
;
255 tohostcmd
.level
= level
;
256 // tohostcmd.stride = stride;
257 // tohostcmd.layer_stride = stride;
258 return drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST
, &tohostcmd
);
262 virgl_bo_transfer_get(struct virgl_winsys
*vws
,
263 struct virgl_hw_res
*res
,
264 const struct pipe_box
*box
,
265 uint32_t stride
, uint32_t layer_stride
,
266 uint32_t buf_offset
, uint32_t level
)
268 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
269 struct drm_virtgpu_3d_transfer_from_host fromhostcmd
;
271 memset(&fromhostcmd
, 0, sizeof(fromhostcmd
));
272 fromhostcmd
.bo_handle
= res
->bo_handle
;
273 fromhostcmd
.level
= level
;
274 fromhostcmd
.offset
= buf_offset
;
275 // fromhostcmd.stride = stride;
276 // fromhostcmd.layer_stride = layer_stride;
277 fromhostcmd
.box
= *(struct drm_virtgpu_3d_box
*)box
;
278 return drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST
, &fromhostcmd
);
281 static struct virgl_hw_res
*
282 virgl_drm_winsys_resource_cache_create(struct virgl_winsys
*qws
,
283 enum pipe_texture_target target
,
294 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
295 struct virgl_hw_res
*res
, *curr_res
;
296 struct list_head
*curr
, *next
;
300 /* only store binds for vertex/index/const buffers */
301 if (bind
!= VIRGL_BIND_CONSTANT_BUFFER
&& bind
!= VIRGL_BIND_INDEX_BUFFER
&&
302 bind
!= VIRGL_BIND_VERTEX_BUFFER
&& bind
!= VIRGL_BIND_CUSTOM
)
305 pipe_mutex_lock(qdws
->mutex
);
308 curr
= qdws
->delayed
.next
;
312 while (curr
!= &qdws
->delayed
) {
313 curr_res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
315 if (!res
&& ((ret
= virgl_is_res_compat(qdws
, curr_res
, size
, bind
, format
)) > 0))
317 else if (os_time_timeout(curr_res
->start
, curr_res
->end
, now
)) {
318 LIST_DEL(&curr_res
->head
);
319 virgl_hw_res_destroy(qdws
, curr_res
);
330 if (!res
&& ret
!= -1) {
331 while (curr
!= &qdws
->delayed
) {
332 curr_res
= LIST_ENTRY(struct virgl_hw_res
, curr
, head
);
333 ret
= virgl_is_res_compat(qdws
, curr_res
, size
, bind
, format
);
346 LIST_DEL(&res
->head
);
348 pipe_mutex_unlock(qdws
->mutex
);
349 pipe_reference_init(&res
->reference
, 1);
353 pipe_mutex_unlock(qdws
->mutex
);
356 res
= virgl_drm_winsys_resource_create(qws
, target
, format
, bind
,
357 width
, height
, depth
, array_size
,
358 last_level
, nr_samples
, size
);
359 if (bind
== VIRGL_BIND_CONSTANT_BUFFER
|| bind
== VIRGL_BIND_INDEX_BUFFER
||
360 bind
== VIRGL_BIND_VERTEX_BUFFER
)
361 res
->cacheable
= TRUE
;
365 static struct virgl_hw_res
*
366 virgl_drm_winsys_resource_create_handle(struct virgl_winsys
*qws
,
367 struct winsys_handle
*whandle
)
369 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
370 struct drm_gem_open open_arg
= {};
371 struct drm_virtgpu_resource_info info_arg
= {};
372 struct virgl_hw_res
*res
;
374 pipe_mutex_lock(qdws
->bo_handles_mutex
);
376 if (whandle
->type
== DRM_API_HANDLE_TYPE_SHARED
) {
377 res
= util_hash_table_get(qdws
->bo_handles
, (void*)(uintptr_t)whandle
->handle
);
379 struct virgl_hw_res
*r
= NULL
;
380 virgl_drm_resource_reference(qdws
, &r
, res
);
385 res
= CALLOC_STRUCT(virgl_hw_res
);
389 if (whandle
->type
== DRM_API_HANDLE_TYPE_FD
) {
392 r
= drmPrimeFDToHandle(qdws
->fd
, whandle
->handle
, &handle
);
398 res
->bo_handle
= handle
;
400 memset(&open_arg
, 0, sizeof(open_arg
));
401 open_arg
.name
= whandle
->handle
;
402 if (drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_OPEN
, &open_arg
)) {
407 res
->bo_handle
= open_arg
.handle
;
409 res
->name
= whandle
->handle
;
411 memset(&info_arg
, 0, sizeof(info_arg
));
412 info_arg
.bo_handle
= res
->bo_handle
;
414 if (drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_RESOURCE_INFO
, &info_arg
)) {
421 res
->res_handle
= info_arg
.res_handle
;
423 res
->size
= info_arg
.size
;
424 res
->stride
= info_arg
.stride
;
425 pipe_reference_init(&res
->reference
, 1);
426 res
->num_cs_references
= 0;
428 util_hash_table_set(qdws
->bo_handles
, (void *)(uintptr_t)whandle
->handle
, res
);
431 pipe_mutex_unlock(qdws
->bo_handles_mutex
);
435 static boolean
virgl_drm_winsys_resource_get_handle(struct virgl_winsys
*qws
,
436 struct virgl_hw_res
*res
,
438 struct winsys_handle
*whandle
)
440 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
441 struct drm_gem_flink flink
;
446 if (whandle
->type
== DRM_API_HANDLE_TYPE_SHARED
) {
448 memset(&flink
, 0, sizeof(flink
));
449 flink
.handle
= res
->bo_handle
;
451 if (drmIoctl(qdws
->fd
, DRM_IOCTL_GEM_FLINK
, &flink
)) {
455 res
->flink
= flink
.name
;
457 pipe_mutex_lock(qdws
->bo_handles_mutex
);
458 util_hash_table_set(qdws
->bo_handles
, (void *)(uintptr_t)res
->flink
, res
);
459 pipe_mutex_unlock(qdws
->bo_handles_mutex
);
461 whandle
->handle
= res
->flink
;
462 } else if (whandle
->type
== DRM_API_HANDLE_TYPE_KMS
) {
463 whandle
->handle
= res
->bo_handle
;
464 } else if (whandle
->type
== DRM_API_HANDLE_TYPE_FD
) {
465 if (drmPrimeHandleToFD(qdws
->fd
, res
->bo_handle
, DRM_CLOEXEC
, (int*)&whandle
->handle
))
468 whandle
->stride
= stride
;
472 static void virgl_drm_winsys_resource_unref(struct virgl_winsys
*qws
,
473 struct virgl_hw_res
*hres
)
475 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
477 virgl_drm_resource_reference(qdws
, &hres
, NULL
);
480 static void *virgl_drm_resource_map(struct virgl_winsys
*qws
,
481 struct virgl_hw_res
*res
)
483 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
484 struct drm_virtgpu_map mmap_arg
;
490 memset(&mmap_arg
, 0, sizeof(mmap_arg
));
491 mmap_arg
.handle
= res
->bo_handle
;
492 if (drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_MAP
, &mmap_arg
))
495 ptr
= os_mmap(0, res
->size
, PROT_READ
|PROT_WRITE
, MAP_SHARED
,
496 qdws
->fd
, mmap_arg
.offset
);
497 if (ptr
== MAP_FAILED
)
505 static void virgl_drm_resource_wait(struct virgl_winsys
*qws
,
506 struct virgl_hw_res
*res
)
508 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
509 struct drm_virtgpu_3d_wait waitcmd
;
512 memset(&waitcmd
, 0, sizeof(waitcmd
));
513 waitcmd
.handle
= res
->bo_handle
;
515 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_WAIT
, &waitcmd
);
520 static struct virgl_cmd_buf
*virgl_drm_cmd_buf_create(struct virgl_winsys
*qws
)
522 struct virgl_drm_cmd_buf
*cbuf
;
524 cbuf
= CALLOC_STRUCT(virgl_drm_cmd_buf
);
531 cbuf
->res_bo
= CALLOC(cbuf
->nres
, sizeof(struct virgl_hw_buf
*));
536 cbuf
->res_hlist
= MALLOC(cbuf
->nres
* sizeof(uint32_t));
537 if (!cbuf
->res_hlist
) {
543 cbuf
->base
.buf
= cbuf
->buf
;
547 static void virgl_drm_cmd_buf_destroy(struct virgl_cmd_buf
*_cbuf
)
549 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
551 FREE(cbuf
->res_hlist
);
557 static boolean
virgl_drm_lookup_res(struct virgl_drm_cmd_buf
*cbuf
,
558 struct virgl_hw_res
*res
)
560 unsigned hash
= res
->res_handle
& (sizeof(cbuf
->is_handle_added
)-1);
563 if (cbuf
->is_handle_added
[hash
]) {
564 i
= cbuf
->reloc_indices_hashlist
[hash
];
565 if (cbuf
->res_bo
[i
] == res
)
568 for (i
= 0; i
< cbuf
->cres
; i
++) {
569 if (cbuf
->res_bo
[i
] == res
) {
570 cbuf
->reloc_indices_hashlist
[hash
] = i
;
578 static void virgl_drm_add_res(struct virgl_drm_winsys
*qdws
,
579 struct virgl_drm_cmd_buf
*cbuf
,
580 struct virgl_hw_res
*res
)
582 unsigned hash
= res
->res_handle
& (sizeof(cbuf
->is_handle_added
)-1);
584 if (cbuf
->cres
> cbuf
->nres
) {
585 fprintf(stderr
,"failure to add relocation\n");
589 cbuf
->res_bo
[cbuf
->cres
] = NULL
;
590 virgl_drm_resource_reference(qdws
, &cbuf
->res_bo
[cbuf
->cres
], res
);
591 cbuf
->res_hlist
[cbuf
->cres
] = res
->bo_handle
;
592 cbuf
->is_handle_added
[hash
] = TRUE
;
594 cbuf
->reloc_indices_hashlist
[hash
] = cbuf
->cres
;
595 p_atomic_inc(&res
->num_cs_references
);
599 static void virgl_drm_release_all_res(struct virgl_drm_winsys
*qdws
,
600 struct virgl_drm_cmd_buf
*cbuf
)
604 for (i
= 0; i
< cbuf
->cres
; i
++) {
605 p_atomic_dec(&cbuf
->res_bo
[i
]->num_cs_references
);
606 virgl_drm_resource_reference(qdws
, &cbuf
->res_bo
[i
], NULL
);
611 static void virgl_drm_emit_res(struct virgl_winsys
*qws
,
612 struct virgl_cmd_buf
*_cbuf
,
613 struct virgl_hw_res
*res
, boolean write_buf
)
615 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
616 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
617 boolean already_in_list
= virgl_drm_lookup_res(cbuf
, res
);
620 cbuf
->base
.buf
[cbuf
->base
.cdw
++] = res
->res_handle
;
622 if (!already_in_list
)
623 virgl_drm_add_res(qdws
, cbuf
, res
);
626 static boolean
virgl_drm_res_is_ref(struct virgl_winsys
*qws
,
627 struct virgl_cmd_buf
*_cbuf
,
628 struct virgl_hw_res
*res
)
630 if (!res
->num_cs_references
)
636 static int virgl_drm_winsys_submit_cmd(struct virgl_winsys
*qws
,
637 struct virgl_cmd_buf
*_cbuf
)
639 struct virgl_drm_winsys
*qdws
= virgl_drm_winsys(qws
);
640 struct virgl_drm_cmd_buf
*cbuf
= virgl_drm_cmd_buf(_cbuf
);
641 struct drm_virtgpu_execbuffer eb
;
644 if (cbuf
->base
.cdw
== 0)
647 memset(&eb
, 0, sizeof(struct drm_virtgpu_execbuffer
));
648 eb
.command
= (unsigned long)(void*)cbuf
->buf
;
649 eb
.size
= cbuf
->base
.cdw
* 4;
650 eb
.num_bo_handles
= cbuf
->cres
;
651 eb
.bo_handles
= (unsigned long)(void *)cbuf
->res_hlist
;
653 ret
= drmIoctl(qdws
->fd
, DRM_IOCTL_VIRTGPU_EXECBUFFER
, &eb
);
655 fprintf(stderr
,"got error from kernel - expect bad rendering %d\n", errno
);
658 virgl_drm_release_all_res(qdws
, cbuf
);
660 memset(cbuf
->is_handle_added
, 0, sizeof(cbuf
->is_handle_added
));
664 static int virgl_drm_get_caps(struct virgl_winsys
*vws
,
665 struct virgl_drm_caps
*caps
)
667 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
668 struct drm_virtgpu_get_caps args
;
670 memset(&args
, 0, sizeof(args
));
673 args
.addr
= (unsigned long)&caps
->caps
;
674 args
.size
= sizeof(union virgl_caps
);
675 return drmIoctl(vdws
->fd
, DRM_IOCTL_VIRTGPU_GET_CAPS
, &args
);
678 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
680 static unsigned handle_hash(void *key
)
682 return PTR_TO_UINT(key
);
685 static int handle_compare(void *key1
, void *key2
)
687 return PTR_TO_UINT(key1
) != PTR_TO_UINT(key2
);
690 static struct pipe_fence_handle
*
691 virgl_cs_create_fence(struct virgl_winsys
*vws
)
693 struct virgl_hw_res
*res
;
695 res
= virgl_drm_winsys_resource_cache_create(vws
,
697 PIPE_FORMAT_R8_UNORM
,
699 8, 1, 1, 0, 0, 0, 8);
701 return (struct pipe_fence_handle
*)res
;
704 static bool virgl_fence_wait(struct virgl_winsys
*vws
,
705 struct pipe_fence_handle
*fence
,
708 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
709 struct virgl_hw_res
*res
= virgl_hw_res(fence
);
712 return virgl_drm_resource_is_busy(vdws
, res
);
714 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
715 int64_t start_time
= os_time_get();
717 while (virgl_drm_resource_is_busy(vdws
, res
)) {
718 if (os_time_get() - start_time
>= timeout
)
724 virgl_drm_resource_wait(vws
, res
);
728 static void virgl_fence_reference(struct virgl_winsys
*vws
,
729 struct pipe_fence_handle
**dst
,
730 struct pipe_fence_handle
*src
)
732 struct virgl_drm_winsys
*vdws
= virgl_drm_winsys(vws
);
733 virgl_drm_resource_reference(vdws
, (struct virgl_hw_res
**)dst
,
738 struct virgl_winsys
*
739 virgl_drm_winsys_create(int drmFD
)
741 struct virgl_drm_winsys
*qdws
;
743 qdws
= CALLOC_STRUCT(virgl_drm_winsys
);
748 qdws
->num_delayed
= 0;
749 qdws
->usecs
= 1000000;
750 LIST_INITHEAD(&qdws
->delayed
);
751 pipe_mutex_init(qdws
->mutex
);
752 pipe_mutex_init(qdws
->bo_handles_mutex
);
753 qdws
->bo_handles
= util_hash_table_create(handle_hash
, handle_compare
);
754 qdws
->base
.destroy
= virgl_drm_winsys_destroy
;
756 qdws
->base
.transfer_put
= virgl_bo_transfer_put
;
757 qdws
->base
.transfer_get
= virgl_bo_transfer_get
;
758 qdws
->base
.resource_create
= virgl_drm_winsys_resource_cache_create
;
759 qdws
->base
.resource_unref
= virgl_drm_winsys_resource_unref
;
760 qdws
->base
.resource_create_from_handle
= virgl_drm_winsys_resource_create_handle
;
761 qdws
->base
.resource_get_handle
= virgl_drm_winsys_resource_get_handle
;
762 qdws
->base
.resource_map
= virgl_drm_resource_map
;
763 qdws
->base
.resource_wait
= virgl_drm_resource_wait
;
764 qdws
->base
.cmd_buf_create
= virgl_drm_cmd_buf_create
;
765 qdws
->base
.cmd_buf_destroy
= virgl_drm_cmd_buf_destroy
;
766 qdws
->base
.submit_cmd
= virgl_drm_winsys_submit_cmd
;
767 qdws
->base
.emit_res
= virgl_drm_emit_res
;
768 qdws
->base
.res_is_referenced
= virgl_drm_res_is_ref
;
770 qdws
->base
.cs_create_fence
= virgl_cs_create_fence
;
771 qdws
->base
.fence_wait
= virgl_fence_wait
;
772 qdws
->base
.fence_reference
= virgl_fence_reference
;
774 qdws
->base
.get_caps
= virgl_drm_get_caps
;
779 static struct util_hash_table
*fd_tab
= NULL
;
780 pipe_static_mutex(virgl_screen_mutex
);
783 virgl_drm_screen_destroy(struct pipe_screen
*pscreen
)
785 struct virgl_screen
*screen
= virgl_screen(pscreen
);
788 pipe_mutex_lock(virgl_screen_mutex
);
789 destroy
= --screen
->refcnt
== 0;
791 int fd
= virgl_drm_winsys(screen
->vws
)->fd
;
792 util_hash_table_remove(fd_tab
, intptr_to_pointer(fd
));
794 pipe_mutex_unlock(virgl_screen_mutex
);
797 pscreen
->destroy
= screen
->winsys_priv
;
798 pscreen
->destroy(pscreen
);
802 static unsigned hash_fd(void *key
)
804 int fd
= pointer_to_intptr(key
);
808 return stat
.st_dev
^ stat
.st_ino
^ stat
.st_rdev
;
811 static int compare_fd(void *key1
, void *key2
)
813 int fd1
= pointer_to_intptr(key1
);
814 int fd2
= pointer_to_intptr(key2
);
815 struct stat stat1
, stat2
;
819 return stat1
.st_dev
!= stat2
.st_dev
||
820 stat1
.st_ino
!= stat2
.st_ino
||
821 stat1
.st_rdev
!= stat2
.st_rdev
;
825 virgl_drm_screen_create(int fd
)
827 struct pipe_screen
*pscreen
= NULL
;
829 pipe_mutex_lock(virgl_screen_mutex
);
831 fd_tab
= util_hash_table_create(hash_fd
, compare_fd
);
836 pscreen
= util_hash_table_get(fd_tab
, intptr_to_pointer(fd
));
838 virgl_screen(pscreen
)->refcnt
++;
840 struct virgl_winsys
*vws
;
841 int dup_fd
= dup(fd
);
843 vws
= virgl_drm_winsys_create(dup_fd
);
845 pscreen
= virgl_create_screen(vws
);
847 util_hash_table_set(fd_tab
, intptr_to_pointer(dup_fd
), pscreen
);
849 /* Bit of a hack, to avoid circular linkage dependency,
850 * ie. pipe driver having to call in to winsys, we
851 * override the pipe drivers screen->destroy():
853 virgl_screen(pscreen
)->winsys_priv
= pscreen
->destroy
;
854 pscreen
->destroy
= virgl_drm_screen_destroy
;
859 pipe_mutex_unlock(virgl_screen_mutex
);