glsl: Support transform feedback of varying structs.
[mesa.git] / src / glsl / ir_builder.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ir_builder.h"
25 #include "program/prog_instruction.h"
26
27 using namespace ir_builder;
28
29 namespace ir_builder {
30
31 void
32 ir_factory::emit(ir_instruction *ir)
33 {
34 instructions->push_tail(ir);
35 }
36
37 ir_variable *
38 ir_factory::make_temp(const glsl_type *type, const char *name)
39 {
40 ir_variable *var;
41
42 var = new(mem_ctx) ir_variable(type, name, ir_var_temporary);
43 emit(var);
44
45 return var;
46 }
47
48 ir_assignment *
49 assign(deref lhs, operand rhs, int writemask)
50 {
51 void *mem_ctx = ralloc_parent(lhs.val);
52
53 ir_assignment *assign = new(mem_ctx) ir_assignment(lhs.val,
54 rhs.val,
55 NULL, writemask);
56
57 return assign;
58 }
59
60 ir_assignment *
61 assign(deref lhs, operand rhs)
62 {
63 return assign(lhs, rhs, (1 << lhs.val->type->vector_elements) - 1);
64 }
65
66 ir_swizzle *
67 swizzle(operand a, int swizzle, int components)
68 {
69 void *mem_ctx = ralloc_parent(a.val);
70
71 return new(mem_ctx) ir_swizzle(a.val,
72 GET_SWZ(swizzle, 0),
73 GET_SWZ(swizzle, 1),
74 GET_SWZ(swizzle, 2),
75 GET_SWZ(swizzle, 3),
76 components);
77 }
78
79 ir_swizzle *
80 swizzle_for_size(operand a, unsigned components)
81 {
82 void *mem_ctx = ralloc_parent(a.val);
83
84 if (a.val->type->vector_elements < components)
85 components = a.val->type->vector_elements;
86
87 unsigned s[4] = { 0, 1, 2, 3 };
88 for (int i = components; i < 4; i++)
89 s[i] = components - 1;
90
91 return new(mem_ctx) ir_swizzle(a.val, s, components);
92 }
93
94 ir_swizzle *
95 swizzle_xxxx(operand a)
96 {
97 return swizzle(a, SWIZZLE_XXXX, 4);
98 }
99
100 ir_swizzle *
101 swizzle_yyyy(operand a)
102 {
103 return swizzle(a, SWIZZLE_YYYY, 4);
104 }
105
106 ir_swizzle *
107 swizzle_zzzz(operand a)
108 {
109 return swizzle(a, SWIZZLE_ZZZZ, 4);
110 }
111
112 ir_swizzle *
113 swizzle_wwww(operand a)
114 {
115 return swizzle(a, SWIZZLE_WWWW, 4);
116 }
117
118 ir_swizzle *
119 swizzle_x(operand a)
120 {
121 return swizzle(a, SWIZZLE_XXXX, 1);
122 }
123
124 ir_swizzle *
125 swizzle_y(operand a)
126 {
127 return swizzle(a, SWIZZLE_YYYY, 1);
128 }
129
130 ir_swizzle *
131 swizzle_z(operand a)
132 {
133 return swizzle(a, SWIZZLE_ZZZZ, 1);
134 }
135
136 ir_swizzle *
137 swizzle_w(operand a)
138 {
139 return swizzle(a, SWIZZLE_WWWW, 1);
140 }
141
142 ir_swizzle *
143 swizzle_xy(operand a)
144 {
145 return swizzle(a, SWIZZLE_XYZW, 2);
146 }
147
148 ir_swizzle *
149 swizzle_xyz(operand a)
150 {
151 return swizzle(a, SWIZZLE_XYZW, 3);
152 }
153
154 ir_swizzle *
155 swizzle_xyzw(operand a)
156 {
157 return swizzle(a, SWIZZLE_XYZW, 4);
158 }
159
160 ir_expression *
161 expr(ir_expression_operation op, operand a)
162 {
163 void *mem_ctx = ralloc_parent(a.val);
164
165 return new(mem_ctx) ir_expression(op, a.val);
166 }
167
168 ir_expression *
169 expr(ir_expression_operation op, operand a, operand b)
170 {
171 void *mem_ctx = ralloc_parent(a.val);
172
173 return new(mem_ctx) ir_expression(op, a.val, b.val);
174 }
175
176 ir_expression *add(operand a, operand b)
177 {
178 return expr(ir_binop_add, a, b);
179 }
180
181 ir_expression *sub(operand a, operand b)
182 {
183 return expr(ir_binop_sub, a, b);
184 }
185
186 ir_expression *mul(operand a, operand b)
187 {
188 return expr(ir_binop_mul, a, b);
189 }
190
191 ir_expression *div(operand a, operand b)
192 {
193 return expr(ir_binop_div, a, b);
194 }
195
196 ir_expression *round_even(operand a)
197 {
198 return expr(ir_unop_round_even, a);
199 }
200
201 ir_expression *dot(operand a, operand b)
202 {
203 return expr(ir_binop_dot, a, b);
204 }
205
206 ir_expression*
207 clamp(operand a, operand b, operand c)
208 {
209 return expr(ir_binop_min, expr(ir_binop_max, a, b), c);
210 }
211
212 ir_expression *
213 saturate(operand a)
214 {
215 void *mem_ctx = ralloc_parent(a.val);
216
217 return expr(ir_binop_max,
218 expr(ir_binop_min, a, new(mem_ctx) ir_constant(1.0f)),
219 new(mem_ctx) ir_constant(0.0f));
220 }
221
222 ir_expression*
223 equal(operand a, operand b)
224 {
225 return expr(ir_binop_equal, a, b);
226 }
227
228 ir_expression*
229 less(operand a, operand b)
230 {
231 return expr(ir_binop_less, a, b);
232 }
233
234 ir_expression*
235 greater(operand a, operand b)
236 {
237 return expr(ir_binop_greater, a, b);
238 }
239
240 ir_expression*
241 lequal(operand a, operand b)
242 {
243 return expr(ir_binop_lequal, a, b);
244 }
245
246 ir_expression*
247 gequal(operand a, operand b)
248 {
249 return expr(ir_binop_gequal, a, b);
250 }
251
252 ir_expression*
253 logic_not(operand a)
254 {
255 return expr(ir_unop_logic_not, a);
256 }
257
258 ir_expression*
259 logic_and(operand a, operand b)
260 {
261 return expr(ir_binop_logic_and, a, b);
262 }
263
264 ir_expression*
265 logic_or(operand a, operand b)
266 {
267 return expr(ir_binop_logic_or, a, b);
268 }
269
270 ir_expression*
271 bit_not(operand a)
272 {
273 return expr(ir_unop_bit_not, a);
274 }
275
276 ir_expression*
277 bit_and(operand a, operand b)
278 {
279 return expr(ir_binop_bit_and, a, b);
280 }
281
282 ir_expression*
283 bit_or(operand a, operand b)
284 {
285 return expr(ir_binop_bit_or, a, b);
286 }
287
288 ir_expression*
289 lshift(operand a, operand b)
290 {
291 return expr(ir_binop_lshift, a, b);
292 }
293
294 ir_expression*
295 rshift(operand a, operand b)
296 {
297 return expr(ir_binop_rshift, a, b);
298 }
299
300 ir_expression*
301 f2i(operand a)
302 {
303 return expr(ir_unop_f2i, a);
304 }
305
306 ir_expression*
307 i2f(operand a)
308 {
309 return expr(ir_unop_i2f, a);
310 }
311
312 ir_expression*
313 i2u(operand a)
314 {
315 return expr(ir_unop_i2u, a);
316 }
317
318 ir_expression*
319 u2i(operand a)
320 {
321 return expr(ir_unop_u2i, a);
322 }
323
324 ir_expression*
325 f2u(operand a)
326 {
327 return expr(ir_unop_f2u, a);
328 }
329
330 ir_expression*
331 u2f(operand a)
332 {
333 return expr(ir_unop_u2f, a);
334 }
335
336 ir_if*
337 if_tree(operand condition,
338 ir_instruction *then_branch)
339 {
340 assert(then_branch != NULL);
341
342 void *mem_ctx = ralloc_parent(condition.val);
343
344 ir_if *result = new(mem_ctx) ir_if(condition.val);
345 result->then_instructions.push_tail(then_branch);
346 return result;
347 }
348
349 ir_if*
350 if_tree(operand condition,
351 ir_instruction *then_branch,
352 ir_instruction *else_branch)
353 {
354 assert(then_branch != NULL);
355 assert(else_branch != NULL);
356
357 void *mem_ctx = ralloc_parent(condition.val);
358
359 ir_if *result = new(mem_ctx) ir_if(condition.val);
360 result->then_instructions.push_tail(then_branch);
361 result->else_instructions.push_tail(else_branch);
362 return result;
363 }
364
365 } /* namespace ir_builder */