2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ir_builder.h"
25 #include "program/prog_instruction.h"
27 using namespace ir_builder
;
29 namespace ir_builder
{
32 ir_factory::emit(ir_instruction
*ir
)
34 instructions
->push_tail(ir
);
38 ir_factory::make_temp(const glsl_type
*type
, const char *name
)
42 var
= new(mem_ctx
) ir_variable(type
, name
, ir_var_temporary
);
49 assign(deref lhs
, operand rhs
, int writemask
)
51 void *mem_ctx
= ralloc_parent(lhs
.val
);
53 ir_assignment
*assign
= new(mem_ctx
) ir_assignment(lhs
.val
,
61 assign(deref lhs
, operand rhs
)
63 return assign(lhs
, rhs
, (1 << lhs
.val
->type
->vector_elements
) - 1);
67 swizzle(operand a
, int swizzle
, int components
)
69 void *mem_ctx
= ralloc_parent(a
.val
);
71 return new(mem_ctx
) ir_swizzle(a
.val
,
80 swizzle_for_size(operand a
, unsigned components
)
82 void *mem_ctx
= ralloc_parent(a
.val
);
84 if (a
.val
->type
->vector_elements
< components
)
85 components
= a
.val
->type
->vector_elements
;
87 unsigned s
[4] = { 0, 1, 2, 3 };
88 for (int i
= components
; i
< 4; i
++)
89 s
[i
] = components
- 1;
91 return new(mem_ctx
) ir_swizzle(a
.val
, s
, components
);
95 swizzle_xxxx(operand a
)
97 return swizzle(a
, SWIZZLE_XXXX
, 4);
101 swizzle_yyyy(operand a
)
103 return swizzle(a
, SWIZZLE_YYYY
, 4);
107 swizzle_zzzz(operand a
)
109 return swizzle(a
, SWIZZLE_ZZZZ
, 4);
113 swizzle_wwww(operand a
)
115 return swizzle(a
, SWIZZLE_WWWW
, 4);
121 return swizzle(a
, SWIZZLE_XXXX
, 1);
127 return swizzle(a
, SWIZZLE_YYYY
, 1);
133 return swizzle(a
, SWIZZLE_ZZZZ
, 1);
139 return swizzle(a
, SWIZZLE_WWWW
, 1);
143 swizzle_xy(operand a
)
145 return swizzle(a
, SWIZZLE_XYZW
, 2);
149 swizzle_xyz(operand a
)
151 return swizzle(a
, SWIZZLE_XYZW
, 3);
155 swizzle_xyzw(operand a
)
157 return swizzle(a
, SWIZZLE_XYZW
, 4);
161 expr(ir_expression_operation op
, operand a
)
163 void *mem_ctx
= ralloc_parent(a
.val
);
165 return new(mem_ctx
) ir_expression(op
, a
.val
);
169 expr(ir_expression_operation op
, operand a
, operand b
)
171 void *mem_ctx
= ralloc_parent(a
.val
);
173 return new(mem_ctx
) ir_expression(op
, a
.val
, b
.val
);
176 ir_expression
*add(operand a
, operand b
)
178 return expr(ir_binop_add
, a
, b
);
181 ir_expression
*sub(operand a
, operand b
)
183 return expr(ir_binop_sub
, a
, b
);
186 ir_expression
*mul(operand a
, operand b
)
188 return expr(ir_binop_mul
, a
, b
);
191 ir_expression
*div(operand a
, operand b
)
193 return expr(ir_binop_div
, a
, b
);
196 ir_expression
*round_even(operand a
)
198 return expr(ir_unop_round_even
, a
);
201 ir_expression
*dot(operand a
, operand b
)
203 return expr(ir_binop_dot
, a
, b
);
207 clamp(operand a
, operand b
, operand c
)
209 return expr(ir_binop_min
, expr(ir_binop_max
, a
, b
), c
);
215 void *mem_ctx
= ralloc_parent(a
.val
);
217 return expr(ir_binop_max
,
218 expr(ir_binop_min
, a
, new(mem_ctx
) ir_constant(1.0f
)),
219 new(mem_ctx
) ir_constant(0.0f
));
223 equal(operand a
, operand b
)
225 return expr(ir_binop_equal
, a
, b
);
229 less(operand a
, operand b
)
231 return expr(ir_binop_less
, a
, b
);
235 greater(operand a
, operand b
)
237 return expr(ir_binop_greater
, a
, b
);
241 lequal(operand a
, operand b
)
243 return expr(ir_binop_lequal
, a
, b
);
247 gequal(operand a
, operand b
)
249 return expr(ir_binop_gequal
, a
, b
);
255 return expr(ir_unop_logic_not
, a
);
259 logic_and(operand a
, operand b
)
261 return expr(ir_binop_logic_and
, a
, b
);
265 logic_or(operand a
, operand b
)
267 return expr(ir_binop_logic_or
, a
, b
);
273 return expr(ir_unop_bit_not
, a
);
277 bit_and(operand a
, operand b
)
279 return expr(ir_binop_bit_and
, a
, b
);
283 bit_or(operand a
, operand b
)
285 return expr(ir_binop_bit_or
, a
, b
);
289 lshift(operand a
, operand b
)
291 return expr(ir_binop_lshift
, a
, b
);
295 rshift(operand a
, operand b
)
297 return expr(ir_binop_rshift
, a
, b
);
303 return expr(ir_unop_f2i
, a
);
309 return expr(ir_unop_i2f
, a
);
315 return expr(ir_unop_i2u
, a
);
321 return expr(ir_unop_u2i
, a
);
327 return expr(ir_unop_f2u
, a
);
333 return expr(ir_unop_u2f
, a
);
337 if_tree(operand condition
,
338 ir_instruction
*then_branch
)
340 assert(then_branch
!= NULL
);
342 void *mem_ctx
= ralloc_parent(condition
.val
);
344 ir_if
*result
= new(mem_ctx
) ir_if(condition
.val
);
345 result
->then_instructions
.push_tail(then_branch
);
350 if_tree(operand condition
,
351 ir_instruction
*then_branch
,
352 ir_instruction
*else_branch
)
354 assert(then_branch
!= NULL
);
355 assert(else_branch
!= NULL
);
357 void *mem_ctx
= ralloc_parent(condition
.val
);
359 ir_if
*result
= new(mem_ctx
) ir_if(condition
.val
);
360 result
->then_instructions
.push_tail(then_branch
);
361 result
->else_instructions
.push_tail(else_branch
);
365 } /* namespace ir_builder */