98b43229508521efef0301ac0f6a77d6c7eeaa67
[mesa.git] / src / glsl / ir_builder.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ir_builder.h"
25 #include "program/prog_instruction.h"
26
27 using namespace ir_builder;
28
29 namespace ir_builder {
30
31 void
32 ir_factory::emit(ir_instruction *ir)
33 {
34 instructions->push_tail(ir);
35 }
36
37 ir_variable *
38 ir_factory::make_temp(const glsl_type *type, const char *name)
39 {
40 ir_variable *var;
41
42 var = new(mem_ctx) ir_variable(type, name, ir_var_temporary);
43 emit(var);
44
45 return var;
46 }
47
48 ir_assignment *
49 assign(deref lhs, operand rhs, operand condition, int writemask)
50 {
51 void *mem_ctx = ralloc_parent(lhs.val);
52
53 ir_assignment *assign = new(mem_ctx) ir_assignment(lhs.val,
54 rhs.val,
55 condition.val,
56 writemask);
57
58 return assign;
59 }
60
61 ir_assignment *
62 assign(deref lhs, operand rhs)
63 {
64 return assign(lhs, rhs, (1 << lhs.val->type->vector_elements) - 1);
65 }
66
67 ir_assignment *
68 assign(deref lhs, operand rhs, int writemask)
69 {
70 return assign(lhs, rhs, (ir_rvalue *) NULL, writemask);
71 }
72
73 ir_assignment *
74 assign(deref lhs, operand rhs, operand condition)
75 {
76 return assign(lhs, rhs, condition, (1 << lhs.val->type->vector_elements) - 1);
77 }
78
79 ir_return *
80 ret(operand retval)
81 {
82 void *mem_ctx = ralloc_parent(retval.val);
83 return new(mem_ctx) ir_return(retval.val);
84 }
85
86 ir_swizzle *
87 swizzle(operand a, int swizzle, int components)
88 {
89 void *mem_ctx = ralloc_parent(a.val);
90
91 return new(mem_ctx) ir_swizzle(a.val,
92 GET_SWZ(swizzle, 0),
93 GET_SWZ(swizzle, 1),
94 GET_SWZ(swizzle, 2),
95 GET_SWZ(swizzle, 3),
96 components);
97 }
98
99 ir_swizzle *
100 swizzle_for_size(operand a, unsigned components)
101 {
102 void *mem_ctx = ralloc_parent(a.val);
103
104 if (a.val->type->vector_elements < components)
105 components = a.val->type->vector_elements;
106
107 unsigned s[4] = { 0, 1, 2, 3 };
108 for (int i = components; i < 4; i++)
109 s[i] = components - 1;
110
111 return new(mem_ctx) ir_swizzle(a.val, s, components);
112 }
113
114 ir_swizzle *
115 swizzle_xxxx(operand a)
116 {
117 return swizzle(a, SWIZZLE_XXXX, 4);
118 }
119
120 ir_swizzle *
121 swizzle_yyyy(operand a)
122 {
123 return swizzle(a, SWIZZLE_YYYY, 4);
124 }
125
126 ir_swizzle *
127 swizzle_zzzz(operand a)
128 {
129 return swizzle(a, SWIZZLE_ZZZZ, 4);
130 }
131
132 ir_swizzle *
133 swizzle_wwww(operand a)
134 {
135 return swizzle(a, SWIZZLE_WWWW, 4);
136 }
137
138 ir_swizzle *
139 swizzle_x(operand a)
140 {
141 return swizzle(a, SWIZZLE_XXXX, 1);
142 }
143
144 ir_swizzle *
145 swizzle_y(operand a)
146 {
147 return swizzle(a, SWIZZLE_YYYY, 1);
148 }
149
150 ir_swizzle *
151 swizzle_z(operand a)
152 {
153 return swizzle(a, SWIZZLE_ZZZZ, 1);
154 }
155
156 ir_swizzle *
157 swizzle_w(operand a)
158 {
159 return swizzle(a, SWIZZLE_WWWW, 1);
160 }
161
162 ir_swizzle *
163 swizzle_xy(operand a)
164 {
165 return swizzle(a, SWIZZLE_XYZW, 2);
166 }
167
168 ir_swizzle *
169 swizzle_xyz(operand a)
170 {
171 return swizzle(a, SWIZZLE_XYZW, 3);
172 }
173
174 ir_swizzle *
175 swizzle_xyzw(operand a)
176 {
177 return swizzle(a, SWIZZLE_XYZW, 4);
178 }
179
180 ir_expression *
181 expr(ir_expression_operation op, operand a)
182 {
183 void *mem_ctx = ralloc_parent(a.val);
184
185 return new(mem_ctx) ir_expression(op, a.val);
186 }
187
188 ir_expression *
189 expr(ir_expression_operation op, operand a, operand b)
190 {
191 void *mem_ctx = ralloc_parent(a.val);
192
193 return new(mem_ctx) ir_expression(op, a.val, b.val);
194 }
195
196 ir_expression *
197 expr(ir_expression_operation op, operand a, operand b, operand c)
198 {
199 void *mem_ctx = ralloc_parent(a.val);
200
201 return new(mem_ctx) ir_expression(op, a.val, b.val, c.val);
202 }
203
204 ir_expression *add(operand a, operand b)
205 {
206 return expr(ir_binop_add, a, b);
207 }
208
209 ir_expression *sub(operand a, operand b)
210 {
211 return expr(ir_binop_sub, a, b);
212 }
213
214 ir_expression *mul(operand a, operand b)
215 {
216 return expr(ir_binop_mul, a, b);
217 }
218
219 ir_expression *div(operand a, operand b)
220 {
221 return expr(ir_binop_div, a, b);
222 }
223
224 ir_expression *round_even(operand a)
225 {
226 return expr(ir_unop_round_even, a);
227 }
228
229 ir_expression *dot(operand a, operand b)
230 {
231 return expr(ir_binop_dot, a, b);
232 }
233
234 /* dot for vectors, mul for scalars */
235 ir_expression *dotlike(operand a, operand b)
236 {
237 assert(a.val->type == b.val->type);
238
239 if (a.val->type->vector_elements == 1)
240 return expr(ir_binop_mul, a, b);
241
242 return expr(ir_binop_dot, a, b);
243 }
244
245 ir_expression*
246 clamp(operand a, operand b, operand c)
247 {
248 return expr(ir_binop_min, expr(ir_binop_max, a, b), c);
249 }
250
251 ir_expression *
252 saturate(operand a)
253 {
254 void *mem_ctx = ralloc_parent(a.val);
255
256 return expr(ir_binop_max,
257 expr(ir_binop_min, a, new(mem_ctx) ir_constant(1.0f)),
258 new(mem_ctx) ir_constant(0.0f));
259 }
260
261 ir_expression *
262 abs(operand a)
263 {
264 return expr(ir_unop_abs, a);
265 }
266
267 ir_expression *
268 neg(operand a)
269 {
270 return expr(ir_unop_neg, a);
271 }
272
273 ir_expression *
274 sin(operand a)
275 {
276 return expr(ir_unop_sin, a);
277 }
278
279 ir_expression *
280 cos(operand a)
281 {
282 return expr(ir_unop_cos, a);
283 }
284
285 ir_expression *
286 exp(operand a)
287 {
288 return expr(ir_unop_exp, a);
289 }
290
291 ir_expression *
292 rsq(operand a)
293 {
294 return expr(ir_unop_rsq, a);
295 }
296
297 ir_expression *
298 sqrt(operand a)
299 {
300 return expr(ir_unop_sqrt, a);
301 }
302
303 ir_expression *
304 log(operand a)
305 {
306 return expr(ir_unop_log, a);
307 }
308
309 ir_expression *
310 sign(operand a)
311 {
312 return expr(ir_unop_sign, a);
313 }
314
315 ir_expression*
316 equal(operand a, operand b)
317 {
318 return expr(ir_binop_equal, a, b);
319 }
320
321 ir_expression*
322 nequal(operand a, operand b)
323 {
324 return expr(ir_binop_nequal, a, b);
325 }
326
327 ir_expression*
328 less(operand a, operand b)
329 {
330 return expr(ir_binop_less, a, b);
331 }
332
333 ir_expression*
334 greater(operand a, operand b)
335 {
336 return expr(ir_binop_greater, a, b);
337 }
338
339 ir_expression*
340 lequal(operand a, operand b)
341 {
342 return expr(ir_binop_lequal, a, b);
343 }
344
345 ir_expression*
346 gequal(operand a, operand b)
347 {
348 return expr(ir_binop_gequal, a, b);
349 }
350
351 ir_expression*
352 logic_not(operand a)
353 {
354 return expr(ir_unop_logic_not, a);
355 }
356
357 ir_expression*
358 logic_and(operand a, operand b)
359 {
360 return expr(ir_binop_logic_and, a, b);
361 }
362
363 ir_expression*
364 logic_or(operand a, operand b)
365 {
366 return expr(ir_binop_logic_or, a, b);
367 }
368
369 ir_expression*
370 bit_not(operand a)
371 {
372 return expr(ir_unop_bit_not, a);
373 }
374
375 ir_expression*
376 bit_and(operand a, operand b)
377 {
378 return expr(ir_binop_bit_and, a, b);
379 }
380
381 ir_expression*
382 bit_or(operand a, operand b)
383 {
384 return expr(ir_binop_bit_or, a, b);
385 }
386
387 ir_expression*
388 lshift(operand a, operand b)
389 {
390 return expr(ir_binop_lshift, a, b);
391 }
392
393 ir_expression*
394 rshift(operand a, operand b)
395 {
396 return expr(ir_binop_rshift, a, b);
397 }
398
399 ir_expression*
400 f2i(operand a)
401 {
402 return expr(ir_unop_f2i, a);
403 }
404
405 ir_expression*
406 bitcast_f2i(operand a)
407 {
408 return expr(ir_unop_bitcast_f2i, a);
409 }
410
411 ir_expression*
412 i2f(operand a)
413 {
414 return expr(ir_unop_i2f, a);
415 }
416
417 ir_expression*
418 bitcast_i2f(operand a)
419 {
420 return expr(ir_unop_bitcast_i2f, a);
421 }
422
423 ir_expression*
424 i2u(operand a)
425 {
426 return expr(ir_unop_i2u, a);
427 }
428
429 ir_expression*
430 u2i(operand a)
431 {
432 return expr(ir_unop_u2i, a);
433 }
434
435 ir_expression*
436 f2u(operand a)
437 {
438 return expr(ir_unop_f2u, a);
439 }
440
441 ir_expression*
442 bitcast_f2u(operand a)
443 {
444 return expr(ir_unop_bitcast_f2u, a);
445 }
446
447 ir_expression*
448 u2f(operand a)
449 {
450 return expr(ir_unop_u2f, a);
451 }
452
453 ir_expression*
454 bitcast_u2f(operand a)
455 {
456 return expr(ir_unop_bitcast_u2f, a);
457 }
458
459 ir_expression*
460 i2b(operand a)
461 {
462 return expr(ir_unop_i2b, a);
463 }
464
465 ir_expression*
466 b2i(operand a)
467 {
468 return expr(ir_unop_b2i, a);
469 }
470
471 ir_expression *
472 f2b(operand a)
473 {
474 return expr(ir_unop_f2b, a);
475 }
476
477 ir_expression *
478 b2f(operand a)
479 {
480 return expr(ir_unop_b2f, a);
481 }
482
483 ir_expression *
484 fma(operand a, operand b, operand c)
485 {
486 return expr(ir_triop_fma, a, b, c);
487 }
488
489 ir_expression *
490 lrp(operand x, operand y, operand a)
491 {
492 return expr(ir_triop_lrp, x, y, a);
493 }
494
495 ir_expression *
496 csel(operand a, operand b, operand c)
497 {
498 return expr(ir_triop_csel, a, b, c);
499 }
500
501 ir_expression *
502 bitfield_insert(operand a, operand b, operand c, operand d)
503 {
504 void *mem_ctx = ralloc_parent(a.val);
505 return new(mem_ctx) ir_expression(ir_quadop_bitfield_insert,
506 a.val->type, a.val, b.val, c.val, d.val);
507 }
508
509 ir_if*
510 if_tree(operand condition,
511 ir_instruction *then_branch)
512 {
513 assert(then_branch != NULL);
514
515 void *mem_ctx = ralloc_parent(condition.val);
516
517 ir_if *result = new(mem_ctx) ir_if(condition.val);
518 result->then_instructions.push_tail(then_branch);
519 return result;
520 }
521
522 ir_if*
523 if_tree(operand condition,
524 ir_instruction *then_branch,
525 ir_instruction *else_branch)
526 {
527 assert(then_branch != NULL);
528 assert(else_branch != NULL);
529
530 void *mem_ctx = ralloc_parent(condition.val);
531
532 ir_if *result = new(mem_ctx) ir_if(condition.val);
533 result->then_instructions.push_tail(then_branch);
534 result->else_instructions.push_tail(else_branch);
535 return result;
536 }
537
538 } /* namespace ir_builder */