2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ir_builder.h"
25 #include "program/prog_instruction.h"
27 using namespace ir_builder
;
29 namespace ir_builder
{
32 ir_factory::emit(ir_instruction
*ir
)
34 instructions
->push_tail(ir
);
38 ir_factory::make_temp(const glsl_type
*type
, const char *name
)
42 var
= new(mem_ctx
) ir_variable(type
, name
, ir_var_temporary
);
49 assign(deref lhs
, operand rhs
, operand condition
, int writemask
)
51 void *mem_ctx
= ralloc_parent(lhs
.val
);
53 ir_assignment
*assign
= new(mem_ctx
) ir_assignment(lhs
.val
,
62 assign(deref lhs
, operand rhs
)
64 return assign(lhs
, rhs
, (1 << lhs
.val
->type
->vector_elements
) - 1);
68 assign(deref lhs
, operand rhs
, int writemask
)
70 return assign(lhs
, rhs
, (ir_rvalue
*) NULL
, writemask
);
74 assign(deref lhs
, operand rhs
, operand condition
)
76 return assign(lhs
, rhs
, condition
, (1 << lhs
.val
->type
->vector_elements
) - 1);
82 void *mem_ctx
= ralloc_parent(retval
.val
);
83 return new(mem_ctx
) ir_return(retval
.val
);
87 swizzle(operand a
, int swizzle
, int components
)
89 void *mem_ctx
= ralloc_parent(a
.val
);
91 return new(mem_ctx
) ir_swizzle(a
.val
,
100 swizzle_for_size(operand a
, unsigned components
)
102 void *mem_ctx
= ralloc_parent(a
.val
);
104 if (a
.val
->type
->vector_elements
< components
)
105 components
= a
.val
->type
->vector_elements
;
107 unsigned s
[4] = { 0, 1, 2, 3 };
108 for (int i
= components
; i
< 4; i
++)
109 s
[i
] = components
- 1;
111 return new(mem_ctx
) ir_swizzle(a
.val
, s
, components
);
115 swizzle_xxxx(operand a
)
117 return swizzle(a
, SWIZZLE_XXXX
, 4);
121 swizzle_yyyy(operand a
)
123 return swizzle(a
, SWIZZLE_YYYY
, 4);
127 swizzle_zzzz(operand a
)
129 return swizzle(a
, SWIZZLE_ZZZZ
, 4);
133 swizzle_wwww(operand a
)
135 return swizzle(a
, SWIZZLE_WWWW
, 4);
141 return swizzle(a
, SWIZZLE_XXXX
, 1);
147 return swizzle(a
, SWIZZLE_YYYY
, 1);
153 return swizzle(a
, SWIZZLE_ZZZZ
, 1);
159 return swizzle(a
, SWIZZLE_WWWW
, 1);
163 swizzle_xy(operand a
)
165 return swizzle(a
, SWIZZLE_XYZW
, 2);
169 swizzle_xyz(operand a
)
171 return swizzle(a
, SWIZZLE_XYZW
, 3);
175 swizzle_xyzw(operand a
)
177 return swizzle(a
, SWIZZLE_XYZW
, 4);
181 expr(ir_expression_operation op
, operand a
)
183 void *mem_ctx
= ralloc_parent(a
.val
);
185 return new(mem_ctx
) ir_expression(op
, a
.val
);
189 expr(ir_expression_operation op
, operand a
, operand b
)
191 void *mem_ctx
= ralloc_parent(a
.val
);
193 return new(mem_ctx
) ir_expression(op
, a
.val
, b
.val
);
197 expr(ir_expression_operation op
, operand a
, operand b
, operand c
)
199 void *mem_ctx
= ralloc_parent(a
.val
);
201 return new(mem_ctx
) ir_expression(op
, a
.val
, b
.val
, c
.val
);
204 ir_expression
*add(operand a
, operand b
)
206 return expr(ir_binop_add
, a
, b
);
209 ir_expression
*sub(operand a
, operand b
)
211 return expr(ir_binop_sub
, a
, b
);
214 ir_expression
*mul(operand a
, operand b
)
216 return expr(ir_binop_mul
, a
, b
);
219 ir_expression
*div(operand a
, operand b
)
221 return expr(ir_binop_div
, a
, b
);
224 ir_expression
*round_even(operand a
)
226 return expr(ir_unop_round_even
, a
);
229 ir_expression
*dot(operand a
, operand b
)
231 return expr(ir_binop_dot
, a
, b
);
234 /* dot for vectors, mul for scalars */
235 ir_expression
*dotlike(operand a
, operand b
)
237 assert(a
.val
->type
== b
.val
->type
);
239 if (a
.val
->type
->vector_elements
== 1)
240 return expr(ir_binop_mul
, a
, b
);
242 return expr(ir_binop_dot
, a
, b
);
246 clamp(operand a
, operand b
, operand c
)
248 return expr(ir_binop_min
, expr(ir_binop_max
, a
, b
), c
);
254 void *mem_ctx
= ralloc_parent(a
.val
);
256 return expr(ir_binop_max
,
257 expr(ir_binop_min
, a
, new(mem_ctx
) ir_constant(1.0f
)),
258 new(mem_ctx
) ir_constant(0.0f
));
264 return expr(ir_unop_abs
, a
);
268 equal(operand a
, operand b
)
270 return expr(ir_binop_equal
, a
, b
);
274 nequal(operand a
, operand b
)
276 return expr(ir_binop_nequal
, a
, b
);
280 less(operand a
, operand b
)
282 return expr(ir_binop_less
, a
, b
);
286 greater(operand a
, operand b
)
288 return expr(ir_binop_greater
, a
, b
);
292 lequal(operand a
, operand b
)
294 return expr(ir_binop_lequal
, a
, b
);
298 gequal(operand a
, operand b
)
300 return expr(ir_binop_gequal
, a
, b
);
306 return expr(ir_unop_logic_not
, a
);
310 logic_and(operand a
, operand b
)
312 return expr(ir_binop_logic_and
, a
, b
);
316 logic_or(operand a
, operand b
)
318 return expr(ir_binop_logic_or
, a
, b
);
324 return expr(ir_unop_bit_not
, a
);
328 bit_and(operand a
, operand b
)
330 return expr(ir_binop_bit_and
, a
, b
);
334 bit_or(operand a
, operand b
)
336 return expr(ir_binop_bit_or
, a
, b
);
340 lshift(operand a
, operand b
)
342 return expr(ir_binop_lshift
, a
, b
);
346 rshift(operand a
, operand b
)
348 return expr(ir_binop_rshift
, a
, b
);
354 return expr(ir_unop_f2i
, a
);
358 bitcast_f2i(operand a
)
360 return expr(ir_unop_bitcast_f2i
, a
);
366 return expr(ir_unop_i2f
, a
);
370 bitcast_i2f(operand a
)
372 return expr(ir_unop_bitcast_i2f
, a
);
378 return expr(ir_unop_i2u
, a
);
384 return expr(ir_unop_u2i
, a
);
390 return expr(ir_unop_f2u
, a
);
394 bitcast_f2u(operand a
)
396 return expr(ir_unop_bitcast_f2u
, a
);
402 return expr(ir_unop_u2f
, a
);
406 bitcast_u2f(operand a
)
408 return expr(ir_unop_bitcast_u2f
, a
);
414 return expr(ir_unop_i2b
, a
);
420 return expr(ir_unop_b2i
, a
);
424 if_tree(operand condition
,
425 ir_instruction
*then_branch
)
427 assert(then_branch
!= NULL
);
429 void *mem_ctx
= ralloc_parent(condition
.val
);
431 ir_if
*result
= new(mem_ctx
) ir_if(condition
.val
);
432 result
->then_instructions
.push_tail(then_branch
);
437 if_tree(operand condition
,
438 ir_instruction
*then_branch
,
439 ir_instruction
*else_branch
)
441 assert(then_branch
!= NULL
);
442 assert(else_branch
!= NULL
);
444 void *mem_ctx
= ralloc_parent(condition
.val
);
446 ir_if
*result
= new(mem_ctx
) ir_if(condition
.val
);
447 result
->then_instructions
.push_tail(then_branch
);
448 result
->else_instructions
.push_tail(else_branch
);
452 } /* namespace ir_builder */