src/glsl/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42
  43    shader->options = options;
  44    memset(&shader->info, 0, sizeof(shader->info));
  45
  46    exec_list_make_empty(&shader->functions);
  47    exec_list_make_empty(&shader->registers);
  48    exec_list_make_empty(&shader->globals);
  49    exec_list_make_empty(&shader->system_values);
  50    shader->reg_alloc = 0;
  51
  52    shader->num_inputs = 0;
  53    shader->num_outputs = 0;
  54    shader->num_uniforms = 0;
  55
  56    shader->stage = stage;
  57
  58    return shader;
  59 }
  60
  61 static nir_register *
  62 reg_create(void *mem_ctx, struct exec_list *list)
  63 {
  64    nir_register *reg = ralloc(mem_ctx, nir_register);
  65
  66    list_inithead(&reg->uses);
  67    list_inithead(&reg->defs);
  68    list_inithead(&reg->if_uses);
  69
  70    reg->num_components = 0;
  71    reg->num_array_elems = 0;
  72    reg->is_packed = false;
  73    reg->name = NULL;
  74
  75    exec_list_push_tail(list, &reg->node);
  76
  77    return reg;
  78 }
  79
  80 nir_register *
  81 nir_global_reg_create(nir_shader *shader)
  82 {
  83    nir_register *reg = reg_create(shader, &shader->registers);
  84    reg->index = shader->reg_alloc++;
  85    reg->is_global = true;
  86
  87    return reg;
  88 }
  89
  90 nir_register *
  91 nir_local_reg_create(nir_function_impl *impl)
  92 {
  93    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  94    reg->index = impl->reg_alloc++;
  95    reg->is_global = false;
  96
  97    return reg;
  98 }
  99
 100 void
 101 nir_reg_remove(nir_register *reg)
 102 {
 103    exec_node_remove(&reg->node);
 104 }
 105
 106 void
 107 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 108 {
 109    switch (var->data.mode) {
 110    case nir_var_all:
 111       assert(!"invalid mode");
 112       break;
 113
 114    case nir_var_local:
 115       assert(!"nir_shader_add_variable cannot be used for local variables");
 116       break;
 117
 118    case nir_var_global:
 119       exec_list_push_tail(&shader->globals, &var->node);
 120       break;
 121
 122    case nir_var_shader_in:
 123       exec_list_push_tail(&shader->inputs, &var->node);
 124       break;
 125
 126    case nir_var_shader_out:
 127       exec_list_push_tail(&shader->outputs, &var->node);
 128       break;
 129
 130    case nir_var_uniform:
 131    case nir_var_shader_storage:
 132       exec_list_push_tail(&shader->uniforms, &var->node);
 133       break;
 134
 135    case nir_var_system_value:
 136       exec_list_push_tail(&shader->system_values, &var->node);
 137       break;
 138    }
 139 }
 140
 141 nir_variable *
 142 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 143                     const struct glsl_type *type, const char *name)
 144 {
 145    nir_variable *var = rzalloc(shader, nir_variable);
 146    var->name = ralloc_strdup(var, name);
 147    var->type = type;
 148    var->data.mode = mode;
 149
 150    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 151        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 152       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 153
 154    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 155       var->data.read_only = true;
 156
 157    nir_shader_add_variable(shader, var);
 158
 159    return var;
 160 }
 161
 162 nir_variable *
 163 nir_local_variable_create(nir_function_impl *impl,
 164                           const struct glsl_type *type, const char *name)
 165 {
 166    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 167    var->name = ralloc_strdup(var, name);
 168    var->type = type;
 169    var->data.mode = nir_var_local;
 170
 171    nir_function_impl_add_variable(impl, var);
 172
 173    return var;
 174 }
 175
 176 nir_function *
 177 nir_function_create(nir_shader *shader, const char *name)
 178 {
 179    nir_function *func = ralloc(shader, nir_function);
 180
 181    exec_list_push_tail(&shader->functions, &func->node);
 182
 183    func->name = ralloc_strdup(func, name);
 184    func->shader = shader;
 185    func->num_params = 0;
 186    func->params = NULL;
 187    func->return_type = glsl_void_type();
 188    func->impl = NULL;
 189
 190    return func;
 191 }
 192
 193 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 194 {
 195    dest->is_ssa = src->is_ssa;
 196    if (src->is_ssa) {
 197       dest->ssa = src->ssa;
 198    } else {
 199       dest->reg.base_offset = src->reg.base_offset;
 200       dest->reg.reg = src->reg.reg;
 201       if (src->reg.indirect) {
 202          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 203          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 204       } else {
 205          dest->reg.indirect = NULL;
 206       }
 207    }
 208 }
 209
 210 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 211 {
 212    /* Copying an SSA definition makes no sense whatsoever. */
 213    assert(!src->is_ssa);
 214
 215    dest->is_ssa = false;
 216
 217    dest->reg.base_offset = src->reg.base_offset;
 218    dest->reg.reg = src->reg.reg;
 219    if (src->reg.indirect) {
 220       dest->reg.indirect = ralloc(instr, nir_src);
 221       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 222    } else {
 223       dest->reg.indirect = NULL;
 224    }
 225 }
 226
 227 void
 228 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 229                  nir_alu_instr *instr)
 230 {
 231    nir_src_copy(&dest->src, &src->src, &instr->instr);
 232    dest->abs = src->abs;
 233    dest->negate = src->negate;
 234    for (unsigned i = 0; i < 4; i++)
 235       dest->swizzle[i] = src->swizzle[i];
 236 }
 237
 238 void
 239 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 240                   nir_alu_instr *instr)
 241 {
 242    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 243    dest->write_mask = src->write_mask;
 244    dest->saturate = src->saturate;
 245 }
 246
 247
 248 static void
 249 cf_init(nir_cf_node *node, nir_cf_node_type type)
 250 {
 251    exec_node_init(&node->node);
 252    node->parent = NULL;
 253    node->type = type;
 254 }
 255
 256 nir_function_impl *
 257 nir_function_impl_create_bare(nir_shader *shader)
 258 {
 259    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 260
 261    impl->function = NULL;
 262
 263    cf_init(&impl->cf_node, nir_cf_node_function);
 264
 265    exec_list_make_empty(&impl->body);
 266    exec_list_make_empty(&impl->registers);
 267    exec_list_make_empty(&impl->locals);
 268    impl->num_params = 0;
 269    impl->params = NULL;
 270    impl->return_var = NULL;
 271    impl->reg_alloc = 0;
 272    impl->ssa_alloc = 0;
 273    impl->valid_metadata = nir_metadata_none;
 274
 275    /* create start & end blocks */
 276    nir_block *start_block = nir_block_create(shader);
 277    nir_block *end_block = nir_block_create(shader);
 278    start_block->cf_node.parent = &impl->cf_node;
 279    end_block->cf_node.parent = &impl->cf_node;
 280    impl->end_block = end_block;
 281
 282    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 283
 284    start_block->successors[0] = end_block;
 285    _mesa_set_add(end_block->predecessors, start_block);
 286    return impl;
 287 }
 288
 289 nir_function_impl *
 290 nir_function_impl_create(nir_function *function)
 291 {
 292    assert(function->impl == NULL);
 293
 294    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 295
 296    function->impl = impl;
 297    impl->function = function;
 298
 299    impl->num_params = function->num_params;
 300    impl->params = ralloc_array(function->shader,
 301                                nir_variable *, impl->num_params);
 302
 303    return impl;
 304 }
 305
 306 nir_block *
 307 nir_block_create(nir_shader *shader)
 308 {
 309    nir_block *block = ralloc(shader, nir_block);
 310
 311    cf_init(&block->cf_node, nir_cf_node_block);
 312
 313    block->successors[0] = block->successors[1] = NULL;
 314    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 315                                           _mesa_key_pointer_equal);
 316    block->imm_dom = NULL;
 317    /* XXX maybe it would be worth it to defer allocation?  This
 318     * way it doesn't get allocated for shader ref's that never run
 319     * nir_calc_dominance?  For example, state-tracker creates an
 320     * initial IR, clones that, runs appropriate lowering pass, passes
 321     * to driver which does common lowering/opt, and then stores ref
 322     * which is later used to do state specific lowering and futher
 323     * opt.  Do any of the references not need dominance metadata?
 324     */
 325    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 326                                           _mesa_key_pointer_equal);
 327
 328    exec_list_make_empty(&block->instr_list);
 329
 330    return block;
 331 }
 332
 333 static inline void
 334 src_init(nir_src *src)
 335 {
 336    src->is_ssa = false;
 337    src->reg.reg = NULL;
 338    src->reg.indirect = NULL;
 339    src->reg.base_offset = 0;
 340 }
 341
 342 nir_if *
 343 nir_if_create(nir_shader *shader)
 344 {
 345    nir_if *if_stmt = ralloc(shader, nir_if);
 346
 347    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 348    src_init(&if_stmt->condition);
 349
 350    nir_block *then = nir_block_create(shader);
 351    exec_list_make_empty(&if_stmt->then_list);
 352    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 353    then->cf_node.parent = &if_stmt->cf_node;
 354
 355    nir_block *else_stmt = nir_block_create(shader);
 356    exec_list_make_empty(&if_stmt->else_list);
 357    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 358    else_stmt->cf_node.parent = &if_stmt->cf_node;
 359
 360    return if_stmt;
 361 }
 362
 363 nir_loop *
 364 nir_loop_create(nir_shader *shader)
 365 {
 366    nir_loop *loop = ralloc(shader, nir_loop);
 367
 368    cf_init(&loop->cf_node, nir_cf_node_loop);
 369
 370    nir_block *body = nir_block_create(shader);
 371    exec_list_make_empty(&loop->body);
 372    exec_list_push_tail(&loop->body, &body->cf_node.node);
 373    body->cf_node.parent = &loop->cf_node;
 374
 375    body->successors[0] = body;
 376    _mesa_set_add(body->predecessors, body);
 377
 378    return loop;
 379 }
 380
 381 static void
 382 instr_init(nir_instr *instr, nir_instr_type type)
 383 {
 384    instr->type = type;
 385    instr->block = NULL;
 386    exec_node_init(&instr->node);
 387 }
 388
 389 static void
 390 dest_init(nir_dest *dest)
 391 {
 392    dest->is_ssa = false;
 393    dest->reg.reg = NULL;
 394    dest->reg.indirect = NULL;
 395    dest->reg.base_offset = 0;
 396 }
 397
 398 static void
 399 alu_dest_init(nir_alu_dest *dest)
 400 {
 401    dest_init(&dest->dest);
 402    dest->saturate = false;
 403    dest->write_mask = 0xf;
 404 }
 405
 406 static void
 407 alu_src_init(nir_alu_src *src)
 408 {
 409    src_init(&src->src);
 410    src->abs = src->negate = false;
 411    src->swizzle[0] = 0;
 412    src->swizzle[1] = 1;
 413    src->swizzle[2] = 2;
 414    src->swizzle[3] = 3;
 415 }
 416
 417 nir_alu_instr *
 418 nir_alu_instr_create(nir_shader *shader, nir_op op)
 419 {
 420    unsigned num_srcs = nir_op_infos[op].num_inputs;
 421    nir_alu_instr *instr =
 422       ralloc_size(shader,
 423                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 424
 425    instr_init(&instr->instr, nir_instr_type_alu);
 426    instr->op = op;
 427    alu_dest_init(&instr->dest);
 428    for (unsigned i = 0; i < num_srcs; i++)
 429       alu_src_init(&instr->src[i]);
 430
 431    return instr;
 432 }
 433
 434 nir_jump_instr *
 435 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 436 {
 437    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 438    instr_init(&instr->instr, nir_instr_type_jump);
 439    instr->type = type;
 440    return instr;
 441 }
 442
 443 nir_load_const_instr *
 444 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 445 {
 446    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 447    instr_init(&instr->instr, nir_instr_type_load_const);
 448
 449    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 450
 451    return instr;
 452 }
 453
 454 nir_intrinsic_instr *
 455 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 456 {
 457    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 458    nir_intrinsic_instr *instr =
 459       ralloc_size(shader,
 460                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 461
 462    instr_init(&instr->instr, nir_instr_type_intrinsic);
 463    instr->intrinsic = op;
 464
 465    if (nir_intrinsic_infos[op].has_dest)
 466       dest_init(&instr->dest);
 467
 468    for (unsigned i = 0; i < num_srcs; i++)
 469       src_init(&instr->src[i]);
 470
 471    return instr;
 472 }
 473
 474 nir_call_instr *
 475 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 476 {
 477    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 478    instr_init(&instr->instr, nir_instr_type_call);
 479
 480    instr->callee = callee;
 481    instr->num_params = callee->num_params;
 482    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 483    instr->return_deref = NULL;
 484
 485    return instr;
 486 }
 487
 488 nir_tex_instr *
 489 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 490 {
 491    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 492    instr_init(&instr->instr, nir_instr_type_tex);
 493
 494    dest_init(&instr->dest);
 495
 496    instr->num_srcs = num_srcs;
 497    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 498    for (unsigned i = 0; i < num_srcs; i++)
 499       src_init(&instr->src[i].src);
 500
 501    instr->texture_index = 0;
 502    instr->texture_array_size = 0;
 503    instr->texture = NULL;
 504    instr->sampler_index = 0;
 505    instr->sampler = NULL;
 506
 507    return instr;
 508 }
 509
 510 nir_phi_instr *
 511 nir_phi_instr_create(nir_shader *shader)
 512 {
 513    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 514    instr_init(&instr->instr, nir_instr_type_phi);
 515
 516    dest_init(&instr->dest);
 517    exec_list_make_empty(&instr->srcs);
 518    return instr;
 519 }
 520
 521 nir_parallel_copy_instr *
 522 nir_parallel_copy_instr_create(nir_shader *shader)
 523 {
 524    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 525    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 526
 527    exec_list_make_empty(&instr->entries);
 528
 529    return instr;
 530 }
 531
 532 nir_ssa_undef_instr *
 533 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 534 {
 535    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 536    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 537
 538    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 539
 540    return instr;
 541 }
 542
 543 nir_deref_var *
 544 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 545 {
 546    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 547    deref->deref.deref_type = nir_deref_type_var;
 548    deref->deref.child = NULL;
 549    deref->deref.type = var->type;
 550    deref->var = var;
 551    return deref;
 552 }
 553
 554 nir_deref_array *
 555 nir_deref_array_create(void *mem_ctx)
 556 {
 557    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 558    deref->deref.deref_type = nir_deref_type_array;
 559    deref->deref.child = NULL;
 560    deref->deref_array_type = nir_deref_array_type_direct;
 561    src_init(&deref->indirect);
 562    deref->base_offset = 0;
 563    return deref;
 564 }
 565
 566 nir_deref_struct *
 567 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 568 {
 569    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 570    deref->deref.deref_type = nir_deref_type_struct;
 571    deref->deref.child = NULL;
 572    deref->index = field_index;
 573    return deref;
 574 }
 575
 576 static nir_deref_var *
 577 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 578 {
 579    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 580    ret->deref.type = deref->deref.type;
 581    if (deref->deref.child)
 582       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 583    return ret;
 584 }
 585
 586 static nir_deref_array *
 587 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 588 {
 589    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 590    ret->base_offset = deref->base_offset;
 591    ret->deref_array_type = deref->deref_array_type;
 592    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 593       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 594    }
 595    ret->deref.type = deref->deref.type;
 596    if (deref->deref.child)
 597       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 598    return ret;
 599 }
 600
 601 static nir_deref_struct *
 602 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 603 {
 604    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 605    ret->deref.type = deref->deref.type;
 606    if (deref->deref.child)
 607       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 608    return ret;
 609 }
 610
 611 nir_deref *
 612 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 613 {
 614    switch (deref->deref_type) {
 615    case nir_deref_type_var:
 616       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 617    case nir_deref_type_array:
 618       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 619    case nir_deref_type_struct:
 620       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 621    default:
 622       unreachable("Invalid dereference type");
 623    }
 624
 625    return NULL;
 626 }
 627
 628 /* Returns a load_const instruction that represents the constant
 629  * initializer for the given deref chain.  The caller is responsible for
 630  * ensuring that there actually is a constant initializer.
 631  */
 632 nir_load_const_instr *
 633 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 634 {
 635    nir_constant *constant = deref->var->constant_initializer;
 636    assert(constant);
 637
 638    const nir_deref *tail = &deref->deref;
 639    unsigned matrix_offset = 0;
 640    while (tail->child) {
 641       switch (tail->child->deref_type) {
 642       case nir_deref_type_array: {
 643          nir_deref_array *arr = nir_deref_as_array(tail->child);
 644          assert(arr->deref_array_type == nir_deref_array_type_direct);
 645          if (glsl_type_is_matrix(tail->type)) {
 646             assert(arr->deref.child == NULL);
 647             matrix_offset = arr->base_offset;
 648          } else {
 649             constant = constant->elements[arr->base_offset];
 650          }
 651          break;
 652       }
 653
 654       case nir_deref_type_struct: {
 655          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 656          break;
 657       }
 658
 659       default:
 660          unreachable("Invalid deref child type");
 661       }
 662
 663       tail = tail->child;
 664    }
 665
 666    nir_load_const_instr *load =
 667       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 668
 669    matrix_offset *= load->def.num_components;
 670    for (unsigned i = 0; i < load->def.num_components; i++) {
 671       switch (glsl_get_base_type(tail->type)) {
 672       case GLSL_TYPE_FLOAT:
 673       case GLSL_TYPE_INT:
 674       case GLSL_TYPE_UINT:
 675          load->value.u[i] = constant->value.u[matrix_offset + i];
 676          break;
 677       case GLSL_TYPE_BOOL:
 678          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 679                              NIR_TRUE : NIR_FALSE;
 680          break;
 681       default:
 682          unreachable("Invalid immediate type");
 683       }
 684    }
 685
 686    return load;
 687 }
 688
 689 nir_function_impl *
 690 nir_cf_node_get_function(nir_cf_node *node)
 691 {
 692    while (node->type != nir_cf_node_function) {
 693       node = node->parent;
 694    }
 695
 696    return nir_cf_node_as_function(node);
 697 }
 698
 699 /* Reduces a cursor by trying to convert everything to after and trying to
 700  * go up to block granularity when possible.
 701  */
 702 static nir_cursor
 703 reduce_cursor(nir_cursor cursor)
 704 {
 705    switch (cursor.option) {
 706    case nir_cursor_before_block:
 707       if (exec_list_is_empty(&cursor.block->instr_list)) {
 708          /* Empty block.  After is as good as before. */
 709          cursor.option = nir_cursor_after_block;
 710       } else {
 711          /* Try to switch to after the previous block if there is one.
 712           * (This isn't likely, but it can happen.)
 713           */
 714          nir_cf_node *prev_node = nir_cf_node_prev(&cursor.block->cf_node);
 715          if (prev_node && prev_node->type == nir_cf_node_block) {
 716             cursor.block = nir_cf_node_as_block(prev_node);
 717             cursor.option = nir_cursor_after_block;
 718          }
 719       }
 720       return cursor;
 721
 722    case nir_cursor_after_block:
 723       return cursor;
 724
 725    case nir_cursor_before_instr: {
 726       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 727       if (prev_instr) {
 728          /* Before this instruction is after the previous */
 729          cursor.instr = prev_instr;
 730          cursor.option = nir_cursor_after_instr;
 731       } else {
 732          /* No previous instruction.  Switch to before block */
 733          cursor.block = cursor.instr->block;
 734          cursor.option = nir_cursor_before_block;
 735       }
 736       return reduce_cursor(cursor);
 737    }
 738
 739    case nir_cursor_after_instr:
 740       if (nir_instr_next(cursor.instr) == NULL) {
 741          /* This is the last instruction, switch to after block */
 742          cursor.option = nir_cursor_after_block;
 743          cursor.block = cursor.instr->block;
 744       }
 745       return cursor;
 746
 747    default:
 748       unreachable("Inavlid cursor option");
 749    }
 750 }
 751
 752 bool
 753 nir_cursors_equal(nir_cursor a, nir_cursor b)
 754 {
 755    /* Reduced cursors should be unique */
 756    a = reduce_cursor(a);
 757    b = reduce_cursor(b);
 758
 759    return a.block == b.block && a.option == b.option;
 760 }
 761
 762 static bool
 763 add_use_cb(nir_src *src, void *state)
 764 {
 765    nir_instr *instr = state;
 766
 767    src->parent_instr = instr;
 768    list_addtail(&src->use_link,
 769                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 770
 771    return true;
 772 }
 773
 774 static bool
 775 add_ssa_def_cb(nir_ssa_def *def, void *state)
 776 {
 777    nir_instr *instr = state;
 778
 779    if (instr->block && def->index == UINT_MAX) {
 780       nir_function_impl *impl =
 781          nir_cf_node_get_function(&instr->block->cf_node);
 782
 783       def->index = impl->ssa_alloc++;
 784    }
 785
 786    return true;
 787 }
 788
 789 static bool
 790 add_reg_def_cb(nir_dest *dest, void *state)
 791 {
 792    nir_instr *instr = state;
 793
 794    if (!dest->is_ssa) {
 795       dest->reg.parent_instr = instr;
 796       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 797    }
 798
 799    return true;
 800 }
 801
 802 static void
 803 add_defs_uses(nir_instr *instr)
 804 {
 805    nir_foreach_src(instr, add_use_cb, instr);
 806    nir_foreach_dest(instr, add_reg_def_cb, instr);
 807    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 808 }
 809
 810 void
 811 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 812 {
 813    switch (cursor.option) {
 814    case nir_cursor_before_block:
 815       /* Only allow inserting jumps into empty blocks. */
 816       if (instr->type == nir_instr_type_jump)
 817          assert(exec_list_is_empty(&cursor.block->instr_list));
 818
 819       instr->block = cursor.block;
 820       add_defs_uses(instr);
 821       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 822       break;
 823    case nir_cursor_after_block: {
 824       /* Inserting instructions after a jump is illegal. */
 825       nir_instr *last = nir_block_last_instr(cursor.block);
 826       assert(last == NULL || last->type != nir_instr_type_jump);
 827       (void) last;
 828
 829       instr->block = cursor.block;
 830       add_defs_uses(instr);
 831       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 832       break;
 833    }
 834    case nir_cursor_before_instr:
 835       assert(instr->type != nir_instr_type_jump);
 836       instr->block = cursor.instr->block;
 837       add_defs_uses(instr);
 838       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 839       break;
 840    case nir_cursor_after_instr:
 841       /* Inserting instructions after a jump is illegal. */
 842       assert(cursor.instr->type != nir_instr_type_jump);
 843
 844       /* Only allow inserting jumps at the end of the block. */
 845       if (instr->type == nir_instr_type_jump)
 846          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 847
 848       instr->block = cursor.instr->block;
 849       add_defs_uses(instr);
 850       exec_node_insert_after(&cursor.instr->node, &instr->node);
 851       break;
 852    }
 853
 854    if (instr->type == nir_instr_type_jump)
 855       nir_handle_add_jump(instr->block);
 856 }
 857
 858 static bool
 859 src_is_valid(const nir_src *src)
 860 {
 861    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 862 }
 863
 864 static bool
 865 remove_use_cb(nir_src *src, void *state)
 866 {
 867    if (src_is_valid(src))
 868       list_del(&src->use_link);
 869
 870    return true;
 871 }
 872
 873 static bool
 874 remove_def_cb(nir_dest *dest, void *state)
 875 {
 876    if (!dest->is_ssa)
 877       list_del(&dest->reg.def_link);
 878
 879    return true;
 880 }
 881
 882 static void
 883 remove_defs_uses(nir_instr *instr)
 884 {
 885    nir_foreach_dest(instr, remove_def_cb, instr);
 886    nir_foreach_src(instr, remove_use_cb, instr);
 887 }
 888
 889 void nir_instr_remove(nir_instr *instr)
 890 {
 891    remove_defs_uses(instr);
 892    exec_node_remove(&instr->node);
 893
 894    if (instr->type == nir_instr_type_jump) {
 895       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 896       nir_handle_remove_jump(instr->block, jump_instr->type);
 897    }
 898 }
 899
 900 /*@}*/
 901
 902 void
 903 nir_index_local_regs(nir_function_impl *impl)
 904 {
 905    unsigned index = 0;
 906    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 907       reg->index = index++;
 908    }
 909    impl->reg_alloc = index;
 910 }
 911
 912 void
 913 nir_index_global_regs(nir_shader *shader)
 914 {
 915    unsigned index = 0;
 916    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 917       reg->index = index++;
 918    }
 919    shader->reg_alloc = index;
 920 }
 921
 922 static bool
 923 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 924 {
 925    return cb(&instr->dest.dest, state);
 926 }
 927
 928 static bool
 929 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 930                      void *state)
 931 {
 932    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 933       return cb(&instr->dest, state);
 934
 935    return true;
 936 }
 937
 938 static bool
 939 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 940                    void *state)
 941 {
 942    return cb(&instr->dest, state);
 943 }
 944
 945 static bool
 946 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 947 {
 948    return cb(&instr->dest, state);
 949 }
 950
 951 static bool
 952 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 953                          nir_foreach_dest_cb cb, void *state)
 954 {
 955    nir_foreach_parallel_copy_entry(instr, entry) {
 956       if (!cb(&entry->dest, state))
 957          return false;
 958    }
 959
 960    return true;
 961 }
 962
 963 bool
 964 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 965 {
 966    switch (instr->type) {
 967    case nir_instr_type_alu:
 968       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 969    case nir_instr_type_intrinsic:
 970       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 971    case nir_instr_type_tex:
 972       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 973    case nir_instr_type_phi:
 974       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 975    case nir_instr_type_parallel_copy:
 976       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 977                                       cb, state);
 978
 979    case nir_instr_type_load_const:
 980    case nir_instr_type_ssa_undef:
 981    case nir_instr_type_call:
 982    case nir_instr_type_jump:
 983       break;
 984
 985    default:
 986       unreachable("Invalid instruction type");
 987       break;
 988    }
 989
 990    return true;
 991 }
 992
 993 struct foreach_ssa_def_state {
 994    nir_foreach_ssa_def_cb cb;
 995    void *client_state;
 996 };
 997
 998 static inline bool
 999 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1000 {
1001    struct foreach_ssa_def_state *state = void_state;
1002
1003    if (dest->is_ssa)
1004       return state->cb(&dest->ssa, state->client_state);
1005    else
1006       return true;
1007 }
1008
1009 bool
1010 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1011 {
1012    switch (instr->type) {
1013    case nir_instr_type_alu:
1014    case nir_instr_type_tex:
1015    case nir_instr_type_intrinsic:
1016    case nir_instr_type_phi:
1017    case nir_instr_type_parallel_copy: {
1018       struct foreach_ssa_def_state foreach_state = {cb, state};
1019       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1020    }
1021
1022    case nir_instr_type_load_const:
1023       return cb(&nir_instr_as_load_const(instr)->def, state);
1024    case nir_instr_type_ssa_undef:
1025       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1026    case nir_instr_type_call:
1027    case nir_instr_type_jump:
1028       return true;
1029    default:
1030       unreachable("Invalid instruction type");
1031    }
1032 }
1033
1034 static bool
1035 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1036 {
1037    if (!cb(src, state))
1038       return false;
1039    if (!src->is_ssa && src->reg.indirect)
1040       return cb(src->reg.indirect, state);
1041    return true;
1042 }
1043
1044 static bool
1045 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1046                       void *state)
1047 {
1048    if (deref->deref_array_type == nir_deref_array_type_indirect)
1049       return visit_src(&deref->indirect, cb, state);
1050    return true;
1051 }
1052
1053 static bool
1054 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1055 {
1056    nir_deref *cur = &deref->deref;
1057    while (cur != NULL) {
1058       if (cur->deref_type == nir_deref_type_array)
1059          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1060             return false;
1061
1062       cur = cur->child;
1063    }
1064
1065    return true;
1066 }
1067
1068 static bool
1069 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1070 {
1071    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1072       if (!visit_src(&instr->src[i].src, cb, state))
1073          return false;
1074
1075    return true;
1076 }
1077
1078 static bool
1079 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1080 {
1081    for (unsigned i = 0; i < instr->num_srcs; i++)
1082       if (!visit_src(&instr->src[i].src, cb, state))
1083          return false;
1084
1085    if (instr->texture != NULL)
1086       if (!visit_deref_src(instr->texture, cb, state))
1087          return false;
1088
1089    if (instr->sampler != NULL)
1090       if (!visit_deref_src(instr->sampler, cb, state))
1091          return false;
1092
1093    return true;
1094 }
1095
1096 static bool
1097 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1098                     void *state)
1099 {
1100    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1101    for (unsigned i = 0; i < num_srcs; i++)
1102       if (!visit_src(&instr->src[i], cb, state))
1103          return false;
1104
1105    unsigned num_vars =
1106       nir_intrinsic_infos[instr->intrinsic].num_variables;
1107    for (unsigned i = 0; i < num_vars; i++)
1108       if (!visit_deref_src(instr->variables[i], cb, state))
1109          return false;
1110
1111    return true;
1112 }
1113
1114 static bool
1115 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1116 {
1117    return true;
1118 }
1119
1120 static bool
1121 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1122                      void *state)
1123 {
1124    return true;
1125 }
1126
1127 static bool
1128 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1129 {
1130    nir_foreach_phi_src(instr, src) {
1131       if (!visit_src(&src->src, cb, state))
1132          return false;
1133    }
1134
1135    return true;
1136 }
1137
1138 static bool
1139 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1140                         nir_foreach_src_cb cb, void *state)
1141 {
1142    nir_foreach_parallel_copy_entry(instr, entry) {
1143       if (!visit_src(&entry->src, cb, state))
1144          return false;
1145    }
1146
1147    return true;
1148 }
1149
1150 typedef struct {
1151    void *state;
1152    nir_foreach_src_cb cb;
1153 } visit_dest_indirect_state;
1154
1155 static bool
1156 visit_dest_indirect(nir_dest *dest, void *_state)
1157 {
1158    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1159
1160    if (!dest->is_ssa && dest->reg.indirect)
1161       return state->cb(dest->reg.indirect, state->state);
1162
1163    return true;
1164 }
1165
1166 bool
1167 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1168 {
1169    switch (instr->type) {
1170    case nir_instr_type_alu:
1171       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1172          return false;
1173       break;
1174    case nir_instr_type_intrinsic:
1175       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1176          return false;
1177       break;
1178    case nir_instr_type_tex:
1179       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1180          return false;
1181       break;
1182    case nir_instr_type_call:
1183       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1184          return false;
1185       break;
1186    case nir_instr_type_load_const:
1187       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1188          return false;
1189       break;
1190    case nir_instr_type_phi:
1191       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1192          return false;
1193       break;
1194    case nir_instr_type_parallel_copy:
1195       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1196                                    cb, state))
1197          return false;
1198       break;
1199    case nir_instr_type_jump:
1200    case nir_instr_type_ssa_undef:
1201       return true;
1202
1203    default:
1204       unreachable("Invalid instruction type");
1205       break;
1206    }
1207
1208    visit_dest_indirect_state dest_state;
1209    dest_state.state = state;
1210    dest_state.cb = cb;
1211    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1212 }
1213
1214 nir_const_value *
1215 nir_src_as_const_value(nir_src src)
1216 {
1217    if (!src.is_ssa)
1218       return NULL;
1219
1220    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1221       return NULL;
1222
1223    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1224
1225    return &load->value;
1226 }
1227
1228 /**
1229  * Returns true if the source is known to be dynamically uniform. Otherwise it
1230  * returns false which means it may or may not be dynamically uniform but it
1231  * can't be determined.
1232  */
1233 bool
1234 nir_src_is_dynamically_uniform(nir_src src)
1235 {
1236    if (!src.is_ssa)
1237       return false;
1238
1239    /* Constants are trivially dynamically uniform */
1240    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1241       return true;
1242
1243    /* As are uniform variables */
1244    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1245       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1246
1247       if (intr->intrinsic == nir_intrinsic_load_uniform)
1248          return true;
1249    }
1250
1251    /* XXX: this could have many more tests, such as when a sampler function is
1252     * called with dynamically uniform arguments.
1253     */
1254    return false;
1255 }
1256
1257 static void
1258 src_remove_all_uses(nir_src *src)
1259 {
1260    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1261       if (!src_is_valid(src))
1262          continue;
1263
1264       list_del(&src->use_link);
1265    }
1266 }
1267
1268 static void
1269 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1270 {
1271    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1272       if (!src_is_valid(src))
1273          continue;
1274
1275       if (parent_instr) {
1276          src->parent_instr = parent_instr;
1277          if (src->is_ssa)
1278             list_addtail(&src->use_link, &src->ssa->uses);
1279          else
1280             list_addtail(&src->use_link, &src->reg.reg->uses);
1281       } else {
1282          assert(parent_if);
1283          src->parent_if = parent_if;
1284          if (src->is_ssa)
1285             list_addtail(&src->use_link, &src->ssa->if_uses);
1286          else
1287             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1288       }
1289    }
1290 }
1291
1292 void
1293 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1294 {
1295    assert(!src_is_valid(src) || src->parent_instr == instr);
1296
1297    src_remove_all_uses(src);
1298    *src = new_src;
1299    src_add_all_uses(src, instr, NULL);
1300 }
1301
1302 void
1303 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1304 {
1305    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1306
1307    src_remove_all_uses(dest);
1308    src_remove_all_uses(src);
1309    *dest = *src;
1310    *src = NIR_SRC_INIT;
1311    src_add_all_uses(dest, dest_instr, NULL);
1312 }
1313
1314 void
1315 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1316 {
1317    nir_src *src = &if_stmt->condition;
1318    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1319
1320    src_remove_all_uses(src);
1321    *src = new_src;
1322    src_add_all_uses(src, NULL, if_stmt);
1323 }
1324
1325 void
1326 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1327 {
1328    if (dest->is_ssa) {
1329       /* We can only overwrite an SSA destination if it has no uses. */
1330       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1331    } else {
1332       list_del(&dest->reg.def_link);
1333       if (dest->reg.indirect)
1334          src_remove_all_uses(dest->reg.indirect);
1335    }
1336
1337    /* We can't re-write with an SSA def */
1338    assert(!new_dest.is_ssa);
1339
1340    nir_dest_copy(dest, &new_dest, instr);
1341
1342    dest->reg.parent_instr = instr;
1343    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1344
1345    if (dest->reg.indirect)
1346       src_add_all_uses(dest->reg.indirect, instr, NULL);
1347 }
1348
1349 void
1350 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1351                  unsigned num_components, const char *name)
1352 {
1353    def->name = name;
1354    def->parent_instr = instr;
1355    list_inithead(&def->uses);
1356    list_inithead(&def->if_uses);
1357    def->num_components = num_components;
1358
1359    if (instr->block) {
1360       nir_function_impl *impl =
1361          nir_cf_node_get_function(&instr->block->cf_node);
1362
1363       def->index = impl->ssa_alloc++;
1364    } else {
1365       def->index = UINT_MAX;
1366    }
1367 }
1368
1369 void
1370 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1371                  unsigned num_components, const char *name)
1372 {
1373    dest->is_ssa = true;
1374    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1375 }
1376
1377 void
1378 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1379 {
1380    assert(!new_src.is_ssa || def != new_src.ssa);
1381
1382    nir_foreach_use_safe(def, use_src)
1383       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1384
1385    nir_foreach_if_use_safe(def, use_src)
1386       nir_if_rewrite_condition(use_src->parent_if, new_src);
1387 }
1388
1389 static bool
1390 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1391 {
1392    assert(start->block == end->block);
1393
1394    if (between->block != start->block)
1395       return false;
1396
1397    /* Search backwards looking for "between" */
1398    while (start != end) {
1399       if (between == end)
1400          return true;
1401
1402       end = nir_instr_prev(end);
1403       assert(end);
1404    }
1405
1406    return false;
1407 }
1408
1409 /* Replaces all uses of the given SSA def with the given source but only if
1410  * the use comes after the after_me instruction.  This can be useful if you
1411  * are emitting code to fix up the result of some instruction: you can freely
1412  * use the result in that code and then call rewrite_uses_after and pass the
1413  * last fixup instruction as after_me and it will replace all of the uses you
1414  * want without touching the fixup code.
1415  *
1416  * This function assumes that after_me is in the same block as
1417  * def->parent_instr and that after_me comes after def->parent_instr.
1418  */
1419 void
1420 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1421                                nir_instr *after_me)
1422 {
1423    assert(!new_src.is_ssa || def != new_src.ssa);
1424
1425    nir_foreach_use_safe(def, use_src) {
1426       assert(use_src->parent_instr != def->parent_instr);
1427       /* Since def already dominates all of its uses, the only way a use can
1428        * not be dominated by after_me is if it is between def and after_me in
1429        * the instruction list.
1430        */
1431       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1432          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1433    }
1434
1435    nir_foreach_if_use_safe(def, use_src)
1436       nir_if_rewrite_condition(use_src->parent_if, new_src);
1437 }
1438
1439 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1440                             bool reverse, void *state);
1441
1442 static inline bool
1443 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1444 {
1445    if (reverse) {
1446       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1447                                       &if_stmt->else_list) {
1448          if (!foreach_cf_node(node, cb, reverse, state))
1449             return false;
1450       }
1451
1452       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1453                                       &if_stmt->then_list) {
1454          if (!foreach_cf_node(node, cb, reverse, state))
1455             return false;
1456       }
1457    } else {
1458       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1459          if (!foreach_cf_node(node, cb, reverse, state))
1460             return false;
1461       }
1462
1463       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1464          if (!foreach_cf_node(node, cb, reverse, state))
1465             return false;
1466       }
1467    }
1468
1469    return true;
1470 }
1471
1472 static inline bool
1473 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1474 {
1475    if (reverse) {
1476       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1477          if (!foreach_cf_node(node, cb, reverse, state))
1478             return false;
1479       }
1480    } else {
1481       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1482          if (!foreach_cf_node(node, cb, reverse, state))
1483             return false;
1484       }
1485    }
1486
1487    return true;
1488 }
1489
1490 static bool
1491 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1492                 bool reverse, void *state)
1493 {
1494    switch (node->type) {
1495    case nir_cf_node_block:
1496       return cb(nir_cf_node_as_block(node), state);
1497    case nir_cf_node_if:
1498       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1499    case nir_cf_node_loop:
1500       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1501       break;
1502
1503    default:
1504       unreachable("Invalid CFG node type");
1505       break;
1506    }
1507
1508    return false;
1509 }
1510
1511 bool
1512 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1513                              void *state)
1514 {
1515    return foreach_cf_node(node, cb, false, state);
1516 }
1517
1518 bool
1519 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1520 {
1521    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1522       if (!foreach_cf_node(node, cb, false, state))
1523          return false;
1524    }
1525
1526    return cb(impl->end_block, state);
1527 }
1528
1529 bool
1530 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1531                           void *state)
1532 {
1533    if (!cb(impl->end_block, state))
1534       return false;
1535
1536    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1537       if (!foreach_cf_node(node, cb, true, state))
1538          return false;
1539    }
1540
1541    return true;
1542 }
1543
1544 nir_if *
1545 nir_block_get_following_if(nir_block *block)
1546 {
1547    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1548       return NULL;
1549
1550    if (nir_cf_node_is_last(&block->cf_node))
1551       return NULL;
1552
1553    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1554
1555    if (next_node->type != nir_cf_node_if)
1556       return NULL;
1557
1558    return nir_cf_node_as_if(next_node);
1559 }
1560
1561 nir_loop *
1562 nir_block_get_following_loop(nir_block *block)
1563 {
1564    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1565       return NULL;
1566
1567    if (nir_cf_node_is_last(&block->cf_node))
1568       return NULL;
1569
1570    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1571
1572    if (next_node->type != nir_cf_node_loop)
1573       return NULL;
1574
1575    return nir_cf_node_as_loop(next_node);
1576 }
1577 static bool
1578 index_block(nir_block *block, void *state)
1579 {
1580    unsigned *index = state;
1581    block->index = (*index)++;
1582    return true;
1583 }
1584
1585 void
1586 nir_index_blocks(nir_function_impl *impl)
1587 {
1588    unsigned index = 0;
1589
1590    if (impl->valid_metadata & nir_metadata_block_index)
1591       return;
1592
1593    nir_foreach_block(impl, index_block, &index);
1594
1595    impl->num_blocks = index;
1596 }
1597
1598 static bool
1599 index_ssa_def_cb(nir_ssa_def *def, void *state)
1600 {
1601    unsigned *index = (unsigned *) state;
1602    def->index = (*index)++;
1603
1604    return true;
1605 }
1606
1607 static bool
1608 index_ssa_block(nir_block *block, void *state)
1609 {
1610    nir_foreach_instr(block, instr)
1611       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1612
1613    return true;
1614 }
1615
1616 /**
1617  * The indices are applied top-to-bottom which has the very nice property
1618  * that, if A dominates B, then A->index <= B->index.
1619  */
1620 void
1621 nir_index_ssa_defs(nir_function_impl *impl)
1622 {
1623    unsigned index = 0;
1624    nir_foreach_block(impl, index_ssa_block, &index);
1625    impl->ssa_alloc = index;
1626 }
1627
1628 static bool
1629 index_instrs_block(nir_block *block, void *state)
1630 {
1631    unsigned *index = state;
1632    nir_foreach_instr(block, instr)
1633       instr->index = (*index)++;
1634
1635    return true;
1636 }
1637
1638 /**
1639  * The indices are applied top-to-bottom which has the very nice property
1640  * that, if A dominates B, then A->index <= B->index.
1641  */
1642 unsigned
1643 nir_index_instrs(nir_function_impl *impl)
1644 {
1645    unsigned index = 0;
1646    nir_foreach_block(impl, index_instrs_block, &index);
1647    return index;
1648 }
1649
1650 nir_intrinsic_op
1651 nir_intrinsic_from_system_value(gl_system_value val)
1652 {
1653    switch (val) {
1654    case SYSTEM_VALUE_VERTEX_ID:
1655       return nir_intrinsic_load_vertex_id;
1656    case SYSTEM_VALUE_INSTANCE_ID:
1657       return nir_intrinsic_load_instance_id;
1658    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1659       return nir_intrinsic_load_vertex_id_zero_base;
1660    case SYSTEM_VALUE_BASE_VERTEX:
1661       return nir_intrinsic_load_base_vertex;
1662    case SYSTEM_VALUE_INVOCATION_ID:
1663       return nir_intrinsic_load_invocation_id;
1664    case SYSTEM_VALUE_FRONT_FACE:
1665       return nir_intrinsic_load_front_face;
1666    case SYSTEM_VALUE_SAMPLE_ID:
1667       return nir_intrinsic_load_sample_id;
1668    case SYSTEM_VALUE_SAMPLE_POS:
1669       return nir_intrinsic_load_sample_pos;
1670    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1671       return nir_intrinsic_load_sample_mask_in;
1672    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1673       return nir_intrinsic_load_local_invocation_id;
1674    case SYSTEM_VALUE_WORK_GROUP_ID:
1675       return nir_intrinsic_load_work_group_id;
1676    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1677       return nir_intrinsic_load_num_work_groups;
1678    case SYSTEM_VALUE_PRIMITIVE_ID:
1679       return nir_intrinsic_load_primitive_id;
1680    case SYSTEM_VALUE_TESS_COORD:
1681       return nir_intrinsic_load_tess_coord;
1682    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1683       return nir_intrinsic_load_tess_level_outer;
1684    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1685       return nir_intrinsic_load_tess_level_inner;
1686    case SYSTEM_VALUE_VERTICES_IN:
1687       return nir_intrinsic_load_patch_vertices_in;
1688    case SYSTEM_VALUE_HELPER_INVOCATION:
1689       return nir_intrinsic_load_helper_invocation;
1690    default:
1691       unreachable("system value does not directly correspond to intrinsic");
1692    }
1693 }
1694
1695 gl_system_value
1696 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1697 {
1698    switch (intrin) {
1699    case nir_intrinsic_load_vertex_id:
1700       return SYSTEM_VALUE_VERTEX_ID;
1701    case nir_intrinsic_load_instance_id:
1702       return SYSTEM_VALUE_INSTANCE_ID;
1703    case nir_intrinsic_load_vertex_id_zero_base:
1704       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1705    case nir_intrinsic_load_base_vertex:
1706       return SYSTEM_VALUE_BASE_VERTEX;
1707    case nir_intrinsic_load_invocation_id:
1708       return SYSTEM_VALUE_INVOCATION_ID;
1709    case nir_intrinsic_load_front_face:
1710       return SYSTEM_VALUE_FRONT_FACE;
1711    case nir_intrinsic_load_sample_id:
1712       return SYSTEM_VALUE_SAMPLE_ID;
1713    case nir_intrinsic_load_sample_pos:
1714       return SYSTEM_VALUE_SAMPLE_POS;
1715    case nir_intrinsic_load_sample_mask_in:
1716       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1717    case nir_intrinsic_load_local_invocation_id:
1718       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1719    case nir_intrinsic_load_num_work_groups:
1720       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1721    case nir_intrinsic_load_work_group_id:
1722       return SYSTEM_VALUE_WORK_GROUP_ID;
1723    case nir_intrinsic_load_primitive_id:
1724       return SYSTEM_VALUE_PRIMITIVE_ID;
1725    case nir_intrinsic_load_tess_coord:
1726       return SYSTEM_VALUE_TESS_COORD;
1727    case nir_intrinsic_load_tess_level_outer:
1728       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1729    case nir_intrinsic_load_tess_level_inner:
1730       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1731    case nir_intrinsic_load_patch_vertices_in:
1732       return SYSTEM_VALUE_VERTICES_IN;
1733    case nir_intrinsic_load_helper_invocation:
1734       return SYSTEM_VALUE_HELPER_INVOCATION;
1735    default:
1736       unreachable("intrinsic doesn't produce a system value");
1737    }
1738 }