src/glsl/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42
  43    shader->options = options;
  44
  45    exec_list_make_empty(&shader->functions);
  46    exec_list_make_empty(&shader->registers);
  47    exec_list_make_empty(&shader->globals);
  48    exec_list_make_empty(&shader->system_values);
  49    shader->reg_alloc = 0;
  50
  51    shader->num_inputs = 0;
  52    shader->num_outputs = 0;
  53    shader->num_uniforms = 0;
  54
  55    shader->stage = stage;
  56
  57    shader->gs.vertices_out = 0;
  58    shader->gs.invocations = 0;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->num_array_elems = 0;
  74    reg->is_packed = false;
  75    reg->name = NULL;
  76
  77    exec_list_push_tail(list, &reg->node);
  78
  79    return reg;
  80 }
  81
  82 nir_register *
  83 nir_global_reg_create(nir_shader *shader)
  84 {
  85    nir_register *reg = reg_create(shader, &shader->registers);
  86    reg->index = shader->reg_alloc++;
  87    reg->is_global = true;
  88
  89    return reg;
  90 }
  91
  92 nir_register *
  93 nir_local_reg_create(nir_function_impl *impl)
  94 {
  95    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  96    reg->index = impl->reg_alloc++;
  97    reg->is_global = false;
  98
  99    return reg;
 100 }
 101
 102 void
 103 nir_reg_remove(nir_register *reg)
 104 {
 105    exec_node_remove(&reg->node);
 106 }
 107
 108 nir_function *
 109 nir_function_create(nir_shader *shader, const char *name)
 110 {
 111    nir_function *func = ralloc(shader, nir_function);
 112
 113    exec_list_push_tail(&shader->functions, &func->node);
 114    exec_list_make_empty(&func->overload_list);
 115    func->name = ralloc_strdup(func, name);
 116    func->shader = shader;
 117
 118    return func;
 119 }
 120
 121 nir_function_overload *
 122 nir_function_overload_create(nir_function *func)
 123 {
 124    void *mem_ctx = ralloc_parent(func);
 125
 126    nir_function_overload *overload = ralloc(mem_ctx, nir_function_overload);
 127
 128    overload->num_params = 0;
 129    overload->params = NULL;
 130    overload->return_type = glsl_void_type();
 131    overload->impl = NULL;
 132
 133    exec_list_push_tail(&func->overload_list, &overload->node);
 134    overload->function = func;
 135
 136    return overload;
 137 }
 138
 139 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 140 {
 141    dest->is_ssa = src->is_ssa;
 142    if (src->is_ssa) {
 143       dest->ssa = src->ssa;
 144    } else {
 145       dest->reg.base_offset = src->reg.base_offset;
 146       dest->reg.reg = src->reg.reg;
 147       if (src->reg.indirect) {
 148          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 149          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 150       } else {
 151          dest->reg.indirect = NULL;
 152       }
 153    }
 154 }
 155
 156 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 157 {
 158    /* Copying an SSA definition makes no sense whatsoever. */
 159    assert(!src->is_ssa);
 160
 161    dest->is_ssa = false;
 162
 163    dest->reg.base_offset = src->reg.base_offset;
 164    dest->reg.reg = src->reg.reg;
 165    if (src->reg.indirect) {
 166       dest->reg.indirect = ralloc(instr, nir_src);
 167       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 168    } else {
 169       dest->reg.indirect = NULL;
 170    }
 171 }
 172
 173 void
 174 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 175                  nir_alu_instr *instr)
 176 {
 177    nir_src_copy(&dest->src, &src->src, &instr->instr);
 178    dest->abs = src->abs;
 179    dest->negate = src->negate;
 180    for (unsigned i = 0; i < 4; i++)
 181       dest->swizzle[i] = src->swizzle[i];
 182 }
 183
 184 void
 185 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 186                   nir_alu_instr *instr)
 187 {
 188    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 189    dest->write_mask = src->write_mask;
 190    dest->saturate = src->saturate;
 191 }
 192
 193
 194 static void
 195 cf_init(nir_cf_node *node, nir_cf_node_type type)
 196 {
 197    exec_node_init(&node->node);
 198    node->parent = NULL;
 199    node->type = type;
 200 }
 201
 202 nir_function_impl *
 203 nir_function_impl_create(nir_function_overload *overload)
 204 {
 205    assert(overload->impl == NULL);
 206
 207    void *mem_ctx = ralloc_parent(overload);
 208
 209    nir_function_impl *impl = ralloc(mem_ctx, nir_function_impl);
 210
 211    overload->impl = impl;
 212    impl->overload = overload;
 213
 214    cf_init(&impl->cf_node, nir_cf_node_function);
 215
 216    exec_list_make_empty(&impl->body);
 217    exec_list_make_empty(&impl->registers);
 218    exec_list_make_empty(&impl->locals);
 219    impl->num_params = 0;
 220    impl->params = NULL;
 221    impl->return_var = NULL;
 222    impl->reg_alloc = 0;
 223    impl->ssa_alloc = 0;
 224    impl->valid_metadata = nir_metadata_none;
 225
 226    /* create start & end blocks */
 227    nir_block *start_block = nir_block_create(mem_ctx);
 228    nir_block *end_block = nir_block_create(mem_ctx);
 229    start_block->cf_node.parent = &impl->cf_node;
 230    end_block->cf_node.parent = &impl->cf_node;
 231    impl->end_block = end_block;
 232
 233    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 234
 235    start_block->successors[0] = end_block;
 236    _mesa_set_add(end_block->predecessors, start_block);
 237    return impl;
 238 }
 239
 240 nir_block *
 241 nir_block_create(void *mem_ctx)
 242 {
 243    nir_block *block = ralloc(mem_ctx, nir_block);
 244
 245    cf_init(&block->cf_node, nir_cf_node_block);
 246
 247    block->successors[0] = block->successors[1] = NULL;
 248    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 249                                           _mesa_key_pointer_equal);
 250    block->imm_dom = NULL;
 251    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 252                                           _mesa_key_pointer_equal);
 253
 254    exec_list_make_empty(&block->instr_list);
 255
 256    return block;
 257 }
 258
 259 static inline void
 260 src_init(nir_src *src)
 261 {
 262    src->is_ssa = false;
 263    src->reg.reg = NULL;
 264    src->reg.indirect = NULL;
 265    src->reg.base_offset = 0;
 266 }
 267
 268 nir_if *
 269 nir_if_create(void *mem_ctx)
 270 {
 271    nir_if *if_stmt = ralloc(mem_ctx, nir_if);
 272
 273    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 274    src_init(&if_stmt->condition);
 275
 276    nir_block *then = nir_block_create(mem_ctx);
 277    exec_list_make_empty(&if_stmt->then_list);
 278    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 279    then->cf_node.parent = &if_stmt->cf_node;
 280
 281    nir_block *else_stmt = nir_block_create(mem_ctx);
 282    exec_list_make_empty(&if_stmt->else_list);
 283    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 284    else_stmt->cf_node.parent = &if_stmt->cf_node;
 285
 286    return if_stmt;
 287 }
 288
 289 nir_loop *
 290 nir_loop_create(void *mem_ctx)
 291 {
 292    nir_loop *loop = ralloc(mem_ctx, nir_loop);
 293
 294    cf_init(&loop->cf_node, nir_cf_node_loop);
 295
 296    nir_block *body = nir_block_create(mem_ctx);
 297    exec_list_make_empty(&loop->body);
 298    exec_list_push_tail(&loop->body, &body->cf_node.node);
 299    body->cf_node.parent = &loop->cf_node;
 300
 301    body->successors[0] = body;
 302    _mesa_set_add(body->predecessors, body);
 303
 304    return loop;
 305 }
 306
 307 static void
 308 instr_init(nir_instr *instr, nir_instr_type type)
 309 {
 310    instr->type = type;
 311    instr->block = NULL;
 312    exec_node_init(&instr->node);
 313 }
 314
 315 static void
 316 dest_init(nir_dest *dest)
 317 {
 318    dest->is_ssa = false;
 319    dest->reg.reg = NULL;
 320    dest->reg.indirect = NULL;
 321    dest->reg.base_offset = 0;
 322 }
 323
 324 static void
 325 alu_dest_init(nir_alu_dest *dest)
 326 {
 327    dest_init(&dest->dest);
 328    dest->saturate = false;
 329    dest->write_mask = 0xf;
 330 }
 331
 332 static void
 333 alu_src_init(nir_alu_src *src)
 334 {
 335    src_init(&src->src);
 336    src->abs = src->negate = false;
 337    src->swizzle[0] = 0;
 338    src->swizzle[1] = 1;
 339    src->swizzle[2] = 2;
 340    src->swizzle[3] = 3;
 341 }
 342
 343 nir_alu_instr *
 344 nir_alu_instr_create(nir_shader *shader, nir_op op)
 345 {
 346    unsigned num_srcs = nir_op_infos[op].num_inputs;
 347    nir_alu_instr *instr =
 348       ralloc_size(shader,
 349                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 350
 351    instr_init(&instr->instr, nir_instr_type_alu);
 352    instr->op = op;
 353    alu_dest_init(&instr->dest);
 354    for (unsigned i = 0; i < num_srcs; i++)
 355       alu_src_init(&instr->src[i]);
 356
 357    return instr;
 358 }
 359
 360 nir_jump_instr *
 361 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 362 {
 363    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 364    instr_init(&instr->instr, nir_instr_type_jump);
 365    instr->type = type;
 366    return instr;
 367 }
 368
 369 nir_load_const_instr *
 370 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 371 {
 372    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 373    instr_init(&instr->instr, nir_instr_type_load_const);
 374
 375    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 376
 377    return instr;
 378 }
 379
 380 nir_intrinsic_instr *
 381 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 382 {
 383    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 384    nir_intrinsic_instr *instr =
 385       ralloc_size(shader,
 386                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 387
 388    instr_init(&instr->instr, nir_instr_type_intrinsic);
 389    instr->intrinsic = op;
 390
 391    if (nir_intrinsic_infos[op].has_dest)
 392       dest_init(&instr->dest);
 393
 394    for (unsigned i = 0; i < num_srcs; i++)
 395       src_init(&instr->src[i]);
 396
 397    return instr;
 398 }
 399
 400 nir_call_instr *
 401 nir_call_instr_create(nir_shader *shader, nir_function_overload *callee)
 402 {
 403    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 404    instr_init(&instr->instr, nir_instr_type_call);
 405
 406    instr->callee = callee;
 407    instr->num_params = callee->num_params;
 408    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 409    instr->return_deref = NULL;
 410
 411    return instr;
 412 }
 413
 414 nir_tex_instr *
 415 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 416 {
 417    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 418    instr_init(&instr->instr, nir_instr_type_tex);
 419
 420    dest_init(&instr->dest);
 421
 422    instr->num_srcs = num_srcs;
 423    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 424    for (unsigned i = 0; i < num_srcs; i++)
 425       src_init(&instr->src[i].src);
 426
 427    instr->sampler_index = 0;
 428    instr->sampler_array_size = 0;
 429    instr->sampler = NULL;
 430
 431    return instr;
 432 }
 433
 434 nir_phi_instr *
 435 nir_phi_instr_create(nir_shader *shader)
 436 {
 437    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 438    instr_init(&instr->instr, nir_instr_type_phi);
 439
 440    dest_init(&instr->dest);
 441    exec_list_make_empty(&instr->srcs);
 442    return instr;
 443 }
 444
 445 nir_parallel_copy_instr *
 446 nir_parallel_copy_instr_create(nir_shader *shader)
 447 {
 448    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 449    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 450
 451    exec_list_make_empty(&instr->entries);
 452
 453    return instr;
 454 }
 455
 456 nir_ssa_undef_instr *
 457 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 458 {
 459    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 460    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 461
 462    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 463
 464    return instr;
 465 }
 466
 467 nir_deref_var *
 468 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 469 {
 470    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 471    deref->deref.deref_type = nir_deref_type_var;
 472    deref->deref.child = NULL;
 473    deref->deref.type = var->type;
 474    deref->var = var;
 475    return deref;
 476 }
 477
 478 nir_deref_array *
 479 nir_deref_array_create(void *mem_ctx)
 480 {
 481    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 482    deref->deref.deref_type = nir_deref_type_array;
 483    deref->deref.child = NULL;
 484    deref->deref_array_type = nir_deref_array_type_direct;
 485    src_init(&deref->indirect);
 486    deref->base_offset = 0;
 487    return deref;
 488 }
 489
 490 nir_deref_struct *
 491 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 492 {
 493    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 494    deref->deref.deref_type = nir_deref_type_struct;
 495    deref->deref.child = NULL;
 496    deref->index = field_index;
 497    return deref;
 498 }
 499
 500 static nir_deref_var *
 501 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 502 {
 503    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 504    ret->deref.type = deref->deref.type;
 505    if (deref->deref.child)
 506       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 507    return ret;
 508 }
 509
 510 static nir_deref_array *
 511 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 512 {
 513    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 514    ret->base_offset = deref->base_offset;
 515    ret->deref_array_type = deref->deref_array_type;
 516    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 517       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 518    }
 519    ret->deref.type = deref->deref.type;
 520    if (deref->deref.child)
 521       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 522    return ret;
 523 }
 524
 525 static nir_deref_struct *
 526 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 527 {
 528    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 529    ret->deref.type = deref->deref.type;
 530    if (deref->deref.child)
 531       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 532    return ret;
 533 }
 534
 535 nir_deref *
 536 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 537 {
 538    switch (deref->deref_type) {
 539    case nir_deref_type_var:
 540       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 541    case nir_deref_type_array:
 542       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 543    case nir_deref_type_struct:
 544       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 545    default:
 546       unreachable("Invalid dereference type");
 547    }
 548
 549    return NULL;
 550 }
 551
 552 /* Returns a load_const instruction that represents the constant
 553  * initializer for the given deref chain.  The caller is responsible for
 554  * ensuring that there actually is a constant initializer.
 555  */
 556 nir_load_const_instr *
 557 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 558 {
 559    nir_constant *constant = deref->var->constant_initializer;
 560    assert(constant);
 561
 562    const nir_deref *tail = &deref->deref;
 563    unsigned matrix_offset = 0;
 564    while (tail->child) {
 565       switch (tail->child->deref_type) {
 566       case nir_deref_type_array: {
 567          nir_deref_array *arr = nir_deref_as_array(tail->child);
 568          assert(arr->deref_array_type == nir_deref_array_type_direct);
 569          if (glsl_type_is_matrix(tail->type)) {
 570             assert(arr->deref.child == NULL);
 571             matrix_offset = arr->base_offset;
 572          } else {
 573             constant = constant->elements[arr->base_offset];
 574          }
 575          break;
 576       }
 577
 578       case nir_deref_type_struct: {
 579          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 580          break;
 581       }
 582
 583       default:
 584          unreachable("Invalid deref child type");
 585       }
 586
 587       tail = tail->child;
 588    }
 589
 590    nir_load_const_instr *load =
 591       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 592
 593    matrix_offset *= load->def.num_components;
 594    for (unsigned i = 0; i < load->def.num_components; i++) {
 595       switch (glsl_get_base_type(tail->type)) {
 596       case GLSL_TYPE_FLOAT:
 597       case GLSL_TYPE_INT:
 598       case GLSL_TYPE_UINT:
 599          load->value.u[i] = constant->value.u[matrix_offset + i];
 600          break;
 601       case GLSL_TYPE_BOOL:
 602          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 603                              NIR_TRUE : NIR_FALSE;
 604          break;
 605       default:
 606          unreachable("Invalid immediate type");
 607       }
 608    }
 609
 610    return load;
 611 }
 612
 613 nir_function_impl *
 614 nir_cf_node_get_function(nir_cf_node *node)
 615 {
 616    while (node->type != nir_cf_node_function) {
 617       node = node->parent;
 618    }
 619
 620    return nir_cf_node_as_function(node);
 621 }
 622
 623 static bool
 624 add_use_cb(nir_src *src, void *state)
 625 {
 626    nir_instr *instr = state;
 627
 628    src->parent_instr = instr;
 629    list_addtail(&src->use_link,
 630                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 631
 632    return true;
 633 }
 634
 635 static bool
 636 add_ssa_def_cb(nir_ssa_def *def, void *state)
 637 {
 638    nir_instr *instr = state;
 639
 640    if (instr->block && def->index == UINT_MAX) {
 641       nir_function_impl *impl =
 642          nir_cf_node_get_function(&instr->block->cf_node);
 643
 644       def->index = impl->ssa_alloc++;
 645    }
 646
 647    return true;
 648 }
 649
 650 static bool
 651 add_reg_def_cb(nir_dest *dest, void *state)
 652 {
 653    nir_instr *instr = state;
 654
 655    if (!dest->is_ssa) {
 656       dest->reg.parent_instr = instr;
 657       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 658    }
 659
 660    return true;
 661 }
 662
 663 static void
 664 add_defs_uses(nir_instr *instr)
 665 {
 666    nir_foreach_src(instr, add_use_cb, instr);
 667    nir_foreach_dest(instr, add_reg_def_cb, instr);
 668    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 669 }
 670
 671 void
 672 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 673 {
 674    switch (cursor.option) {
 675    case nir_cursor_before_block:
 676       /* Only allow inserting jumps into empty blocks. */
 677       if (instr->type == nir_instr_type_jump)
 678          assert(exec_list_is_empty(&cursor.block->instr_list));
 679
 680       instr->block = cursor.block;
 681       add_defs_uses(instr);
 682       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 683       break;
 684    case nir_cursor_after_block: {
 685       /* Inserting instructions after a jump is illegal. */
 686       nir_instr *last = nir_block_last_instr(cursor.block);
 687       assert(last == NULL || last->type != nir_instr_type_jump);
 688       (void) last;
 689
 690       instr->block = cursor.block;
 691       add_defs_uses(instr);
 692       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 693       break;
 694    }
 695    case nir_cursor_before_instr:
 696       assert(instr->type != nir_instr_type_jump);
 697       instr->block = cursor.instr->block;
 698       add_defs_uses(instr);
 699       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 700       break;
 701    case nir_cursor_after_instr:
 702       /* Inserting instructions after a jump is illegal. */
 703       assert(cursor.instr->type != nir_instr_type_jump);
 704
 705       /* Only allow inserting jumps at the end of the block. */
 706       if (instr->type == nir_instr_type_jump)
 707          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 708
 709       instr->block = cursor.instr->block;
 710       add_defs_uses(instr);
 711       exec_node_insert_after(&cursor.instr->node, &instr->node);
 712       break;
 713    }
 714
 715    if (instr->type == nir_instr_type_jump)
 716       nir_handle_add_jump(instr->block);
 717 }
 718
 719 static bool
 720 src_is_valid(const nir_src *src)
 721 {
 722    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 723 }
 724
 725 static bool
 726 remove_use_cb(nir_src *src, void *state)
 727 {
 728    if (src_is_valid(src))
 729       list_del(&src->use_link);
 730
 731    return true;
 732 }
 733
 734 static bool
 735 remove_def_cb(nir_dest *dest, void *state)
 736 {
 737    if (!dest->is_ssa)
 738       list_del(&dest->reg.def_link);
 739
 740    return true;
 741 }
 742
 743 static void
 744 remove_defs_uses(nir_instr *instr)
 745 {
 746    nir_foreach_dest(instr, remove_def_cb, instr);
 747    nir_foreach_src(instr, remove_use_cb, instr);
 748 }
 749
 750 void nir_instr_remove(nir_instr *instr)
 751 {
 752    remove_defs_uses(instr);
 753    exec_node_remove(&instr->node);
 754
 755    if (instr->type == nir_instr_type_jump) {
 756       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 757       nir_handle_remove_jump(instr->block, jump_instr->type);
 758    }
 759 }
 760
 761 /*@}*/
 762
 763 void
 764 nir_index_local_regs(nir_function_impl *impl)
 765 {
 766    unsigned index = 0;
 767    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 768       reg->index = index++;
 769    }
 770    impl->reg_alloc = index;
 771 }
 772
 773 void
 774 nir_index_global_regs(nir_shader *shader)
 775 {
 776    unsigned index = 0;
 777    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 778       reg->index = index++;
 779    }
 780    shader->reg_alloc = index;
 781 }
 782
 783 static bool
 784 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 785 {
 786    return cb(&instr->dest.dest, state);
 787 }
 788
 789 static bool
 790 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 791                      void *state)
 792 {
 793    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 794       return cb(&instr->dest, state);
 795
 796    return true;
 797 }
 798
 799 static bool
 800 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 801                    void *state)
 802 {
 803    return cb(&instr->dest, state);
 804 }
 805
 806 static bool
 807 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 808 {
 809    return cb(&instr->dest, state);
 810 }
 811
 812 static bool
 813 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 814                          nir_foreach_dest_cb cb, void *state)
 815 {
 816    nir_foreach_parallel_copy_entry(instr, entry) {
 817       if (!cb(&entry->dest, state))
 818          return false;
 819    }
 820
 821    return true;
 822 }
 823
 824 bool
 825 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 826 {
 827    switch (instr->type) {
 828    case nir_instr_type_alu:
 829       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 830    case nir_instr_type_intrinsic:
 831       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 832    case nir_instr_type_tex:
 833       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 834    case nir_instr_type_phi:
 835       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 836    case nir_instr_type_parallel_copy:
 837       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 838                                       cb, state);
 839
 840    case nir_instr_type_load_const:
 841    case nir_instr_type_ssa_undef:
 842    case nir_instr_type_call:
 843    case nir_instr_type_jump:
 844       break;
 845
 846    default:
 847       unreachable("Invalid instruction type");
 848       break;
 849    }
 850
 851    return true;
 852 }
 853
 854 struct foreach_ssa_def_state {
 855    nir_foreach_ssa_def_cb cb;
 856    void *client_state;
 857 };
 858
 859 static inline bool
 860 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
 861 {
 862    struct foreach_ssa_def_state *state = void_state;
 863
 864    if (dest->is_ssa)
 865       return state->cb(&dest->ssa, state->client_state);
 866    else
 867       return true;
 868 }
 869
 870 bool
 871 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
 872 {
 873    switch (instr->type) {
 874    case nir_instr_type_alu:
 875    case nir_instr_type_tex:
 876    case nir_instr_type_intrinsic:
 877    case nir_instr_type_phi:
 878    case nir_instr_type_parallel_copy: {
 879       struct foreach_ssa_def_state foreach_state = {cb, state};
 880       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
 881    }
 882
 883    case nir_instr_type_load_const:
 884       return cb(&nir_instr_as_load_const(instr)->def, state);
 885    case nir_instr_type_ssa_undef:
 886       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
 887    case nir_instr_type_call:
 888    case nir_instr_type_jump:
 889       return true;
 890    default:
 891       unreachable("Invalid instruction type");
 892    }
 893 }
 894
 895 static bool
 896 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
 897 {
 898    if (!cb(src, state))
 899       return false;
 900    if (!src->is_ssa && src->reg.indirect)
 901       return cb(src->reg.indirect, state);
 902    return true;
 903 }
 904
 905 static bool
 906 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
 907                       void *state)
 908 {
 909    if (deref->deref_array_type == nir_deref_array_type_indirect)
 910       return visit_src(&deref->indirect, cb, state);
 911    return true;
 912 }
 913
 914 static bool
 915 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
 916 {
 917    nir_deref *cur = &deref->deref;
 918    while (cur != NULL) {
 919       if (cur->deref_type == nir_deref_type_array)
 920          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
 921             return false;
 922
 923       cur = cur->child;
 924    }
 925
 926    return true;
 927 }
 928
 929 static bool
 930 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
 931 {
 932    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
 933       if (!visit_src(&instr->src[i].src, cb, state))
 934          return false;
 935
 936    return true;
 937 }
 938
 939 static bool
 940 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
 941 {
 942    for (unsigned i = 0; i < instr->num_srcs; i++)
 943       if (!visit_src(&instr->src[i].src, cb, state))
 944          return false;
 945
 946    if (instr->sampler != NULL)
 947       if (!visit_deref_src(instr->sampler, cb, state))
 948          return false;
 949
 950    return true;
 951 }
 952
 953 static bool
 954 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
 955                     void *state)
 956 {
 957    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
 958    for (unsigned i = 0; i < num_srcs; i++)
 959       if (!visit_src(&instr->src[i], cb, state))
 960          return false;
 961
 962    unsigned num_vars =
 963       nir_intrinsic_infos[instr->intrinsic].num_variables;
 964    for (unsigned i = 0; i < num_vars; i++)
 965       if (!visit_deref_src(instr->variables[i], cb, state))
 966          return false;
 967
 968    return true;
 969 }
 970
 971 static bool
 972 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
 973 {
 974    return true;
 975 }
 976
 977 static bool
 978 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
 979                      void *state)
 980 {
 981    return true;
 982 }
 983
 984 static bool
 985 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
 986 {
 987    nir_foreach_phi_src(instr, src) {
 988       if (!visit_src(&src->src, cb, state))
 989          return false;
 990    }
 991
 992    return true;
 993 }
 994
 995 static bool
 996 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
 997                         nir_foreach_src_cb cb, void *state)
 998 {
 999    nir_foreach_parallel_copy_entry(instr, entry) {
1000       if (!visit_src(&entry->src, cb, state))
1001          return false;
1002    }
1003
1004    return true;
1005 }
1006
1007 typedef struct {
1008    void *state;
1009    nir_foreach_src_cb cb;
1010 } visit_dest_indirect_state;
1011
1012 static bool
1013 visit_dest_indirect(nir_dest *dest, void *_state)
1014 {
1015    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1016
1017    if (!dest->is_ssa && dest->reg.indirect)
1018       return state->cb(dest->reg.indirect, state->state);
1019
1020    return true;
1021 }
1022
1023 bool
1024 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1025 {
1026    switch (instr->type) {
1027    case nir_instr_type_alu:
1028       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1029          return false;
1030       break;
1031    case nir_instr_type_intrinsic:
1032       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1033          return false;
1034       break;
1035    case nir_instr_type_tex:
1036       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1037          return false;
1038       break;
1039    case nir_instr_type_call:
1040       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1041          return false;
1042       break;
1043    case nir_instr_type_load_const:
1044       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1045          return false;
1046       break;
1047    case nir_instr_type_phi:
1048       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1049          return false;
1050       break;
1051    case nir_instr_type_parallel_copy:
1052       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1053                                    cb, state))
1054          return false;
1055       break;
1056    case nir_instr_type_jump:
1057    case nir_instr_type_ssa_undef:
1058       return true;
1059
1060    default:
1061       unreachable("Invalid instruction type");
1062       break;
1063    }
1064
1065    visit_dest_indirect_state dest_state;
1066    dest_state.state = state;
1067    dest_state.cb = cb;
1068    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1069 }
1070
1071 nir_const_value *
1072 nir_src_as_const_value(nir_src src)
1073 {
1074    if (!src.is_ssa)
1075       return NULL;
1076
1077    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1078       return NULL;
1079
1080    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1081
1082    return &load->value;
1083 }
1084
1085 bool
1086 nir_srcs_equal(nir_src src1, nir_src src2)
1087 {
1088    if (src1.is_ssa) {
1089       if (src2.is_ssa) {
1090          return src1.ssa == src2.ssa;
1091       } else {
1092          return false;
1093       }
1094    } else {
1095       if (src2.is_ssa) {
1096          return false;
1097       } else {
1098          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
1099             return false;
1100
1101          if (src1.reg.indirect) {
1102             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
1103                return false;
1104          }
1105
1106          return src1.reg.reg == src2.reg.reg &&
1107                 src1.reg.base_offset == src2.reg.base_offset;
1108       }
1109    }
1110 }
1111
1112 static void
1113 src_remove_all_uses(nir_src *src)
1114 {
1115    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1116       if (!src_is_valid(src))
1117          continue;
1118
1119       list_del(&src->use_link);
1120    }
1121 }
1122
1123 static void
1124 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1125 {
1126    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1127       if (!src_is_valid(src))
1128          continue;
1129
1130       if (parent_instr) {
1131          src->parent_instr = parent_instr;
1132          if (src->is_ssa)
1133             list_addtail(&src->use_link, &src->ssa->uses);
1134          else
1135             list_addtail(&src->use_link, &src->reg.reg->uses);
1136       } else {
1137          assert(parent_if);
1138          src->parent_if = parent_if;
1139          if (src->is_ssa)
1140             list_addtail(&src->use_link, &src->ssa->if_uses);
1141          else
1142             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1143       }
1144    }
1145 }
1146
1147 void
1148 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1149 {
1150    assert(!src_is_valid(src) || src->parent_instr == instr);
1151
1152    src_remove_all_uses(src);
1153    *src = new_src;
1154    src_add_all_uses(src, instr, NULL);
1155 }
1156
1157 void
1158 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1159 {
1160    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1161
1162    src_remove_all_uses(dest);
1163    src_remove_all_uses(src);
1164    *dest = *src;
1165    *src = NIR_SRC_INIT;
1166    src_add_all_uses(dest, dest_instr, NULL);
1167 }
1168
1169 void
1170 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1171 {
1172    nir_src *src = &if_stmt->condition;
1173    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1174
1175    src_remove_all_uses(src);
1176    *src = new_src;
1177    src_add_all_uses(src, NULL, if_stmt);
1178 }
1179
1180 void
1181 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1182 {
1183    if (dest->is_ssa) {
1184       /* We can only overwrite an SSA destination if it has no uses. */
1185       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1186    } else {
1187       list_del(&dest->reg.def_link);
1188       if (dest->reg.indirect)
1189          src_remove_all_uses(dest->reg.indirect);
1190    }
1191
1192    /* We can't re-write with an SSA def */
1193    assert(!new_dest.is_ssa);
1194
1195    nir_dest_copy(dest, &new_dest, instr);
1196
1197    dest->reg.parent_instr = instr;
1198    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1199
1200    if (dest->reg.indirect)
1201       src_add_all_uses(dest->reg.indirect, instr, NULL);
1202 }
1203
1204 void
1205 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1206                  unsigned num_components, const char *name)
1207 {
1208    def->name = name;
1209    def->parent_instr = instr;
1210    list_inithead(&def->uses);
1211    list_inithead(&def->if_uses);
1212    def->num_components = num_components;
1213
1214    if (instr->block) {
1215       nir_function_impl *impl =
1216          nir_cf_node_get_function(&instr->block->cf_node);
1217
1218       def->index = impl->ssa_alloc++;
1219    } else {
1220       def->index = UINT_MAX;
1221    }
1222 }
1223
1224 void
1225 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1226                  unsigned num_components, const char *name)
1227 {
1228    dest->is_ssa = true;
1229    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1230 }
1231
1232 void
1233 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1234 {
1235    assert(!new_src.is_ssa || def != new_src.ssa);
1236
1237    nir_foreach_use_safe(def, use_src) {
1238       nir_instr *src_parent_instr = use_src->parent_instr;
1239       list_del(&use_src->use_link);
1240       nir_src_copy(use_src, &new_src, src_parent_instr);
1241       src_add_all_uses(use_src, src_parent_instr, NULL);
1242    }
1243
1244    nir_foreach_if_use_safe(def, use_src) {
1245       nir_if *src_parent_if = use_src->parent_if;
1246       list_del(&use_src->use_link);
1247       nir_src_copy(use_src, &new_src, src_parent_if);
1248       src_add_all_uses(use_src, NULL, src_parent_if);
1249    }
1250 }
1251
1252
1253 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1254                             bool reverse, void *state);
1255
1256 static inline bool
1257 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1258 {
1259    if (reverse) {
1260       foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1261                                       &if_stmt->else_list) {
1262          if (!foreach_cf_node(node, cb, reverse, state))
1263             return false;
1264       }
1265
1266       foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1267                                       &if_stmt->then_list) {
1268          if (!foreach_cf_node(node, cb, reverse, state))
1269             return false;
1270       }
1271    } else {
1272       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1273          if (!foreach_cf_node(node, cb, reverse, state))
1274             return false;
1275       }
1276
1277       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1278          if (!foreach_cf_node(node, cb, reverse, state))
1279             return false;
1280       }
1281    }
1282
1283    return true;
1284 }
1285
1286 static inline bool
1287 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1288 {
1289    if (reverse) {
1290       foreach_list_typed_safe_reverse(nir_cf_node, node, node, &loop->body) {
1291          if (!foreach_cf_node(node, cb, reverse, state))
1292             return false;
1293       }
1294    } else {
1295       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1296          if (!foreach_cf_node(node, cb, reverse, state))
1297             return false;
1298       }
1299    }
1300
1301    return true;
1302 }
1303
1304 static bool
1305 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1306                 bool reverse, void *state)
1307 {
1308    switch (node->type) {
1309    case nir_cf_node_block:
1310       return cb(nir_cf_node_as_block(node), state);
1311    case nir_cf_node_if:
1312       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1313    case nir_cf_node_loop:
1314       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1315       break;
1316
1317    default:
1318       unreachable("Invalid CFG node type");
1319       break;
1320    }
1321
1322    return false;
1323 }
1324
1325 bool
1326 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1327                              void *state)
1328 {
1329    return foreach_cf_node(node, cb, false, state);
1330 }
1331
1332 bool
1333 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1334 {
1335    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1336       if (!foreach_cf_node(node, cb, false, state))
1337          return false;
1338    }
1339
1340    return cb(impl->end_block, state);
1341 }
1342
1343 bool
1344 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1345                           void *state)
1346 {
1347    if (!cb(impl->end_block, state))
1348       return false;
1349
1350    foreach_list_typed_safe_reverse(nir_cf_node, node, node, &impl->body) {
1351       if (!foreach_cf_node(node, cb, true, state))
1352          return false;
1353    }
1354
1355    return true;
1356 }
1357
1358 nir_if *
1359 nir_block_get_following_if(nir_block *block)
1360 {
1361    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1362       return NULL;
1363
1364    if (nir_cf_node_is_last(&block->cf_node))
1365       return NULL;
1366
1367    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1368
1369    if (next_node->type != nir_cf_node_if)
1370       return NULL;
1371
1372    return nir_cf_node_as_if(next_node);
1373 }
1374
1375 nir_loop *
1376 nir_block_get_following_loop(nir_block *block)
1377 {
1378    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1379       return NULL;
1380
1381    if (nir_cf_node_is_last(&block->cf_node))
1382       return NULL;
1383
1384    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1385
1386    if (next_node->type != nir_cf_node_loop)
1387       return NULL;
1388
1389    return nir_cf_node_as_loop(next_node);
1390 }
1391 static bool
1392 index_block(nir_block *block, void *state)
1393 {
1394    unsigned *index = state;
1395    block->index = (*index)++;
1396    return true;
1397 }
1398
1399 void
1400 nir_index_blocks(nir_function_impl *impl)
1401 {
1402    unsigned index = 0;
1403
1404    if (impl->valid_metadata & nir_metadata_block_index)
1405       return;
1406
1407    nir_foreach_block(impl, index_block, &index);
1408
1409    impl->num_blocks = index;
1410 }
1411
1412 static bool
1413 index_ssa_def_cb(nir_ssa_def *def, void *state)
1414 {
1415    unsigned *index = (unsigned *) state;
1416    def->index = (*index)++;
1417
1418    return true;
1419 }
1420
1421 static bool
1422 index_ssa_block(nir_block *block, void *state)
1423 {
1424    nir_foreach_instr(block, instr)
1425       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1426
1427    return true;
1428 }
1429
1430 /**
1431  * The indices are applied top-to-bottom which has the very nice property
1432  * that, if A dominates B, then A->index <= B->index.
1433  */
1434 void
1435 nir_index_ssa_defs(nir_function_impl *impl)
1436 {
1437    unsigned index = 0;
1438    nir_foreach_block(impl, index_ssa_block, &index);
1439    impl->ssa_alloc = index;
1440 }
1441
1442 static bool
1443 index_instrs_block(nir_block *block, void *state)
1444 {
1445    unsigned *index = state;
1446    nir_foreach_instr(block, instr)
1447       instr->index = (*index)++;
1448
1449    return true;
1450 }
1451
1452 /**
1453  * The indices are applied top-to-bottom which has the very nice property
1454  * that, if A dominates B, then A->index <= B->index.
1455  */
1456 unsigned
1457 nir_index_instrs(nir_function_impl *impl)
1458 {
1459    unsigned index = 0;
1460    nir_foreach_block(impl, index_instrs_block, &index);
1461    return index;
1462 }
1463
1464 nir_intrinsic_op
1465 nir_intrinsic_from_system_value(gl_system_value val)
1466 {
1467    switch (val) {
1468    case SYSTEM_VALUE_VERTEX_ID:
1469       return nir_intrinsic_load_vertex_id;
1470    case SYSTEM_VALUE_INSTANCE_ID:
1471       return nir_intrinsic_load_instance_id;
1472    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1473       return nir_intrinsic_load_vertex_id_zero_base;
1474    case SYSTEM_VALUE_BASE_VERTEX:
1475       return nir_intrinsic_load_base_vertex;
1476    case SYSTEM_VALUE_INVOCATION_ID:
1477       return nir_intrinsic_load_invocation_id;
1478    case SYSTEM_VALUE_FRONT_FACE:
1479       return nir_intrinsic_load_front_face;
1480    case SYSTEM_VALUE_SAMPLE_ID:
1481       return nir_intrinsic_load_sample_id;
1482    case SYSTEM_VALUE_SAMPLE_POS:
1483       return nir_intrinsic_load_sample_pos;
1484    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1485       return nir_intrinsic_load_sample_mask_in;
1486    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1487       return nir_intrinsic_load_local_invocation_id;
1488    case SYSTEM_VALUE_WORK_GROUP_ID:
1489       return nir_intrinsic_load_work_group_id;
1490    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1491       return nir_intrinsic_load_num_work_groups;
1492    /* FINISHME: Add tessellation intrinsics.
1493    case SYSTEM_VALUE_TESS_COORD:
1494    case SYSTEM_VALUE_VERTICES_IN:
1495    case SYSTEM_VALUE_PRIMITIVE_ID:
1496    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1497    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1498     */
1499    default:
1500       unreachable("system value does not directly correspond to intrinsic");
1501    }
1502 }
1503
1504 gl_system_value
1505 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1506 {
1507    switch (intrin) {
1508    case nir_intrinsic_load_vertex_id:
1509       return SYSTEM_VALUE_VERTEX_ID;
1510    case nir_intrinsic_load_instance_id:
1511       return SYSTEM_VALUE_INSTANCE_ID;
1512    case nir_intrinsic_load_vertex_id_zero_base:
1513       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1514    case nir_intrinsic_load_base_vertex:
1515       return SYSTEM_VALUE_BASE_VERTEX;
1516    case nir_intrinsic_load_invocation_id:
1517       return SYSTEM_VALUE_INVOCATION_ID;
1518    case nir_intrinsic_load_front_face:
1519       return SYSTEM_VALUE_FRONT_FACE;
1520    case nir_intrinsic_load_sample_id:
1521       return SYSTEM_VALUE_SAMPLE_ID;
1522    case nir_intrinsic_load_sample_pos:
1523       return SYSTEM_VALUE_SAMPLE_POS;
1524    case nir_intrinsic_load_sample_mask_in:
1525       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1526    case nir_intrinsic_load_local_invocation_id:
1527       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1528    case nir_intrinsic_load_num_work_groups:
1529       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1530    case nir_intrinsic_load_work_group_id:
1531       return SYSTEM_VALUE_WORK_GROUP_ID;
1532    /* FINISHME: Add tessellation intrinsics.
1533       return SYSTEM_VALUE_TESS_COORD;
1534       return SYSTEM_VALUE_VERTICES_IN;
1535       return SYSTEM_VALUE_PRIMITIVE_ID;
1536       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1537       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1538     */
1539    default:
1540       unreachable("intrinsic doesn't produce a system value");
1541    }
1542 }