Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / glsl / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options)
36 {
37 nir_shader *shader = ralloc(mem_ctx, nir_shader);
38
39 exec_list_make_empty(&shader->uniforms);
40 exec_list_make_empty(&shader->inputs);
41 exec_list_make_empty(&shader->outputs);
42
43 shader->options = options;
44
45 exec_list_make_empty(&shader->functions);
46 exec_list_make_empty(&shader->registers);
47 exec_list_make_empty(&shader->globals);
48 exec_list_make_empty(&shader->system_values);
49 shader->reg_alloc = 0;
50
51 shader->num_inputs = 0;
52 shader->num_outputs = 0;
53 shader->num_uniforms = 0;
54
55 shader->stage = stage;
56
57 return shader;
58 }
59
60 static nir_register *
61 reg_create(void *mem_ctx, struct exec_list *list)
62 {
63 nir_register *reg = ralloc(mem_ctx, nir_register);
64
65 list_inithead(&reg->uses);
66 list_inithead(&reg->defs);
67 list_inithead(&reg->if_uses);
68
69 reg->num_components = 0;
70 reg->num_array_elems = 0;
71 reg->is_packed = false;
72 reg->name = NULL;
73
74 exec_list_push_tail(list, &reg->node);
75
76 return reg;
77 }
78
79 nir_register *
80 nir_global_reg_create(nir_shader *shader)
81 {
82 nir_register *reg = reg_create(shader, &shader->registers);
83 reg->index = shader->reg_alloc++;
84 reg->is_global = true;
85
86 return reg;
87 }
88
89 nir_register *
90 nir_local_reg_create(nir_function_impl *impl)
91 {
92 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
93 reg->index = impl->reg_alloc++;
94 reg->is_global = false;
95
96 return reg;
97 }
98
99 void
100 nir_reg_remove(nir_register *reg)
101 {
102 exec_node_remove(&reg->node);
103 }
104
105 nir_function *
106 nir_function_create(nir_shader *shader, const char *name)
107 {
108 nir_function *func = ralloc(shader, nir_function);
109
110 exec_list_push_tail(&shader->functions, &func->node);
111 exec_list_make_empty(&func->overload_list);
112 func->name = ralloc_strdup(func, name);
113 func->shader = shader;
114
115 return func;
116 }
117
118 nir_function_overload *
119 nir_function_overload_create(nir_function *func)
120 {
121 void *mem_ctx = ralloc_parent(func);
122
123 nir_function_overload *overload = ralloc(mem_ctx, nir_function_overload);
124
125 overload->num_params = 0;
126 overload->params = NULL;
127 overload->return_type = glsl_void_type();
128 overload->impl = NULL;
129
130 exec_list_push_tail(&func->overload_list, &overload->node);
131 overload->function = func;
132
133 return overload;
134 }
135
136 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
137 {
138 dest->is_ssa = src->is_ssa;
139 if (src->is_ssa) {
140 dest->ssa = src->ssa;
141 } else {
142 dest->reg.base_offset = src->reg.base_offset;
143 dest->reg.reg = src->reg.reg;
144 if (src->reg.indirect) {
145 dest->reg.indirect = ralloc(mem_ctx, nir_src);
146 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
147 } else {
148 dest->reg.indirect = NULL;
149 }
150 }
151 }
152
153 void nir_dest_copy(nir_dest *dest, const nir_dest *src, void *mem_ctx)
154 {
155 /* Copying an SSA definition makes no sense whatsoever. */
156 assert(!src->is_ssa);
157
158 dest->is_ssa = false;
159
160 dest->reg.base_offset = src->reg.base_offset;
161 dest->reg.reg = src->reg.reg;
162 if (src->reg.indirect) {
163 dest->reg.indirect = ralloc(mem_ctx, nir_src);
164 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
165 } else {
166 dest->reg.indirect = NULL;
167 }
168 }
169
170 void
171 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src, void *mem_ctx)
172 {
173 nir_src_copy(&dest->src, &src->src, mem_ctx);
174 dest->abs = src->abs;
175 dest->negate = src->negate;
176 for (unsigned i = 0; i < 4; i++)
177 dest->swizzle[i] = src->swizzle[i];
178 }
179
180 void
181 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src, void *mem_ctx)
182 {
183 nir_dest_copy(&dest->dest, &src->dest, mem_ctx);
184 dest->write_mask = src->write_mask;
185 dest->saturate = src->saturate;
186 }
187
188
189 static void
190 cf_init(nir_cf_node *node, nir_cf_node_type type)
191 {
192 exec_node_init(&node->node);
193 node->parent = NULL;
194 node->type = type;
195 }
196
197 nir_function_impl *
198 nir_function_impl_create(nir_function_overload *overload)
199 {
200 assert(overload->impl == NULL);
201
202 void *mem_ctx = ralloc_parent(overload);
203
204 nir_function_impl *impl = ralloc(mem_ctx, nir_function_impl);
205
206 overload->impl = impl;
207 impl->overload = overload;
208
209 cf_init(&impl->cf_node, nir_cf_node_function);
210
211 exec_list_make_empty(&impl->body);
212 exec_list_make_empty(&impl->registers);
213 exec_list_make_empty(&impl->locals);
214 impl->num_params = 0;
215 impl->params = NULL;
216 impl->return_var = NULL;
217 impl->reg_alloc = 0;
218 impl->ssa_alloc = 0;
219 impl->valid_metadata = nir_metadata_none;
220
221 /* create start & end blocks */
222 nir_block *start_block = nir_block_create(mem_ctx);
223 nir_block *end_block = nir_block_create(mem_ctx);
224 start_block->cf_node.parent = &impl->cf_node;
225 end_block->cf_node.parent = &impl->cf_node;
226 impl->end_block = end_block;
227
228 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
229
230 start_block->successors[0] = end_block;
231 _mesa_set_add(end_block->predecessors, start_block);
232 return impl;
233 }
234
235 nir_block *
236 nir_block_create(void *mem_ctx)
237 {
238 nir_block *block = ralloc(mem_ctx, nir_block);
239
240 cf_init(&block->cf_node, nir_cf_node_block);
241
242 block->successors[0] = block->successors[1] = NULL;
243 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
244 _mesa_key_pointer_equal);
245 block->imm_dom = NULL;
246 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
247 _mesa_key_pointer_equal);
248
249 exec_list_make_empty(&block->instr_list);
250
251 return block;
252 }
253
254 static inline void
255 src_init(nir_src *src)
256 {
257 src->is_ssa = false;
258 src->reg.reg = NULL;
259 src->reg.indirect = NULL;
260 src->reg.base_offset = 0;
261 }
262
263 nir_if *
264 nir_if_create(void *mem_ctx)
265 {
266 nir_if *if_stmt = ralloc(mem_ctx, nir_if);
267
268 cf_init(&if_stmt->cf_node, nir_cf_node_if);
269 src_init(&if_stmt->condition);
270
271 nir_block *then = nir_block_create(mem_ctx);
272 exec_list_make_empty(&if_stmt->then_list);
273 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
274 then->cf_node.parent = &if_stmt->cf_node;
275
276 nir_block *else_stmt = nir_block_create(mem_ctx);
277 exec_list_make_empty(&if_stmt->else_list);
278 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
279 else_stmt->cf_node.parent = &if_stmt->cf_node;
280
281 return if_stmt;
282 }
283
284 nir_loop *
285 nir_loop_create(void *mem_ctx)
286 {
287 nir_loop *loop = ralloc(mem_ctx, nir_loop);
288
289 cf_init(&loop->cf_node, nir_cf_node_loop);
290
291 nir_block *body = nir_block_create(mem_ctx);
292 exec_list_make_empty(&loop->body);
293 exec_list_push_tail(&loop->body, &body->cf_node.node);
294 body->cf_node.parent = &loop->cf_node;
295
296 body->successors[0] = body;
297 _mesa_set_add(body->predecessors, body);
298
299 return loop;
300 }
301
302 static void
303 instr_init(nir_instr *instr, nir_instr_type type)
304 {
305 instr->type = type;
306 instr->block = NULL;
307 exec_node_init(&instr->node);
308 }
309
310 static void
311 dest_init(nir_dest *dest)
312 {
313 dest->is_ssa = false;
314 dest->reg.reg = NULL;
315 dest->reg.indirect = NULL;
316 dest->reg.base_offset = 0;
317 }
318
319 static void
320 alu_dest_init(nir_alu_dest *dest)
321 {
322 dest_init(&dest->dest);
323 dest->saturate = false;
324 dest->write_mask = 0xf;
325 }
326
327 static void
328 alu_src_init(nir_alu_src *src)
329 {
330 src_init(&src->src);
331 src->abs = src->negate = false;
332 src->swizzle[0] = 0;
333 src->swizzle[1] = 1;
334 src->swizzle[2] = 2;
335 src->swizzle[3] = 3;
336 }
337
338 nir_alu_instr *
339 nir_alu_instr_create(nir_shader *shader, nir_op op)
340 {
341 unsigned num_srcs = nir_op_infos[op].num_inputs;
342 nir_alu_instr *instr =
343 ralloc_size(shader,
344 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
345
346 instr_init(&instr->instr, nir_instr_type_alu);
347 instr->op = op;
348 alu_dest_init(&instr->dest);
349 for (unsigned i = 0; i < num_srcs; i++)
350 alu_src_init(&instr->src[i]);
351
352 return instr;
353 }
354
355 nir_jump_instr *
356 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
357 {
358 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
359 instr_init(&instr->instr, nir_instr_type_jump);
360 instr->type = type;
361 return instr;
362 }
363
364 nir_load_const_instr *
365 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
366 {
367 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
368 instr_init(&instr->instr, nir_instr_type_load_const);
369
370 nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
371
372 return instr;
373 }
374
375 nir_intrinsic_instr *
376 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
377 {
378 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
379 nir_intrinsic_instr *instr =
380 ralloc_size(shader,
381 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
382
383 instr_init(&instr->instr, nir_instr_type_intrinsic);
384 instr->intrinsic = op;
385
386 if (nir_intrinsic_infos[op].has_dest)
387 dest_init(&instr->dest);
388
389 for (unsigned i = 0; i < num_srcs; i++)
390 src_init(&instr->src[i]);
391
392 return instr;
393 }
394
395 nir_call_instr *
396 nir_call_instr_create(nir_shader *shader, nir_function_overload *callee)
397 {
398 nir_call_instr *instr = ralloc(shader, nir_call_instr);
399 instr_init(&instr->instr, nir_instr_type_call);
400
401 instr->callee = callee;
402 instr->num_params = callee->num_params;
403 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
404 instr->return_deref = NULL;
405
406 return instr;
407 }
408
409 nir_tex_instr *
410 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
411 {
412 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
413 instr_init(&instr->instr, nir_instr_type_tex);
414
415 dest_init(&instr->dest);
416
417 instr->num_srcs = num_srcs;
418 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
419 for (unsigned i = 0; i < num_srcs; i++)
420 src_init(&instr->src[i].src);
421
422 instr->sampler_index = 0;
423 instr->sampler_array_size = 0;
424 instr->sampler = NULL;
425
426 return instr;
427 }
428
429 nir_phi_instr *
430 nir_phi_instr_create(nir_shader *shader)
431 {
432 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
433 instr_init(&instr->instr, nir_instr_type_phi);
434
435 dest_init(&instr->dest);
436 exec_list_make_empty(&instr->srcs);
437 return instr;
438 }
439
440 nir_parallel_copy_instr *
441 nir_parallel_copy_instr_create(nir_shader *shader)
442 {
443 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
444 instr_init(&instr->instr, nir_instr_type_parallel_copy);
445
446 exec_list_make_empty(&instr->entries);
447
448 return instr;
449 }
450
451 nir_ssa_undef_instr *
452 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
453 {
454 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
455 instr_init(&instr->instr, nir_instr_type_ssa_undef);
456
457 nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
458
459 return instr;
460 }
461
462 nir_deref_var *
463 nir_deref_var_create(void *mem_ctx, nir_variable *var)
464 {
465 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
466 deref->deref.deref_type = nir_deref_type_var;
467 deref->deref.child = NULL;
468 deref->deref.type = var->type;
469 deref->var = var;
470 return deref;
471 }
472
473 nir_deref_array *
474 nir_deref_array_create(void *mem_ctx)
475 {
476 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
477 deref->deref.deref_type = nir_deref_type_array;
478 deref->deref.child = NULL;
479 deref->deref_array_type = nir_deref_array_type_direct;
480 src_init(&deref->indirect);
481 deref->base_offset = 0;
482 return deref;
483 }
484
485 nir_deref_struct *
486 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
487 {
488 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
489 deref->deref.deref_type = nir_deref_type_struct;
490 deref->deref.child = NULL;
491 deref->index = field_index;
492 return deref;
493 }
494
495 static nir_deref_var *
496 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
497 {
498 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
499 ret->deref.type = deref->deref.type;
500 if (deref->deref.child)
501 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
502 return ret;
503 }
504
505 static nir_deref_array *
506 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
507 {
508 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
509 ret->base_offset = deref->base_offset;
510 ret->deref_array_type = deref->deref_array_type;
511 if (deref->deref_array_type == nir_deref_array_type_indirect) {
512 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
513 }
514 ret->deref.type = deref->deref.type;
515 if (deref->deref.child)
516 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
517 return ret;
518 }
519
520 static nir_deref_struct *
521 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
522 {
523 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
524 ret->deref.type = deref->deref.type;
525 if (deref->deref.child)
526 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
527 return ret;
528 }
529
530 nir_deref *
531 nir_copy_deref(void *mem_ctx, nir_deref *deref)
532 {
533 switch (deref->deref_type) {
534 case nir_deref_type_var:
535 return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
536 case nir_deref_type_array:
537 return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
538 case nir_deref_type_struct:
539 return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
540 default:
541 unreachable("Invalid dereference type");
542 }
543
544 return NULL;
545 }
546
547 /* Returns a load_const instruction that represents the constant
548 * initializer for the given deref chain. The caller is responsible for
549 * ensuring that there actually is a constant initializer.
550 */
551 nir_load_const_instr *
552 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
553 {
554 nir_constant *constant = deref->var->constant_initializer;
555 assert(constant);
556
557 const nir_deref *tail = &deref->deref;
558 unsigned matrix_offset = 0;
559 while (tail->child) {
560 switch (tail->child->deref_type) {
561 case nir_deref_type_array: {
562 nir_deref_array *arr = nir_deref_as_array(tail->child);
563 assert(arr->deref_array_type == nir_deref_array_type_direct);
564 if (glsl_type_is_matrix(tail->type)) {
565 assert(arr->deref.child == NULL);
566 matrix_offset = arr->base_offset;
567 } else {
568 constant = constant->elements[arr->base_offset];
569 }
570 break;
571 }
572
573 case nir_deref_type_struct: {
574 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
575 break;
576 }
577
578 default:
579 unreachable("Invalid deref child type");
580 }
581
582 tail = tail->child;
583 }
584
585 nir_load_const_instr *load =
586 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
587
588 matrix_offset *= load->def.num_components;
589 for (unsigned i = 0; i < load->def.num_components; i++) {
590 switch (glsl_get_base_type(tail->type)) {
591 case GLSL_TYPE_FLOAT:
592 case GLSL_TYPE_INT:
593 case GLSL_TYPE_UINT:
594 load->value.u[i] = constant->value.u[matrix_offset + i];
595 break;
596 case GLSL_TYPE_BOOL:
597 load->value.u[i] = constant->value.b[matrix_offset + i] ?
598 NIR_TRUE : NIR_FALSE;
599 break;
600 default:
601 unreachable("Invalid immediate type");
602 }
603 }
604
605 return load;
606 }
607
608 nir_function_impl *
609 nir_cf_node_get_function(nir_cf_node *node)
610 {
611 while (node->type != nir_cf_node_function) {
612 node = node->parent;
613 }
614
615 return nir_cf_node_as_function(node);
616 }
617
618 static bool
619 add_use_cb(nir_src *src, void *state)
620 {
621 nir_instr *instr = state;
622
623 src->parent_instr = instr;
624 list_addtail(&src->use_link,
625 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
626
627 return true;
628 }
629
630 static bool
631 add_ssa_def_cb(nir_ssa_def *def, void *state)
632 {
633 nir_instr *instr = state;
634
635 if (instr->block && def->index == UINT_MAX) {
636 nir_function_impl *impl =
637 nir_cf_node_get_function(&instr->block->cf_node);
638
639 def->index = impl->ssa_alloc++;
640 }
641
642 return true;
643 }
644
645 static bool
646 add_reg_def_cb(nir_dest *dest, void *state)
647 {
648 nir_instr *instr = state;
649
650 if (!dest->is_ssa) {
651 dest->reg.parent_instr = instr;
652 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
653 }
654
655 return true;
656 }
657
658 static void
659 add_defs_uses(nir_instr *instr)
660 {
661 nir_foreach_src(instr, add_use_cb, instr);
662 nir_foreach_dest(instr, add_reg_def_cb, instr);
663 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
664 }
665
666 void
667 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
668 {
669 switch (cursor.option) {
670 case nir_cursor_before_block:
671 /* Only allow inserting jumps into empty blocks. */
672 if (instr->type == nir_instr_type_jump)
673 assert(exec_list_is_empty(&cursor.block->instr_list));
674
675 instr->block = cursor.block;
676 add_defs_uses(instr);
677 exec_list_push_head(&cursor.block->instr_list, &instr->node);
678 break;
679 case nir_cursor_after_block: {
680 /* Inserting instructions after a jump is illegal. */
681 nir_instr *last = nir_block_last_instr(cursor.block);
682 assert(last == NULL || last->type != nir_instr_type_jump);
683 (void) last;
684
685 instr->block = cursor.block;
686 add_defs_uses(instr);
687 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
688 break;
689 }
690 case nir_cursor_before_instr:
691 assert(instr->type != nir_instr_type_jump);
692 instr->block = cursor.instr->block;
693 add_defs_uses(instr);
694 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
695 break;
696 case nir_cursor_after_instr:
697 /* Inserting instructions after a jump is illegal. */
698 assert(cursor.instr->type != nir_instr_type_jump);
699
700 /* Only allow inserting jumps at the end of the block. */
701 if (instr->type == nir_instr_type_jump)
702 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
703
704 instr->block = cursor.instr->block;
705 add_defs_uses(instr);
706 exec_node_insert_after(&cursor.instr->node, &instr->node);
707 break;
708 }
709
710 if (instr->type == nir_instr_type_jump)
711 nir_handle_add_jump(instr->block);
712 }
713
714 static bool
715 remove_use_cb(nir_src *src, void *state)
716 {
717 list_del(&src->use_link);
718
719 return true;
720 }
721
722 static bool
723 remove_def_cb(nir_dest *dest, void *state)
724 {
725 if (!dest->is_ssa)
726 list_del(&dest->reg.def_link);
727
728 return true;
729 }
730
731 static void
732 remove_defs_uses(nir_instr *instr)
733 {
734 nir_foreach_dest(instr, remove_def_cb, instr);
735 nir_foreach_src(instr, remove_use_cb, instr);
736 }
737
738 void nir_instr_remove(nir_instr *instr)
739 {
740 remove_defs_uses(instr);
741 exec_node_remove(&instr->node);
742
743 if (instr->type == nir_instr_type_jump) {
744 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
745 nir_handle_remove_jump(instr->block, jump_instr->type);
746 }
747 }
748
749 /*@}*/
750
751 void
752 nir_index_local_regs(nir_function_impl *impl)
753 {
754 unsigned index = 0;
755 foreach_list_typed(nir_register, reg, node, &impl->registers) {
756 reg->index = index++;
757 }
758 impl->reg_alloc = index;
759 }
760
761 void
762 nir_index_global_regs(nir_shader *shader)
763 {
764 unsigned index = 0;
765 foreach_list_typed(nir_register, reg, node, &shader->registers) {
766 reg->index = index++;
767 }
768 shader->reg_alloc = index;
769 }
770
771 static bool
772 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
773 {
774 return cb(&instr->dest.dest, state);
775 }
776
777 static bool
778 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
779 void *state)
780 {
781 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
782 return cb(&instr->dest, state);
783
784 return true;
785 }
786
787 static bool
788 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
789 void *state)
790 {
791 return cb(&instr->dest, state);
792 }
793
794 static bool
795 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
796 {
797 return cb(&instr->dest, state);
798 }
799
800 static bool
801 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
802 nir_foreach_dest_cb cb, void *state)
803 {
804 nir_foreach_parallel_copy_entry(instr, entry) {
805 if (!cb(&entry->dest, state))
806 return false;
807 }
808
809 return true;
810 }
811
812 bool
813 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
814 {
815 switch (instr->type) {
816 case nir_instr_type_alu:
817 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
818 case nir_instr_type_intrinsic:
819 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
820 case nir_instr_type_tex:
821 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
822 case nir_instr_type_phi:
823 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
824 case nir_instr_type_parallel_copy:
825 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
826 cb, state);
827
828 case nir_instr_type_load_const:
829 case nir_instr_type_ssa_undef:
830 case nir_instr_type_call:
831 case nir_instr_type_jump:
832 break;
833
834 default:
835 unreachable("Invalid instruction type");
836 break;
837 }
838
839 return true;
840 }
841
842 struct foreach_ssa_def_state {
843 nir_foreach_ssa_def_cb cb;
844 void *client_state;
845 };
846
847 static inline bool
848 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
849 {
850 struct foreach_ssa_def_state *state = void_state;
851
852 if (dest->is_ssa)
853 return state->cb(&dest->ssa, state->client_state);
854 else
855 return true;
856 }
857
858 bool
859 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
860 {
861 switch (instr->type) {
862 case nir_instr_type_alu:
863 case nir_instr_type_tex:
864 case nir_instr_type_intrinsic:
865 case nir_instr_type_phi:
866 case nir_instr_type_parallel_copy: {
867 struct foreach_ssa_def_state foreach_state = {cb, state};
868 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
869 }
870
871 case nir_instr_type_load_const:
872 return cb(&nir_instr_as_load_const(instr)->def, state);
873 case nir_instr_type_ssa_undef:
874 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
875 case nir_instr_type_call:
876 case nir_instr_type_jump:
877 return true;
878 default:
879 unreachable("Invalid instruction type");
880 }
881 }
882
883 static bool
884 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
885 {
886 if (!cb(src, state))
887 return false;
888 if (!src->is_ssa && src->reg.indirect)
889 return cb(src->reg.indirect, state);
890 return true;
891 }
892
893 static bool
894 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
895 void *state)
896 {
897 if (deref->deref_array_type == nir_deref_array_type_indirect)
898 return visit_src(&deref->indirect, cb, state);
899 return true;
900 }
901
902 static bool
903 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
904 {
905 nir_deref *cur = &deref->deref;
906 while (cur != NULL) {
907 if (cur->deref_type == nir_deref_type_array)
908 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
909 return false;
910
911 cur = cur->child;
912 }
913
914 return true;
915 }
916
917 static bool
918 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
919 {
920 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
921 if (!visit_src(&instr->src[i].src, cb, state))
922 return false;
923
924 return true;
925 }
926
927 static bool
928 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
929 {
930 for (unsigned i = 0; i < instr->num_srcs; i++)
931 if (!visit_src(&instr->src[i].src, cb, state))
932 return false;
933
934 if (instr->sampler != NULL)
935 if (!visit_deref_src(instr->sampler, cb, state))
936 return false;
937
938 return true;
939 }
940
941 static bool
942 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
943 void *state)
944 {
945 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
946 for (unsigned i = 0; i < num_srcs; i++)
947 if (!visit_src(&instr->src[i], cb, state))
948 return false;
949
950 unsigned num_vars =
951 nir_intrinsic_infos[instr->intrinsic].num_variables;
952 for (unsigned i = 0; i < num_vars; i++)
953 if (!visit_deref_src(instr->variables[i], cb, state))
954 return false;
955
956 return true;
957 }
958
959 static bool
960 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
961 {
962 return true;
963 }
964
965 static bool
966 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
967 void *state)
968 {
969 return true;
970 }
971
972 static bool
973 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
974 {
975 nir_foreach_phi_src(instr, src) {
976 if (!visit_src(&src->src, cb, state))
977 return false;
978 }
979
980 return true;
981 }
982
983 static bool
984 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
985 nir_foreach_src_cb cb, void *state)
986 {
987 nir_foreach_parallel_copy_entry(instr, entry) {
988 if (!visit_src(&entry->src, cb, state))
989 return false;
990 }
991
992 return true;
993 }
994
995 typedef struct {
996 void *state;
997 nir_foreach_src_cb cb;
998 } visit_dest_indirect_state;
999
1000 static bool
1001 visit_dest_indirect(nir_dest *dest, void *_state)
1002 {
1003 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1004
1005 if (!dest->is_ssa && dest->reg.indirect)
1006 return state->cb(dest->reg.indirect, state->state);
1007
1008 return true;
1009 }
1010
1011 bool
1012 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1013 {
1014 switch (instr->type) {
1015 case nir_instr_type_alu:
1016 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1017 return false;
1018 break;
1019 case nir_instr_type_intrinsic:
1020 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1021 return false;
1022 break;
1023 case nir_instr_type_tex:
1024 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1025 return false;
1026 break;
1027 case nir_instr_type_call:
1028 if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1029 return false;
1030 break;
1031 case nir_instr_type_load_const:
1032 if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1033 return false;
1034 break;
1035 case nir_instr_type_phi:
1036 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1037 return false;
1038 break;
1039 case nir_instr_type_parallel_copy:
1040 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1041 cb, state))
1042 return false;
1043 break;
1044 case nir_instr_type_jump:
1045 case nir_instr_type_ssa_undef:
1046 return true;
1047
1048 default:
1049 unreachable("Invalid instruction type");
1050 break;
1051 }
1052
1053 visit_dest_indirect_state dest_state;
1054 dest_state.state = state;
1055 dest_state.cb = cb;
1056 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1057 }
1058
1059 nir_const_value *
1060 nir_src_as_const_value(nir_src src)
1061 {
1062 if (!src.is_ssa)
1063 return NULL;
1064
1065 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1066 return NULL;
1067
1068 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1069
1070 return &load->value;
1071 }
1072
1073 bool
1074 nir_srcs_equal(nir_src src1, nir_src src2)
1075 {
1076 if (src1.is_ssa) {
1077 if (src2.is_ssa) {
1078 return src1.ssa == src2.ssa;
1079 } else {
1080 return false;
1081 }
1082 } else {
1083 if (src2.is_ssa) {
1084 return false;
1085 } else {
1086 if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
1087 return false;
1088
1089 if (src1.reg.indirect) {
1090 if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
1091 return false;
1092 }
1093
1094 return src1.reg.reg == src2.reg.reg &&
1095 src1.reg.base_offset == src2.reg.base_offset;
1096 }
1097 }
1098 }
1099
1100 static bool
1101 src_is_valid(const nir_src *src)
1102 {
1103 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1104 }
1105
1106 static void
1107 src_remove_all_uses(nir_src *src)
1108 {
1109 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1110 if (!src_is_valid(src))
1111 continue;
1112
1113 list_del(&src->use_link);
1114 }
1115 }
1116
1117 static void
1118 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1119 {
1120 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1121 if (!src_is_valid(src))
1122 continue;
1123
1124 if (parent_instr) {
1125 src->parent_instr = parent_instr;
1126 if (src->is_ssa)
1127 list_addtail(&src->use_link, &src->ssa->uses);
1128 else
1129 list_addtail(&src->use_link, &src->reg.reg->uses);
1130 } else {
1131 assert(parent_if);
1132 src->parent_if = parent_if;
1133 if (src->is_ssa)
1134 list_addtail(&src->use_link, &src->ssa->if_uses);
1135 else
1136 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1137 }
1138 }
1139 }
1140
1141 void
1142 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1143 {
1144 assert(!src_is_valid(src) || src->parent_instr == instr);
1145
1146 src_remove_all_uses(src);
1147 *src = new_src;
1148 src_add_all_uses(src, instr, NULL);
1149 }
1150
1151 void
1152 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1153 {
1154 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1155
1156 src_remove_all_uses(dest);
1157 src_remove_all_uses(src);
1158 *dest = *src;
1159 *src = NIR_SRC_INIT;
1160 src_add_all_uses(dest, dest_instr, NULL);
1161 }
1162
1163 void
1164 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1165 {
1166 nir_src *src = &if_stmt->condition;
1167 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1168
1169 src_remove_all_uses(src);
1170 *src = new_src;
1171 src_add_all_uses(src, NULL, if_stmt);
1172 }
1173
1174 void
1175 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1176 unsigned num_components, const char *name)
1177 {
1178 def->name = name;
1179 def->parent_instr = instr;
1180 list_inithead(&def->uses);
1181 list_inithead(&def->if_uses);
1182 def->num_components = num_components;
1183
1184 if (instr->block) {
1185 nir_function_impl *impl =
1186 nir_cf_node_get_function(&instr->block->cf_node);
1187
1188 def->index = impl->ssa_alloc++;
1189 } else {
1190 def->index = UINT_MAX;
1191 }
1192 }
1193
1194 void
1195 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1196 unsigned num_components, const char *name)
1197 {
1198 dest->is_ssa = true;
1199 nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1200 }
1201
1202 void
1203 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src, void *mem_ctx)
1204 {
1205 assert(!new_src.is_ssa || def != new_src.ssa);
1206
1207 nir_foreach_use_safe(def, use_src) {
1208 nir_instr *src_parent_instr = use_src->parent_instr;
1209 list_del(&use_src->use_link);
1210 nir_src_copy(use_src, &new_src, mem_ctx);
1211 src_add_all_uses(use_src, src_parent_instr, NULL);
1212 }
1213
1214 nir_foreach_if_use_safe(def, use_src) {
1215 nir_if *src_parent_if = use_src->parent_if;
1216 list_del(&use_src->use_link);
1217 nir_src_copy(use_src, &new_src, mem_ctx);
1218 src_add_all_uses(use_src, NULL, src_parent_if);
1219 }
1220 }
1221
1222
1223 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1224 bool reverse, void *state);
1225
1226 static inline bool
1227 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1228 {
1229 if (reverse) {
1230 foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1231 &if_stmt->else_list) {
1232 if (!foreach_cf_node(node, cb, reverse, state))
1233 return false;
1234 }
1235
1236 foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1237 &if_stmt->then_list) {
1238 if (!foreach_cf_node(node, cb, reverse, state))
1239 return false;
1240 }
1241 } else {
1242 foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1243 if (!foreach_cf_node(node, cb, reverse, state))
1244 return false;
1245 }
1246
1247 foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1248 if (!foreach_cf_node(node, cb, reverse, state))
1249 return false;
1250 }
1251 }
1252
1253 return true;
1254 }
1255
1256 static inline bool
1257 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1258 {
1259 if (reverse) {
1260 foreach_list_typed_safe_reverse(nir_cf_node, node, node, &loop->body) {
1261 if (!foreach_cf_node(node, cb, reverse, state))
1262 return false;
1263 }
1264 } else {
1265 foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1266 if (!foreach_cf_node(node, cb, reverse, state))
1267 return false;
1268 }
1269 }
1270
1271 return true;
1272 }
1273
1274 static bool
1275 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1276 bool reverse, void *state)
1277 {
1278 switch (node->type) {
1279 case nir_cf_node_block:
1280 return cb(nir_cf_node_as_block(node), state);
1281 case nir_cf_node_if:
1282 return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1283 case nir_cf_node_loop:
1284 return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1285 break;
1286
1287 default:
1288 unreachable("Invalid CFG node type");
1289 break;
1290 }
1291
1292 return false;
1293 }
1294
1295 bool
1296 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1297 {
1298 foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1299 if (!foreach_cf_node(node, cb, false, state))
1300 return false;
1301 }
1302
1303 return cb(impl->end_block, state);
1304 }
1305
1306 bool
1307 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1308 void *state)
1309 {
1310 if (!cb(impl->end_block, state))
1311 return false;
1312
1313 foreach_list_typed_safe_reverse(nir_cf_node, node, node, &impl->body) {
1314 if (!foreach_cf_node(node, cb, true, state))
1315 return false;
1316 }
1317
1318 return true;
1319 }
1320
1321 nir_if *
1322 nir_block_get_following_if(nir_block *block)
1323 {
1324 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1325 return NULL;
1326
1327 if (nir_cf_node_is_last(&block->cf_node))
1328 return NULL;
1329
1330 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1331
1332 if (next_node->type != nir_cf_node_if)
1333 return NULL;
1334
1335 return nir_cf_node_as_if(next_node);
1336 }
1337
1338 static bool
1339 index_block(nir_block *block, void *state)
1340 {
1341 unsigned *index = state;
1342 block->index = (*index)++;
1343 return true;
1344 }
1345
1346 void
1347 nir_index_blocks(nir_function_impl *impl)
1348 {
1349 unsigned index = 0;
1350
1351 if (impl->valid_metadata & nir_metadata_block_index)
1352 return;
1353
1354 nir_foreach_block(impl, index_block, &index);
1355
1356 impl->num_blocks = index;
1357 }
1358
1359 static bool
1360 index_ssa_def_cb(nir_ssa_def *def, void *state)
1361 {
1362 unsigned *index = (unsigned *) state;
1363 def->index = (*index)++;
1364
1365 return true;
1366 }
1367
1368 static bool
1369 index_ssa_block(nir_block *block, void *state)
1370 {
1371 nir_foreach_instr(block, instr)
1372 nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1373
1374 return true;
1375 }
1376
1377 void
1378 nir_index_ssa_defs(nir_function_impl *impl)
1379 {
1380 unsigned index = 0;
1381 nir_foreach_block(impl, index_ssa_block, &index);
1382 impl->ssa_alloc = index;
1383 }