nir: Add intrinsics for tessellation shader system values.
[mesa.git] / src / glsl / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options)
36 {
37 nir_shader *shader = ralloc(mem_ctx, nir_shader);
38
39 exec_list_make_empty(&shader->uniforms);
40 exec_list_make_empty(&shader->inputs);
41 exec_list_make_empty(&shader->outputs);
42
43 shader->options = options;
44 memset(&shader->info, 0, sizeof(shader->info));
45
46 exec_list_make_empty(&shader->functions);
47 exec_list_make_empty(&shader->registers);
48 exec_list_make_empty(&shader->globals);
49 exec_list_make_empty(&shader->system_values);
50 shader->reg_alloc = 0;
51
52 shader->num_inputs = 0;
53 shader->num_outputs = 0;
54 shader->num_uniforms = 0;
55
56 shader->stage = stage;
57
58 return shader;
59 }
60
61 static nir_register *
62 reg_create(void *mem_ctx, struct exec_list *list)
63 {
64 nir_register *reg = ralloc(mem_ctx, nir_register);
65
66 list_inithead(&reg->uses);
67 list_inithead(&reg->defs);
68 list_inithead(&reg->if_uses);
69
70 reg->num_components = 0;
71 reg->num_array_elems = 0;
72 reg->is_packed = false;
73 reg->name = NULL;
74
75 exec_list_push_tail(list, &reg->node);
76
77 return reg;
78 }
79
80 nir_register *
81 nir_global_reg_create(nir_shader *shader)
82 {
83 nir_register *reg = reg_create(shader, &shader->registers);
84 reg->index = shader->reg_alloc++;
85 reg->is_global = true;
86
87 return reg;
88 }
89
90 nir_register *
91 nir_local_reg_create(nir_function_impl *impl)
92 {
93 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
94 reg->index = impl->reg_alloc++;
95 reg->is_global = false;
96
97 return reg;
98 }
99
100 void
101 nir_reg_remove(nir_register *reg)
102 {
103 exec_node_remove(&reg->node);
104 }
105
106 void
107 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
108 {
109 switch (var->data.mode) {
110 case nir_var_local:
111 assert(!"nir_shader_add_variable cannot be used for local variables");
112 break;
113
114 case nir_var_global:
115 exec_list_push_tail(&shader->globals, &var->node);
116 break;
117
118 case nir_var_shader_in:
119 exec_list_push_tail(&shader->inputs, &var->node);
120 break;
121
122 case nir_var_shader_out:
123 exec_list_push_tail(&shader->outputs, &var->node);
124 break;
125
126 case nir_var_uniform:
127 case nir_var_shader_storage:
128 exec_list_push_tail(&shader->uniforms, &var->node);
129 break;
130
131 case nir_var_system_value:
132 exec_list_push_tail(&shader->system_values, &var->node);
133 break;
134 }
135 }
136
137 nir_variable *
138 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
139 const struct glsl_type *type, const char *name)
140 {
141 nir_variable *var = rzalloc(shader, nir_variable);
142 var->name = ralloc_strdup(var, name);
143 var->type = type;
144 var->data.mode = mode;
145
146 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
147 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
148 var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
149
150 if (mode == nir_var_shader_in || mode == nir_var_uniform)
151 var->data.read_only = true;
152
153 nir_shader_add_variable(shader, var);
154
155 return var;
156 }
157
158 nir_variable *
159 nir_local_variable_create(nir_function_impl *impl,
160 const struct glsl_type *type, const char *name)
161 {
162 nir_variable *var = rzalloc(impl->overload->function->shader, nir_variable);
163 var->name = ralloc_strdup(var, name);
164 var->type = type;
165 var->data.mode = nir_var_local;
166
167 nir_function_impl_add_variable(impl, var);
168
169 return var;
170 }
171
172 nir_function *
173 nir_function_create(nir_shader *shader, const char *name)
174 {
175 nir_function *func = ralloc(shader, nir_function);
176
177 exec_list_push_tail(&shader->functions, &func->node);
178 exec_list_make_empty(&func->overload_list);
179 func->name = ralloc_strdup(func, name);
180 func->shader = shader;
181
182 return func;
183 }
184
185 nir_function_overload *
186 nir_function_overload_create(nir_function *func)
187 {
188 void *mem_ctx = ralloc_parent(func);
189
190 nir_function_overload *overload = ralloc(mem_ctx, nir_function_overload);
191
192 overload->num_params = 0;
193 overload->params = NULL;
194 overload->return_type = glsl_void_type();
195 overload->impl = NULL;
196
197 exec_list_push_tail(&func->overload_list, &overload->node);
198 overload->function = func;
199
200 return overload;
201 }
202
203 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
204 {
205 dest->is_ssa = src->is_ssa;
206 if (src->is_ssa) {
207 dest->ssa = src->ssa;
208 } else {
209 dest->reg.base_offset = src->reg.base_offset;
210 dest->reg.reg = src->reg.reg;
211 if (src->reg.indirect) {
212 dest->reg.indirect = ralloc(mem_ctx, nir_src);
213 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
214 } else {
215 dest->reg.indirect = NULL;
216 }
217 }
218 }
219
220 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
221 {
222 /* Copying an SSA definition makes no sense whatsoever. */
223 assert(!src->is_ssa);
224
225 dest->is_ssa = false;
226
227 dest->reg.base_offset = src->reg.base_offset;
228 dest->reg.reg = src->reg.reg;
229 if (src->reg.indirect) {
230 dest->reg.indirect = ralloc(instr, nir_src);
231 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
232 } else {
233 dest->reg.indirect = NULL;
234 }
235 }
236
237 void
238 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
239 nir_alu_instr *instr)
240 {
241 nir_src_copy(&dest->src, &src->src, &instr->instr);
242 dest->abs = src->abs;
243 dest->negate = src->negate;
244 for (unsigned i = 0; i < 4; i++)
245 dest->swizzle[i] = src->swizzle[i];
246 }
247
248 void
249 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
250 nir_alu_instr *instr)
251 {
252 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
253 dest->write_mask = src->write_mask;
254 dest->saturate = src->saturate;
255 }
256
257
258 static void
259 cf_init(nir_cf_node *node, nir_cf_node_type type)
260 {
261 exec_node_init(&node->node);
262 node->parent = NULL;
263 node->type = type;
264 }
265
266 nir_function_impl *
267 nir_function_impl_create(nir_function_overload *overload)
268 {
269 assert(overload->impl == NULL);
270
271 void *mem_ctx = ralloc_parent(overload);
272
273 nir_function_impl *impl = ralloc(mem_ctx, nir_function_impl);
274
275 overload->impl = impl;
276 impl->overload = overload;
277
278 cf_init(&impl->cf_node, nir_cf_node_function);
279
280 exec_list_make_empty(&impl->body);
281 exec_list_make_empty(&impl->registers);
282 exec_list_make_empty(&impl->locals);
283 impl->num_params = 0;
284 impl->params = NULL;
285 impl->return_var = NULL;
286 impl->reg_alloc = 0;
287 impl->ssa_alloc = 0;
288 impl->valid_metadata = nir_metadata_none;
289
290 /* create start & end blocks */
291 nir_block *start_block = nir_block_create(mem_ctx);
292 nir_block *end_block = nir_block_create(mem_ctx);
293 start_block->cf_node.parent = &impl->cf_node;
294 end_block->cf_node.parent = &impl->cf_node;
295 impl->end_block = end_block;
296
297 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
298
299 start_block->successors[0] = end_block;
300 _mesa_set_add(end_block->predecessors, start_block);
301 return impl;
302 }
303
304 nir_block *
305 nir_block_create(void *mem_ctx)
306 {
307 nir_block *block = ralloc(mem_ctx, nir_block);
308
309 cf_init(&block->cf_node, nir_cf_node_block);
310
311 block->successors[0] = block->successors[1] = NULL;
312 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
313 _mesa_key_pointer_equal);
314 block->imm_dom = NULL;
315 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
316 _mesa_key_pointer_equal);
317
318 exec_list_make_empty(&block->instr_list);
319
320 return block;
321 }
322
323 static inline void
324 src_init(nir_src *src)
325 {
326 src->is_ssa = false;
327 src->reg.reg = NULL;
328 src->reg.indirect = NULL;
329 src->reg.base_offset = 0;
330 }
331
332 nir_if *
333 nir_if_create(void *mem_ctx)
334 {
335 nir_if *if_stmt = ralloc(mem_ctx, nir_if);
336
337 cf_init(&if_stmt->cf_node, nir_cf_node_if);
338 src_init(&if_stmt->condition);
339
340 nir_block *then = nir_block_create(mem_ctx);
341 exec_list_make_empty(&if_stmt->then_list);
342 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
343 then->cf_node.parent = &if_stmt->cf_node;
344
345 nir_block *else_stmt = nir_block_create(mem_ctx);
346 exec_list_make_empty(&if_stmt->else_list);
347 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
348 else_stmt->cf_node.parent = &if_stmt->cf_node;
349
350 return if_stmt;
351 }
352
353 nir_loop *
354 nir_loop_create(void *mem_ctx)
355 {
356 nir_loop *loop = ralloc(mem_ctx, nir_loop);
357
358 cf_init(&loop->cf_node, nir_cf_node_loop);
359
360 nir_block *body = nir_block_create(mem_ctx);
361 exec_list_make_empty(&loop->body);
362 exec_list_push_tail(&loop->body, &body->cf_node.node);
363 body->cf_node.parent = &loop->cf_node;
364
365 body->successors[0] = body;
366 _mesa_set_add(body->predecessors, body);
367
368 return loop;
369 }
370
371 static void
372 instr_init(nir_instr *instr, nir_instr_type type)
373 {
374 instr->type = type;
375 instr->block = NULL;
376 exec_node_init(&instr->node);
377 }
378
379 static void
380 dest_init(nir_dest *dest)
381 {
382 dest->is_ssa = false;
383 dest->reg.reg = NULL;
384 dest->reg.indirect = NULL;
385 dest->reg.base_offset = 0;
386 }
387
388 static void
389 alu_dest_init(nir_alu_dest *dest)
390 {
391 dest_init(&dest->dest);
392 dest->saturate = false;
393 dest->write_mask = 0xf;
394 }
395
396 static void
397 alu_src_init(nir_alu_src *src)
398 {
399 src_init(&src->src);
400 src->abs = src->negate = false;
401 src->swizzle[0] = 0;
402 src->swizzle[1] = 1;
403 src->swizzle[2] = 2;
404 src->swizzle[3] = 3;
405 }
406
407 nir_alu_instr *
408 nir_alu_instr_create(nir_shader *shader, nir_op op)
409 {
410 unsigned num_srcs = nir_op_infos[op].num_inputs;
411 nir_alu_instr *instr =
412 ralloc_size(shader,
413 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
414
415 instr_init(&instr->instr, nir_instr_type_alu);
416 instr->op = op;
417 alu_dest_init(&instr->dest);
418 for (unsigned i = 0; i < num_srcs; i++)
419 alu_src_init(&instr->src[i]);
420
421 return instr;
422 }
423
424 nir_jump_instr *
425 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
426 {
427 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
428 instr_init(&instr->instr, nir_instr_type_jump);
429 instr->type = type;
430 return instr;
431 }
432
433 nir_load_const_instr *
434 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
435 {
436 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
437 instr_init(&instr->instr, nir_instr_type_load_const);
438
439 nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
440
441 return instr;
442 }
443
444 nir_intrinsic_instr *
445 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
446 {
447 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
448 nir_intrinsic_instr *instr =
449 ralloc_size(shader,
450 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
451
452 instr_init(&instr->instr, nir_instr_type_intrinsic);
453 instr->intrinsic = op;
454
455 if (nir_intrinsic_infos[op].has_dest)
456 dest_init(&instr->dest);
457
458 for (unsigned i = 0; i < num_srcs; i++)
459 src_init(&instr->src[i]);
460
461 return instr;
462 }
463
464 nir_call_instr *
465 nir_call_instr_create(nir_shader *shader, nir_function_overload *callee)
466 {
467 nir_call_instr *instr = ralloc(shader, nir_call_instr);
468 instr_init(&instr->instr, nir_instr_type_call);
469
470 instr->callee = callee;
471 instr->num_params = callee->num_params;
472 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
473 instr->return_deref = NULL;
474
475 return instr;
476 }
477
478 nir_tex_instr *
479 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
480 {
481 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
482 instr_init(&instr->instr, nir_instr_type_tex);
483
484 dest_init(&instr->dest);
485
486 instr->num_srcs = num_srcs;
487 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
488 for (unsigned i = 0; i < num_srcs; i++)
489 src_init(&instr->src[i].src);
490
491 instr->sampler_index = 0;
492 instr->sampler_array_size = 0;
493 instr->sampler = NULL;
494
495 return instr;
496 }
497
498 nir_phi_instr *
499 nir_phi_instr_create(nir_shader *shader)
500 {
501 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
502 instr_init(&instr->instr, nir_instr_type_phi);
503
504 dest_init(&instr->dest);
505 exec_list_make_empty(&instr->srcs);
506 return instr;
507 }
508
509 nir_parallel_copy_instr *
510 nir_parallel_copy_instr_create(nir_shader *shader)
511 {
512 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
513 instr_init(&instr->instr, nir_instr_type_parallel_copy);
514
515 exec_list_make_empty(&instr->entries);
516
517 return instr;
518 }
519
520 nir_ssa_undef_instr *
521 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
522 {
523 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
524 instr_init(&instr->instr, nir_instr_type_ssa_undef);
525
526 nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
527
528 return instr;
529 }
530
531 nir_deref_var *
532 nir_deref_var_create(void *mem_ctx, nir_variable *var)
533 {
534 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
535 deref->deref.deref_type = nir_deref_type_var;
536 deref->deref.child = NULL;
537 deref->deref.type = var->type;
538 deref->var = var;
539 return deref;
540 }
541
542 nir_deref_array *
543 nir_deref_array_create(void *mem_ctx)
544 {
545 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
546 deref->deref.deref_type = nir_deref_type_array;
547 deref->deref.child = NULL;
548 deref->deref_array_type = nir_deref_array_type_direct;
549 src_init(&deref->indirect);
550 deref->base_offset = 0;
551 return deref;
552 }
553
554 nir_deref_struct *
555 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
556 {
557 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
558 deref->deref.deref_type = nir_deref_type_struct;
559 deref->deref.child = NULL;
560 deref->index = field_index;
561 return deref;
562 }
563
564 static nir_deref_var *
565 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
566 {
567 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
568 ret->deref.type = deref->deref.type;
569 if (deref->deref.child)
570 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
571 return ret;
572 }
573
574 static nir_deref_array *
575 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
576 {
577 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
578 ret->base_offset = deref->base_offset;
579 ret->deref_array_type = deref->deref_array_type;
580 if (deref->deref_array_type == nir_deref_array_type_indirect) {
581 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
582 }
583 ret->deref.type = deref->deref.type;
584 if (deref->deref.child)
585 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
586 return ret;
587 }
588
589 static nir_deref_struct *
590 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
591 {
592 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
593 ret->deref.type = deref->deref.type;
594 if (deref->deref.child)
595 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
596 return ret;
597 }
598
599 nir_deref *
600 nir_copy_deref(void *mem_ctx, nir_deref *deref)
601 {
602 switch (deref->deref_type) {
603 case nir_deref_type_var:
604 return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
605 case nir_deref_type_array:
606 return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
607 case nir_deref_type_struct:
608 return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
609 default:
610 unreachable("Invalid dereference type");
611 }
612
613 return NULL;
614 }
615
616 /* Returns a load_const instruction that represents the constant
617 * initializer for the given deref chain. The caller is responsible for
618 * ensuring that there actually is a constant initializer.
619 */
620 nir_load_const_instr *
621 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
622 {
623 nir_constant *constant = deref->var->constant_initializer;
624 assert(constant);
625
626 const nir_deref *tail = &deref->deref;
627 unsigned matrix_offset = 0;
628 while (tail->child) {
629 switch (tail->child->deref_type) {
630 case nir_deref_type_array: {
631 nir_deref_array *arr = nir_deref_as_array(tail->child);
632 assert(arr->deref_array_type == nir_deref_array_type_direct);
633 if (glsl_type_is_matrix(tail->type)) {
634 assert(arr->deref.child == NULL);
635 matrix_offset = arr->base_offset;
636 } else {
637 constant = constant->elements[arr->base_offset];
638 }
639 break;
640 }
641
642 case nir_deref_type_struct: {
643 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
644 break;
645 }
646
647 default:
648 unreachable("Invalid deref child type");
649 }
650
651 tail = tail->child;
652 }
653
654 nir_load_const_instr *load =
655 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
656
657 matrix_offset *= load->def.num_components;
658 for (unsigned i = 0; i < load->def.num_components; i++) {
659 switch (glsl_get_base_type(tail->type)) {
660 case GLSL_TYPE_FLOAT:
661 case GLSL_TYPE_INT:
662 case GLSL_TYPE_UINT:
663 load->value.u[i] = constant->value.u[matrix_offset + i];
664 break;
665 case GLSL_TYPE_BOOL:
666 load->value.u[i] = constant->value.b[matrix_offset + i] ?
667 NIR_TRUE : NIR_FALSE;
668 break;
669 default:
670 unreachable("Invalid immediate type");
671 }
672 }
673
674 return load;
675 }
676
677 nir_function_impl *
678 nir_cf_node_get_function(nir_cf_node *node)
679 {
680 while (node->type != nir_cf_node_function) {
681 node = node->parent;
682 }
683
684 return nir_cf_node_as_function(node);
685 }
686
687 static bool
688 add_use_cb(nir_src *src, void *state)
689 {
690 nir_instr *instr = state;
691
692 src->parent_instr = instr;
693 list_addtail(&src->use_link,
694 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
695
696 return true;
697 }
698
699 static bool
700 add_ssa_def_cb(nir_ssa_def *def, void *state)
701 {
702 nir_instr *instr = state;
703
704 if (instr->block && def->index == UINT_MAX) {
705 nir_function_impl *impl =
706 nir_cf_node_get_function(&instr->block->cf_node);
707
708 def->index = impl->ssa_alloc++;
709 }
710
711 return true;
712 }
713
714 static bool
715 add_reg_def_cb(nir_dest *dest, void *state)
716 {
717 nir_instr *instr = state;
718
719 if (!dest->is_ssa) {
720 dest->reg.parent_instr = instr;
721 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
722 }
723
724 return true;
725 }
726
727 static void
728 add_defs_uses(nir_instr *instr)
729 {
730 nir_foreach_src(instr, add_use_cb, instr);
731 nir_foreach_dest(instr, add_reg_def_cb, instr);
732 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
733 }
734
735 void
736 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
737 {
738 switch (cursor.option) {
739 case nir_cursor_before_block:
740 /* Only allow inserting jumps into empty blocks. */
741 if (instr->type == nir_instr_type_jump)
742 assert(exec_list_is_empty(&cursor.block->instr_list));
743
744 instr->block = cursor.block;
745 add_defs_uses(instr);
746 exec_list_push_head(&cursor.block->instr_list, &instr->node);
747 break;
748 case nir_cursor_after_block: {
749 /* Inserting instructions after a jump is illegal. */
750 nir_instr *last = nir_block_last_instr(cursor.block);
751 assert(last == NULL || last->type != nir_instr_type_jump);
752 (void) last;
753
754 instr->block = cursor.block;
755 add_defs_uses(instr);
756 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
757 break;
758 }
759 case nir_cursor_before_instr:
760 assert(instr->type != nir_instr_type_jump);
761 instr->block = cursor.instr->block;
762 add_defs_uses(instr);
763 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
764 break;
765 case nir_cursor_after_instr:
766 /* Inserting instructions after a jump is illegal. */
767 assert(cursor.instr->type != nir_instr_type_jump);
768
769 /* Only allow inserting jumps at the end of the block. */
770 if (instr->type == nir_instr_type_jump)
771 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
772
773 instr->block = cursor.instr->block;
774 add_defs_uses(instr);
775 exec_node_insert_after(&cursor.instr->node, &instr->node);
776 break;
777 }
778
779 if (instr->type == nir_instr_type_jump)
780 nir_handle_add_jump(instr->block);
781 }
782
783 static bool
784 src_is_valid(const nir_src *src)
785 {
786 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
787 }
788
789 static bool
790 remove_use_cb(nir_src *src, void *state)
791 {
792 if (src_is_valid(src))
793 list_del(&src->use_link);
794
795 return true;
796 }
797
798 static bool
799 remove_def_cb(nir_dest *dest, void *state)
800 {
801 if (!dest->is_ssa)
802 list_del(&dest->reg.def_link);
803
804 return true;
805 }
806
807 static void
808 remove_defs_uses(nir_instr *instr)
809 {
810 nir_foreach_dest(instr, remove_def_cb, instr);
811 nir_foreach_src(instr, remove_use_cb, instr);
812 }
813
814 void nir_instr_remove(nir_instr *instr)
815 {
816 remove_defs_uses(instr);
817 exec_node_remove(&instr->node);
818
819 if (instr->type == nir_instr_type_jump) {
820 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
821 nir_handle_remove_jump(instr->block, jump_instr->type);
822 }
823 }
824
825 /*@}*/
826
827 void
828 nir_index_local_regs(nir_function_impl *impl)
829 {
830 unsigned index = 0;
831 foreach_list_typed(nir_register, reg, node, &impl->registers) {
832 reg->index = index++;
833 }
834 impl->reg_alloc = index;
835 }
836
837 void
838 nir_index_global_regs(nir_shader *shader)
839 {
840 unsigned index = 0;
841 foreach_list_typed(nir_register, reg, node, &shader->registers) {
842 reg->index = index++;
843 }
844 shader->reg_alloc = index;
845 }
846
847 static bool
848 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
849 {
850 return cb(&instr->dest.dest, state);
851 }
852
853 static bool
854 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
855 void *state)
856 {
857 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
858 return cb(&instr->dest, state);
859
860 return true;
861 }
862
863 static bool
864 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
865 void *state)
866 {
867 return cb(&instr->dest, state);
868 }
869
870 static bool
871 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
872 {
873 return cb(&instr->dest, state);
874 }
875
876 static bool
877 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
878 nir_foreach_dest_cb cb, void *state)
879 {
880 nir_foreach_parallel_copy_entry(instr, entry) {
881 if (!cb(&entry->dest, state))
882 return false;
883 }
884
885 return true;
886 }
887
888 bool
889 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
890 {
891 switch (instr->type) {
892 case nir_instr_type_alu:
893 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
894 case nir_instr_type_intrinsic:
895 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
896 case nir_instr_type_tex:
897 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
898 case nir_instr_type_phi:
899 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
900 case nir_instr_type_parallel_copy:
901 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
902 cb, state);
903
904 case nir_instr_type_load_const:
905 case nir_instr_type_ssa_undef:
906 case nir_instr_type_call:
907 case nir_instr_type_jump:
908 break;
909
910 default:
911 unreachable("Invalid instruction type");
912 break;
913 }
914
915 return true;
916 }
917
918 struct foreach_ssa_def_state {
919 nir_foreach_ssa_def_cb cb;
920 void *client_state;
921 };
922
923 static inline bool
924 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
925 {
926 struct foreach_ssa_def_state *state = void_state;
927
928 if (dest->is_ssa)
929 return state->cb(&dest->ssa, state->client_state);
930 else
931 return true;
932 }
933
934 bool
935 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
936 {
937 switch (instr->type) {
938 case nir_instr_type_alu:
939 case nir_instr_type_tex:
940 case nir_instr_type_intrinsic:
941 case nir_instr_type_phi:
942 case nir_instr_type_parallel_copy: {
943 struct foreach_ssa_def_state foreach_state = {cb, state};
944 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
945 }
946
947 case nir_instr_type_load_const:
948 return cb(&nir_instr_as_load_const(instr)->def, state);
949 case nir_instr_type_ssa_undef:
950 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
951 case nir_instr_type_call:
952 case nir_instr_type_jump:
953 return true;
954 default:
955 unreachable("Invalid instruction type");
956 }
957 }
958
959 static bool
960 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
961 {
962 if (!cb(src, state))
963 return false;
964 if (!src->is_ssa && src->reg.indirect)
965 return cb(src->reg.indirect, state);
966 return true;
967 }
968
969 static bool
970 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
971 void *state)
972 {
973 if (deref->deref_array_type == nir_deref_array_type_indirect)
974 return visit_src(&deref->indirect, cb, state);
975 return true;
976 }
977
978 static bool
979 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
980 {
981 nir_deref *cur = &deref->deref;
982 while (cur != NULL) {
983 if (cur->deref_type == nir_deref_type_array)
984 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
985 return false;
986
987 cur = cur->child;
988 }
989
990 return true;
991 }
992
993 static bool
994 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
995 {
996 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
997 if (!visit_src(&instr->src[i].src, cb, state))
998 return false;
999
1000 return true;
1001 }
1002
1003 static bool
1004 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1005 {
1006 for (unsigned i = 0; i < instr->num_srcs; i++)
1007 if (!visit_src(&instr->src[i].src, cb, state))
1008 return false;
1009
1010 if (instr->sampler != NULL)
1011 if (!visit_deref_src(instr->sampler, cb, state))
1012 return false;
1013
1014 return true;
1015 }
1016
1017 static bool
1018 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1019 void *state)
1020 {
1021 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1022 for (unsigned i = 0; i < num_srcs; i++)
1023 if (!visit_src(&instr->src[i], cb, state))
1024 return false;
1025
1026 unsigned num_vars =
1027 nir_intrinsic_infos[instr->intrinsic].num_variables;
1028 for (unsigned i = 0; i < num_vars; i++)
1029 if (!visit_deref_src(instr->variables[i], cb, state))
1030 return false;
1031
1032 return true;
1033 }
1034
1035 static bool
1036 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1037 {
1038 return true;
1039 }
1040
1041 static bool
1042 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1043 void *state)
1044 {
1045 return true;
1046 }
1047
1048 static bool
1049 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1050 {
1051 nir_foreach_phi_src(instr, src) {
1052 if (!visit_src(&src->src, cb, state))
1053 return false;
1054 }
1055
1056 return true;
1057 }
1058
1059 static bool
1060 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1061 nir_foreach_src_cb cb, void *state)
1062 {
1063 nir_foreach_parallel_copy_entry(instr, entry) {
1064 if (!visit_src(&entry->src, cb, state))
1065 return false;
1066 }
1067
1068 return true;
1069 }
1070
1071 typedef struct {
1072 void *state;
1073 nir_foreach_src_cb cb;
1074 } visit_dest_indirect_state;
1075
1076 static bool
1077 visit_dest_indirect(nir_dest *dest, void *_state)
1078 {
1079 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1080
1081 if (!dest->is_ssa && dest->reg.indirect)
1082 return state->cb(dest->reg.indirect, state->state);
1083
1084 return true;
1085 }
1086
1087 bool
1088 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1089 {
1090 switch (instr->type) {
1091 case nir_instr_type_alu:
1092 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1093 return false;
1094 break;
1095 case nir_instr_type_intrinsic:
1096 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1097 return false;
1098 break;
1099 case nir_instr_type_tex:
1100 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1101 return false;
1102 break;
1103 case nir_instr_type_call:
1104 if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1105 return false;
1106 break;
1107 case nir_instr_type_load_const:
1108 if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1109 return false;
1110 break;
1111 case nir_instr_type_phi:
1112 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1113 return false;
1114 break;
1115 case nir_instr_type_parallel_copy:
1116 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1117 cb, state))
1118 return false;
1119 break;
1120 case nir_instr_type_jump:
1121 case nir_instr_type_ssa_undef:
1122 return true;
1123
1124 default:
1125 unreachable("Invalid instruction type");
1126 break;
1127 }
1128
1129 visit_dest_indirect_state dest_state;
1130 dest_state.state = state;
1131 dest_state.cb = cb;
1132 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1133 }
1134
1135 nir_const_value *
1136 nir_src_as_const_value(nir_src src)
1137 {
1138 if (!src.is_ssa)
1139 return NULL;
1140
1141 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1142 return NULL;
1143
1144 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1145
1146 return &load->value;
1147 }
1148
1149 /**
1150 * Returns true if the source is known to be dynamically uniform. Otherwise it
1151 * returns false which means it may or may not be dynamically uniform but it
1152 * can't be determined.
1153 */
1154 bool
1155 nir_src_is_dynamically_uniform(nir_src src)
1156 {
1157 if (!src.is_ssa)
1158 return false;
1159
1160 /* Constants are trivially dynamically uniform */
1161 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1162 return true;
1163
1164 /* As are uniform variables */
1165 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1166 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1167
1168 if (intr->intrinsic == nir_intrinsic_load_uniform)
1169 return true;
1170 }
1171
1172 /* XXX: this could have many more tests, such as when a sampler function is
1173 * called with dynamically uniform arguments.
1174 */
1175 return false;
1176 }
1177
1178 static void
1179 src_remove_all_uses(nir_src *src)
1180 {
1181 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1182 if (!src_is_valid(src))
1183 continue;
1184
1185 list_del(&src->use_link);
1186 }
1187 }
1188
1189 static void
1190 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1191 {
1192 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1193 if (!src_is_valid(src))
1194 continue;
1195
1196 if (parent_instr) {
1197 src->parent_instr = parent_instr;
1198 if (src->is_ssa)
1199 list_addtail(&src->use_link, &src->ssa->uses);
1200 else
1201 list_addtail(&src->use_link, &src->reg.reg->uses);
1202 } else {
1203 assert(parent_if);
1204 src->parent_if = parent_if;
1205 if (src->is_ssa)
1206 list_addtail(&src->use_link, &src->ssa->if_uses);
1207 else
1208 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1209 }
1210 }
1211 }
1212
1213 void
1214 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1215 {
1216 assert(!src_is_valid(src) || src->parent_instr == instr);
1217
1218 src_remove_all_uses(src);
1219 *src = new_src;
1220 src_add_all_uses(src, instr, NULL);
1221 }
1222
1223 void
1224 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1225 {
1226 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1227
1228 src_remove_all_uses(dest);
1229 src_remove_all_uses(src);
1230 *dest = *src;
1231 *src = NIR_SRC_INIT;
1232 src_add_all_uses(dest, dest_instr, NULL);
1233 }
1234
1235 void
1236 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1237 {
1238 nir_src *src = &if_stmt->condition;
1239 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1240
1241 src_remove_all_uses(src);
1242 *src = new_src;
1243 src_add_all_uses(src, NULL, if_stmt);
1244 }
1245
1246 void
1247 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1248 {
1249 if (dest->is_ssa) {
1250 /* We can only overwrite an SSA destination if it has no uses. */
1251 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1252 } else {
1253 list_del(&dest->reg.def_link);
1254 if (dest->reg.indirect)
1255 src_remove_all_uses(dest->reg.indirect);
1256 }
1257
1258 /* We can't re-write with an SSA def */
1259 assert(!new_dest.is_ssa);
1260
1261 nir_dest_copy(dest, &new_dest, instr);
1262
1263 dest->reg.parent_instr = instr;
1264 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1265
1266 if (dest->reg.indirect)
1267 src_add_all_uses(dest->reg.indirect, instr, NULL);
1268 }
1269
1270 void
1271 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1272 unsigned num_components, const char *name)
1273 {
1274 def->name = name;
1275 def->parent_instr = instr;
1276 list_inithead(&def->uses);
1277 list_inithead(&def->if_uses);
1278 def->num_components = num_components;
1279
1280 if (instr->block) {
1281 nir_function_impl *impl =
1282 nir_cf_node_get_function(&instr->block->cf_node);
1283
1284 def->index = impl->ssa_alloc++;
1285 } else {
1286 def->index = UINT_MAX;
1287 }
1288 }
1289
1290 void
1291 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1292 unsigned num_components, const char *name)
1293 {
1294 dest->is_ssa = true;
1295 nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1296 }
1297
1298 void
1299 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1300 {
1301 assert(!new_src.is_ssa || def != new_src.ssa);
1302
1303 nir_foreach_use_safe(def, use_src) {
1304 nir_instr *src_parent_instr = use_src->parent_instr;
1305 list_del(&use_src->use_link);
1306 nir_src_copy(use_src, &new_src, src_parent_instr);
1307 src_add_all_uses(use_src, src_parent_instr, NULL);
1308 }
1309
1310 nir_foreach_if_use_safe(def, use_src) {
1311 nir_if *src_parent_if = use_src->parent_if;
1312 list_del(&use_src->use_link);
1313 nir_src_copy(use_src, &new_src, src_parent_if);
1314 src_add_all_uses(use_src, NULL, src_parent_if);
1315 }
1316 }
1317
1318
1319 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1320 bool reverse, void *state);
1321
1322 static inline bool
1323 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1324 {
1325 if (reverse) {
1326 foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1327 &if_stmt->else_list) {
1328 if (!foreach_cf_node(node, cb, reverse, state))
1329 return false;
1330 }
1331
1332 foreach_list_typed_safe_reverse(nir_cf_node, node, node,
1333 &if_stmt->then_list) {
1334 if (!foreach_cf_node(node, cb, reverse, state))
1335 return false;
1336 }
1337 } else {
1338 foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1339 if (!foreach_cf_node(node, cb, reverse, state))
1340 return false;
1341 }
1342
1343 foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1344 if (!foreach_cf_node(node, cb, reverse, state))
1345 return false;
1346 }
1347 }
1348
1349 return true;
1350 }
1351
1352 static inline bool
1353 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1354 {
1355 if (reverse) {
1356 foreach_list_typed_safe_reverse(nir_cf_node, node, node, &loop->body) {
1357 if (!foreach_cf_node(node, cb, reverse, state))
1358 return false;
1359 }
1360 } else {
1361 foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1362 if (!foreach_cf_node(node, cb, reverse, state))
1363 return false;
1364 }
1365 }
1366
1367 return true;
1368 }
1369
1370 static bool
1371 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1372 bool reverse, void *state)
1373 {
1374 switch (node->type) {
1375 case nir_cf_node_block:
1376 return cb(nir_cf_node_as_block(node), state);
1377 case nir_cf_node_if:
1378 return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1379 case nir_cf_node_loop:
1380 return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1381 break;
1382
1383 default:
1384 unreachable("Invalid CFG node type");
1385 break;
1386 }
1387
1388 return false;
1389 }
1390
1391 bool
1392 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1393 void *state)
1394 {
1395 return foreach_cf_node(node, cb, false, state);
1396 }
1397
1398 bool
1399 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1400 {
1401 foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1402 if (!foreach_cf_node(node, cb, false, state))
1403 return false;
1404 }
1405
1406 return cb(impl->end_block, state);
1407 }
1408
1409 bool
1410 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1411 void *state)
1412 {
1413 if (!cb(impl->end_block, state))
1414 return false;
1415
1416 foreach_list_typed_safe_reverse(nir_cf_node, node, node, &impl->body) {
1417 if (!foreach_cf_node(node, cb, true, state))
1418 return false;
1419 }
1420
1421 return true;
1422 }
1423
1424 nir_if *
1425 nir_block_get_following_if(nir_block *block)
1426 {
1427 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1428 return NULL;
1429
1430 if (nir_cf_node_is_last(&block->cf_node))
1431 return NULL;
1432
1433 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1434
1435 if (next_node->type != nir_cf_node_if)
1436 return NULL;
1437
1438 return nir_cf_node_as_if(next_node);
1439 }
1440
1441 nir_loop *
1442 nir_block_get_following_loop(nir_block *block)
1443 {
1444 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1445 return NULL;
1446
1447 if (nir_cf_node_is_last(&block->cf_node))
1448 return NULL;
1449
1450 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1451
1452 if (next_node->type != nir_cf_node_loop)
1453 return NULL;
1454
1455 return nir_cf_node_as_loop(next_node);
1456 }
1457 static bool
1458 index_block(nir_block *block, void *state)
1459 {
1460 unsigned *index = state;
1461 block->index = (*index)++;
1462 return true;
1463 }
1464
1465 void
1466 nir_index_blocks(nir_function_impl *impl)
1467 {
1468 unsigned index = 0;
1469
1470 if (impl->valid_metadata & nir_metadata_block_index)
1471 return;
1472
1473 nir_foreach_block(impl, index_block, &index);
1474
1475 impl->num_blocks = index;
1476 }
1477
1478 static bool
1479 index_ssa_def_cb(nir_ssa_def *def, void *state)
1480 {
1481 unsigned *index = (unsigned *) state;
1482 def->index = (*index)++;
1483
1484 return true;
1485 }
1486
1487 static bool
1488 index_ssa_block(nir_block *block, void *state)
1489 {
1490 nir_foreach_instr(block, instr)
1491 nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1492
1493 return true;
1494 }
1495
1496 /**
1497 * The indices are applied top-to-bottom which has the very nice property
1498 * that, if A dominates B, then A->index <= B->index.
1499 */
1500 void
1501 nir_index_ssa_defs(nir_function_impl *impl)
1502 {
1503 unsigned index = 0;
1504 nir_foreach_block(impl, index_ssa_block, &index);
1505 impl->ssa_alloc = index;
1506 }
1507
1508 static bool
1509 index_instrs_block(nir_block *block, void *state)
1510 {
1511 unsigned *index = state;
1512 nir_foreach_instr(block, instr)
1513 instr->index = (*index)++;
1514
1515 return true;
1516 }
1517
1518 /**
1519 * The indices are applied top-to-bottom which has the very nice property
1520 * that, if A dominates B, then A->index <= B->index.
1521 */
1522 unsigned
1523 nir_index_instrs(nir_function_impl *impl)
1524 {
1525 unsigned index = 0;
1526 nir_foreach_block(impl, index_instrs_block, &index);
1527 return index;
1528 }
1529
1530 nir_intrinsic_op
1531 nir_intrinsic_from_system_value(gl_system_value val)
1532 {
1533 switch (val) {
1534 case SYSTEM_VALUE_VERTEX_ID:
1535 return nir_intrinsic_load_vertex_id;
1536 case SYSTEM_VALUE_INSTANCE_ID:
1537 return nir_intrinsic_load_instance_id;
1538 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1539 return nir_intrinsic_load_vertex_id_zero_base;
1540 case SYSTEM_VALUE_BASE_VERTEX:
1541 return nir_intrinsic_load_base_vertex;
1542 case SYSTEM_VALUE_INVOCATION_ID:
1543 return nir_intrinsic_load_invocation_id;
1544 case SYSTEM_VALUE_FRONT_FACE:
1545 return nir_intrinsic_load_front_face;
1546 case SYSTEM_VALUE_SAMPLE_ID:
1547 return nir_intrinsic_load_sample_id;
1548 case SYSTEM_VALUE_SAMPLE_POS:
1549 return nir_intrinsic_load_sample_pos;
1550 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1551 return nir_intrinsic_load_sample_mask_in;
1552 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1553 return nir_intrinsic_load_local_invocation_id;
1554 case SYSTEM_VALUE_WORK_GROUP_ID:
1555 return nir_intrinsic_load_work_group_id;
1556 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1557 return nir_intrinsic_load_num_work_groups;
1558 case SYSTEM_VALUE_PRIMITIVE_ID:
1559 return nir_intrinsic_load_primitive_id;
1560 case SYSTEM_VALUE_TESS_COORD:
1561 return nir_intrinsic_load_tess_coord;
1562 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1563 return nir_intrinsic_load_tess_level_outer;
1564 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1565 return nir_intrinsic_load_tess_level_inner;
1566 case SYSTEM_VALUE_VERTICES_IN:
1567 return nir_intrinsic_load_patch_vertices_in;
1568 default:
1569 unreachable("system value does not directly correspond to intrinsic");
1570 }
1571 }
1572
1573 gl_system_value
1574 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1575 {
1576 switch (intrin) {
1577 case nir_intrinsic_load_vertex_id:
1578 return SYSTEM_VALUE_VERTEX_ID;
1579 case nir_intrinsic_load_instance_id:
1580 return SYSTEM_VALUE_INSTANCE_ID;
1581 case nir_intrinsic_load_vertex_id_zero_base:
1582 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1583 case nir_intrinsic_load_base_vertex:
1584 return SYSTEM_VALUE_BASE_VERTEX;
1585 case nir_intrinsic_load_invocation_id:
1586 return SYSTEM_VALUE_INVOCATION_ID;
1587 case nir_intrinsic_load_front_face:
1588 return SYSTEM_VALUE_FRONT_FACE;
1589 case nir_intrinsic_load_sample_id:
1590 return SYSTEM_VALUE_SAMPLE_ID;
1591 case nir_intrinsic_load_sample_pos:
1592 return SYSTEM_VALUE_SAMPLE_POS;
1593 case nir_intrinsic_load_sample_mask_in:
1594 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1595 case nir_intrinsic_load_local_invocation_id:
1596 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1597 case nir_intrinsic_load_num_work_groups:
1598 return SYSTEM_VALUE_NUM_WORK_GROUPS;
1599 case nir_intrinsic_load_work_group_id:
1600 return SYSTEM_VALUE_WORK_GROUP_ID;
1601 case nir_intrinsic_load_primitive_id:
1602 return SYSTEM_VALUE_PRIMITIVE_ID;
1603 case nir_intrinsic_load_tess_coord:
1604 return SYSTEM_VALUE_TESS_COORD;
1605 case nir_intrinsic_load_tess_level_outer:
1606 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1607 case nir_intrinsic_load_tess_level_inner:
1608 return SYSTEM_VALUE_TESS_LEVEL_INNER;
1609 case nir_intrinsic_load_patch_vertices_in:
1610 return SYSTEM_VALUE_VERTICES_IN;
1611 default:
1612 unreachable("intrinsic doesn't produce a system value");
1613 }
1614 }