2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Jason Ekstrand (jason@jlekstrand.net)
31 * This file implements an out-of-SSA pass as described in "Revisiting
32 * Out-of-SSA Translation for Correctness, Code Quality, and Efficiency" by
36 struct from_ssa_state
{
39 struct hash_table
*ssa_table
;
40 struct hash_table
*merge_node_table
;
42 nir_function_impl
*impl
;
45 /* Returns true if a dominates b */
47 ssa_def_dominates(nir_ssa_def
*a
, nir_ssa_def
*b
)
49 if (a
->live_index
== 0) {
50 /* SSA undefs always dominate */
52 } else if (b
->live_index
< a
->live_index
) {
54 } else if (a
->parent_instr
->block
== b
->parent_instr
->block
) {
55 return a
->live_index
<= b
->live_index
;
57 nir_block
*block
= b
->parent_instr
->block
;
58 while (block
->imm_dom
!= NULL
) {
59 if (block
->imm_dom
== a
->parent_instr
->block
)
61 block
= block
->imm_dom
;
68 /* The following data structure, which I have named merge_set is a way of
69 * representing a set registers of non-interfering registers. This is
70 * based on the concept of a "dominence forest" presented in "Fast Copy
71 * Coalescing and Live-Range Identification" by Budimlic et. al. but the
72 * implementation concept is taken from "Revisiting Out-of-SSA Translation
73 * for Correctness, Code Quality, and Efficiency" by Boissinot et. al..
75 * Each SSA definition is associated with a merge_node and the association
76 * is represented by a combination of a hash table and the "def" parameter
77 * in the merge_node structure. The merge_set stores a linked list of
78 * merge_node's in dominence order of the ssa definitions. (Since the
79 * liveness analysis pass indexes the SSA values in dominence order for us,
80 * this is an easy thing to keep up.) It is assumed that no pair of the
81 * nodes in a given set interfere. Merging two sets or checking for
82 * interference can be done in a single linear-time merge-sort walk of the
88 struct exec_node node
;
89 struct merge_set
*set
;
93 typedef struct merge_set
{
94 struct exec_list nodes
;
101 merge_set_dump(merge_set
*set
, FILE *fp
)
103 nir_ssa_def
*dom
[set
->size
];
106 foreach_list_typed(merge_node
, node
, node
, &set
->nodes
) {
107 while (dom_idx
>= 0 && !ssa_def_dominates(dom
[dom_idx
], node
->def
))
110 for (int i
= 0; i
<= dom_idx
; i
++)
114 fprintf(fp
, "ssa_%d /* %s */\n", node
->def
->index
, node
->def
->name
);
116 fprintf(fp
, "ssa_%d\n", node
->def
->index
);
118 dom
[++dom_idx
] = node
->def
;
124 get_merge_node(nir_ssa_def
*def
, struct from_ssa_state
*state
)
126 struct hash_entry
*entry
=
127 _mesa_hash_table_search(state
->merge_node_table
, def
);
131 merge_set
*set
= ralloc(state
->dead_ctx
, merge_set
);
132 exec_list_make_empty(&set
->nodes
);
136 merge_node
*node
= ralloc(state
->dead_ctx
, merge_node
);
139 exec_list_push_head(&set
->nodes
, &node
->node
);
141 _mesa_hash_table_insert(state
->merge_node_table
, def
, node
);
147 merge_nodes_interfere(merge_node
*a
, merge_node
*b
)
149 return nir_ssa_defs_interfere(a
->def
, b
->def
);
152 /* Merges b into a */
154 merge_merge_sets(merge_set
*a
, merge_set
*b
)
156 struct exec_node
*an
= exec_list_get_head(&a
->nodes
);
157 struct exec_node
*bn
= exec_list_get_head(&b
->nodes
);
158 while (!exec_node_is_tail_sentinel(bn
)) {
159 merge_node
*a_node
= exec_node_data(merge_node
, an
, node
);
160 merge_node
*b_node
= exec_node_data(merge_node
, bn
, node
);
162 if (exec_node_is_tail_sentinel(an
) ||
163 a_node
->def
->live_index
> b_node
->def
->live_index
) {
164 struct exec_node
*next
= bn
->next
;
165 exec_node_remove(bn
);
166 exec_node_insert_node_before(an
, bn
);
167 exec_node_data(merge_node
, bn
, node
)->set
= a
;
180 /* Checks for any interference between two merge sets
182 * This is an implementation of Algorithm 2 in "Revisiting Out-of-SSA
183 * Translation for Correctness, Code Quality, and Efficiency" by
187 merge_sets_interfere(merge_set
*a
, merge_set
*b
)
189 merge_node
*dom
[a
->size
+ b
->size
];
192 struct exec_node
*an
= exec_list_get_head(&a
->nodes
);
193 struct exec_node
*bn
= exec_list_get_head(&b
->nodes
);
194 while (!exec_node_is_tail_sentinel(an
) ||
195 !exec_node_is_tail_sentinel(bn
)) {
198 if (exec_node_is_tail_sentinel(an
)) {
199 current
= exec_node_data(merge_node
, bn
, node
);
201 } else if (exec_node_is_tail_sentinel(bn
)) {
202 current
= exec_node_data(merge_node
, an
, node
);
205 merge_node
*a_node
= exec_node_data(merge_node
, an
, node
);
206 merge_node
*b_node
= exec_node_data(merge_node
, bn
, node
);
208 if (a_node
->def
->live_index
<= b_node
->def
->live_index
) {
217 while (dom_idx
>= 0 &&
218 !ssa_def_dominates(dom
[dom_idx
]->def
, current
->def
))
221 if (dom_idx
>= 0 && merge_nodes_interfere(current
, dom
[dom_idx
]))
224 dom
[++dom_idx
] = current
;
231 add_parallel_copy_to_end_of_block(nir_block
*block
, void *void_state
)
233 struct from_ssa_state
*state
= void_state
;
235 bool need_end_copy
= false;
236 if (block
->successors
[0]) {
237 nir_instr
*instr
= nir_block_first_instr(block
->successors
[0]);
238 if (instr
&& instr
->type
== nir_instr_type_phi
)
239 need_end_copy
= true;
242 if (block
->successors
[1]) {
243 nir_instr
*instr
= nir_block_first_instr(block
->successors
[1]);
244 if (instr
&& instr
->type
== nir_instr_type_phi
)
245 need_end_copy
= true;
249 /* If one of our successors has at least one phi node, we need to
250 * create a parallel copy at the end of the block but before the jump
253 nir_parallel_copy_instr
*pcopy
=
254 nir_parallel_copy_instr_create(state
->dead_ctx
);
256 nir_instr
*last_instr
= nir_block_last_instr(block
);
257 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
258 nir_instr_insert_before(last_instr
, &pcopy
->instr
);
260 nir_instr_insert_after_block(block
, &pcopy
->instr
);
267 static nir_parallel_copy_instr
*
268 get_parallel_copy_at_end_of_block(nir_block
*block
)
270 nir_instr
*last_instr
= nir_block_last_instr(block
);
271 if (last_instr
== NULL
)
274 /* The last instruction may be a jump in which case the parallel copy is
277 if (last_instr
->type
== nir_instr_type_jump
)
278 last_instr
= nir_instr_prev(last_instr
);
280 if (last_instr
->type
== nir_instr_type_parallel_copy
)
281 return nir_instr_as_parallel_copy(last_instr
);
286 /** Isolate phi nodes with parallel copies
288 * In order to solve the dependency problems with the sources and
289 * destinations of phi nodes, we first isolate them by adding parallel
290 * copies to the beginnings and ends of basic blocks. For every block with
291 * phi nodes, we add a parallel copy immediately following the last phi
292 * node that copies the destinations of all of the phi nodes to new SSA
293 * values. We also add a parallel copy to the end of every block that has
294 * a successor with phi nodes that, for each phi node in each successor,
295 * copies the corresponding sorce of the phi node and adjust the phi to
296 * used the destination of the parallel copy.
298 * In SSA form, each value has exactly one definition. What this does is
299 * ensure that each value used in a phi also has exactly one use. The
300 * destinations of phis are only used by the parallel copy immediately
301 * following the phi nodes and. Thanks to the parallel copy at the end of
302 * the predecessor block, the sources of phi nodes are are the only use of
303 * that value. This allows us to immediately assign all the sources and
304 * destinations of any given phi node to the same register without worrying
305 * about interference at all. We do coalescing to get rid of the parallel
306 * copies where possible.
308 * Before this pass can be run, we have to iterate over the blocks with
309 * add_parallel_copy_to_end_of_block to ensure that the parallel copies at
310 * the ends of blocks exist. We can create the ones at the beginnings as
311 * we go, but the ones at the ends of blocks need to be created ahead of
312 * time because of potential back-edges in the CFG.
315 isolate_phi_nodes_block(nir_block
*block
, void *void_state
)
317 struct from_ssa_state
*state
= void_state
;
319 nir_instr
*last_phi_instr
= NULL
;
320 nir_foreach_instr(block
, instr
) {
321 /* Phi nodes only ever come at the start of a block */
322 if (instr
->type
!= nir_instr_type_phi
)
325 last_phi_instr
= instr
;
328 /* If we don't have any phi's, then there's nothing for us to do. */
329 if (last_phi_instr
== NULL
)
332 /* If we have phi nodes, we need to create a parallel copy at the
333 * start of this block but after the phi nodes.
335 nir_parallel_copy_instr
*block_pcopy
=
336 nir_parallel_copy_instr_create(state
->dead_ctx
);
337 nir_instr_insert_after(last_phi_instr
, &block_pcopy
->instr
);
339 nir_foreach_instr(block
, instr
) {
340 /* Phi nodes only ever come at the start of a block */
341 if (instr
->type
!= nir_instr_type_phi
)
344 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
345 assert(phi
->dest
.is_ssa
);
346 nir_foreach_phi_src(phi
, src
) {
347 nir_parallel_copy_instr
*pcopy
=
348 get_parallel_copy_at_end_of_block(src
->pred
);
351 nir_parallel_copy_entry
*entry
= ralloc(state
->dead_ctx
,
352 nir_parallel_copy_entry
);
353 exec_list_push_tail(&pcopy
->entries
, &entry
->node
);
355 entry
->src
= nir_src_copy(src
->src
, state
->dead_ctx
);
356 _mesa_set_add(src
->src
.ssa
->uses
, &pcopy
->instr
);
358 entry
->dest
.is_ssa
= true;
359 nir_ssa_def_init(&pcopy
->instr
, &entry
->dest
.ssa
,
360 phi
->dest
.ssa
.num_components
, src
->src
.ssa
->name
);
362 struct set_entry
*use_entry
=
363 _mesa_set_search(src
->src
.ssa
->uses
, instr
);
365 /* It is possible that a phi node can use the same source twice
366 * but for different basic blocks. If that happens, entry will
367 * be NULL because we already deleted it. This is safe
368 * because, by the time the loop is done, we will have deleted
369 * all of the sources of the phi from their respective use sets
370 * and moved them to the parallel copy definitions.
372 _mesa_set_remove(src
->src
.ssa
->uses
, use_entry
);
374 src
->src
.ssa
= &entry
->dest
.ssa
;
375 _mesa_set_add(entry
->dest
.ssa
.uses
, instr
);
378 nir_parallel_copy_entry
*entry
= ralloc(state
->dead_ctx
,
379 nir_parallel_copy_entry
);
380 exec_list_push_tail(&block_pcopy
->entries
, &entry
->node
);
382 entry
->dest
.is_ssa
= true;
383 nir_ssa_def_init(&block_pcopy
->instr
, &entry
->dest
.ssa
,
384 phi
->dest
.ssa
.num_components
, phi
->dest
.ssa
.name
);
386 nir_src entry_dest_src
= {
387 .ssa
= &entry
->dest
.ssa
,
390 nir_ssa_def_rewrite_uses(&phi
->dest
.ssa
, entry_dest_src
, state
->mem_ctx
);
392 entry
->src
.is_ssa
= true;
393 entry
->src
.ssa
= &phi
->dest
.ssa
;
394 _mesa_set_add(phi
->dest
.ssa
.uses
, &block_pcopy
->instr
);
401 coalesce_phi_nodes_block(nir_block
*block
, void *void_state
)
403 struct from_ssa_state
*state
= void_state
;
405 nir_foreach_instr(block
, instr
) {
406 /* Phi nodes only ever come at the start of a block */
407 if (instr
->type
!= nir_instr_type_phi
)
410 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
412 assert(phi
->dest
.is_ssa
);
413 merge_node
*dest_node
= get_merge_node(&phi
->dest
.ssa
, state
);
415 nir_foreach_phi_src(phi
, src
) {
416 assert(src
->src
.is_ssa
);
417 merge_node
*src_node
= get_merge_node(src
->src
.ssa
, state
);
418 if (src_node
->set
!= dest_node
->set
)
419 merge_merge_sets(dest_node
->set
, src_node
->set
);
427 agressive_coalesce_parallel_copy(nir_parallel_copy_instr
*pcopy
,
428 struct from_ssa_state
*state
)
430 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
431 if (!entry
->src
.is_ssa
)
434 /* Since load_const instructions are SSA only, we can't replace their
435 * destinations with registers and, therefore, can't coalesce them.
437 if (entry
->src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
440 /* Don't try and coalesce these */
441 if (entry
->dest
.ssa
.num_components
!= entry
->src
.ssa
->num_components
)
444 merge_node
*src_node
= get_merge_node(entry
->src
.ssa
, state
);
445 merge_node
*dest_node
= get_merge_node(&entry
->dest
.ssa
, state
);
447 if (src_node
->set
== dest_node
->set
)
450 if (!merge_sets_interfere(src_node
->set
, dest_node
->set
))
451 merge_merge_sets(src_node
->set
, dest_node
->set
);
456 agressive_coalesce_block(nir_block
*block
, void *void_state
)
458 struct from_ssa_state
*state
= void_state
;
460 nir_parallel_copy_instr
*start_pcopy
= NULL
;
461 nir_foreach_instr(block
, instr
) {
462 /* Phi nodes only ever come at the start of a block */
463 if (instr
->type
!= nir_instr_type_phi
) {
464 if (instr
->type
!= nir_instr_type_parallel_copy
)
465 break; /* The parallel copy must be right after the phis */
467 start_pcopy
= nir_instr_as_parallel_copy(instr
);
469 agressive_coalesce_parallel_copy(start_pcopy
, state
);
475 nir_parallel_copy_instr
*end_pcopy
=
476 get_parallel_copy_at_end_of_block(block
);
478 if (end_pcopy
&& end_pcopy
!= start_pcopy
)
479 agressive_coalesce_parallel_copy(end_pcopy
, state
);
484 static nir_register
*
485 get_register_for_ssa_def(nir_ssa_def
*def
, struct from_ssa_state
*state
)
487 struct hash_entry
*entry
=
488 _mesa_hash_table_search(state
->merge_node_table
, def
);
490 merge_node
*node
= (merge_node
*)entry
->data
;
492 /* If it doesn't have a register yet, create one. Note that all of
493 * the things in the merge set should be the same so it doesn't
494 * matter which node's definition we use.
496 if (node
->set
->reg
== NULL
) {
497 node
->set
->reg
= nir_local_reg_create(state
->impl
);
498 node
->set
->reg
->name
= def
->name
;
499 node
->set
->reg
->num_components
= def
->num_components
;
500 node
->set
->reg
->num_array_elems
= 0;
503 return node
->set
->reg
;
506 entry
= _mesa_hash_table_search(state
->ssa_table
, def
);
508 return (nir_register
*)entry
->data
;
510 /* We leave load_const SSA values alone. They act as immediates to
511 * the backend. If it got coalesced into a phi, that's ok.
513 if (def
->parent_instr
->type
== nir_instr_type_load_const
)
516 nir_register
*reg
= nir_local_reg_create(state
->impl
);
517 reg
->name
= def
->name
;
518 reg
->num_components
= def
->num_components
;
519 reg
->num_array_elems
= 0;
521 _mesa_hash_table_insert(state
->ssa_table
, def
, reg
);
527 rewrite_ssa_src(nir_src
*src
, void *void_state
)
529 struct from_ssa_state
*state
= void_state
;
532 nir_register
*reg
= get_register_for_ssa_def(src
->ssa
, state
);
535 assert(src
->ssa
->parent_instr
->type
== nir_instr_type_load_const
);
539 memset(src
, 0, sizeof *src
);
542 /* We don't need to remove it from the uses set because that is going
543 * away. We just need to add it to the one for the register. */
544 _mesa_set_add(reg
->uses
, state
->instr
);
551 rewrite_ssa_dest(nir_dest
*dest
, void *void_state
)
553 struct from_ssa_state
*state
= void_state
;
556 nir_register
*reg
= get_register_for_ssa_def(&dest
->ssa
, state
);
559 assert(dest
->ssa
.parent_instr
->type
== nir_instr_type_load_const
);
563 _mesa_set_destroy(dest
->ssa
.uses
, NULL
);
564 _mesa_set_destroy(dest
->ssa
.if_uses
, NULL
);
566 memset(dest
, 0, sizeof *dest
);
569 _mesa_set_add(reg
->defs
, state
->instr
);
575 /* Resolves ssa definitions to registers. While we're at it, we also
576 * remove phi nodes and ssa_undef instructions
579 resolve_registers_block(nir_block
*block
, void *void_state
)
581 struct from_ssa_state
*state
= void_state
;
583 nir_foreach_instr_safe(block
, instr
) {
584 state
->instr
= instr
;
585 nir_foreach_src(instr
, rewrite_ssa_src
, state
);
586 nir_foreach_dest(instr
, rewrite_ssa_dest
, state
);
588 if (instr
->type
== nir_instr_type_ssa_undef
||
589 instr
->type
== nir_instr_type_phi
) {
590 nir_instr_remove(instr
);
591 ralloc_steal(state
->dead_ctx
, instr
);
596 nir_if
*following_if
= nir_block_get_following_if(block
);
597 if (following_if
&& following_if
->condition
.is_ssa
) {
598 nir_register
*reg
= get_register_for_ssa_def(following_if
->condition
.ssa
,
601 memset(&following_if
->condition
, 0, sizeof following_if
->condition
);
602 following_if
->condition
.reg
.reg
= reg
;
604 _mesa_set_add(reg
->if_uses
, following_if
);
606 /* FIXME: We really shouldn't hit this. We should be doing
607 * constant control flow propagation.
609 assert(following_if
->condition
.ssa
->parent_instr
->type
== nir_instr_type_load_const
);
617 emit_copy(nir_parallel_copy_instr
*pcopy
, nir_src src
, nir_src dest_src
,
620 assert(!dest_src
.is_ssa
&&
621 dest_src
.reg
.indirect
== NULL
&&
622 dest_src
.reg
.base_offset
== 0);
624 .reg
.reg
= dest_src
.reg
.reg
,
625 .reg
.indirect
= NULL
,
626 .reg
.base_offset
= 0,
631 assert(src
.ssa
->num_components
>= dest
.reg
.reg
->num_components
);
633 assert(src
.reg
.reg
->num_components
>= dest
.reg
.reg
->num_components
);
635 nir_alu_instr
*mov
= nir_alu_instr_create(mem_ctx
, nir_op_imov
);
636 mov
->src
[0].src
= nir_src_copy(src
, mem_ctx
);
637 mov
->dest
.dest
= nir_dest_copy(dest
, mem_ctx
);
638 mov
->dest
.write_mask
= (1 << dest
.reg
.reg
->num_components
) - 1;
640 nir_instr_insert_before(&pcopy
->instr
, &mov
->instr
);
643 /* Resolves a single parallel copy operation into a sequence of mov's
645 * This is based on Algorithm 1 from "Revisiting Out-of-SSA Translation for
646 * Correctness, Code Quality, and Efficiency" by Boissinot et. al..
647 * However, I never got the algorithm to work as written, so this version
648 * is slightly modified.
650 * The algorithm works by playing this little shell game with the values.
651 * We start by recording where every source value is and which source value
652 * each destination value should recieve. We then grab any copy whose
653 * destination is "empty", i.e. not used as a source, and do the following:
654 * - Find where its source value currently lives
655 * - Emit the move instruction
656 * - Set the location of the source value to the destination
657 * - Mark the location containing the source value
658 * - Mark the destination as no longer needing to be copied
660 * When we run out of "empty" destinations, we have a cycle and so we
661 * create a temporary register, copy to that register, and mark the value
662 * we copied as living in that temporary. Now, the cycle is broken, so we
663 * can continue with the above steps.
666 resolve_parallel_copy(nir_parallel_copy_instr
*pcopy
,
667 struct from_ssa_state
*state
)
669 unsigned num_copies
= 0;
670 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
671 /* Sources may be SSA */
672 if (!entry
->src
.is_ssa
&& entry
->src
.reg
.reg
== entry
->dest
.reg
.reg
)
678 if (num_copies
== 0) {
679 /* Hooray, we don't need any copies! */
680 nir_instr_remove(&pcopy
->instr
);
684 /* The register/source corresponding to the given index */
685 nir_src values
[num_copies
* 2];
686 memset(values
, 0, sizeof values
);
688 /* The current location of a given piece of data */
689 int loc
[num_copies
* 2];
691 /* The piece of data that the given piece of data is to be copied from */
692 int pred
[num_copies
* 2];
694 /* Initialize loc and pred. We will use -1 for "null" */
695 memset(loc
, -1, sizeof loc
);
696 memset(pred
, -1, sizeof pred
);
698 /* The destinations we have yet to properly fill */
699 int to_do
[num_copies
* 2];
702 /* Now we set everything up:
703 * - All values get assigned a temporary index
704 * - Current locations are set from sources
705 * - Predicessors are recorded from sources and destinations
708 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
709 /* Sources may be SSA */
710 if (!entry
->src
.is_ssa
&& entry
->src
.reg
.reg
== entry
->dest
.reg
.reg
)
714 for (int i
= 0; i
< num_vals
; ++i
) {
715 if (nir_srcs_equal(values
[i
], entry
->src
))
719 src_idx
= num_vals
++;
720 values
[src_idx
] = entry
->src
;
724 .reg
.reg
= entry
->dest
.reg
.reg
,
725 .reg
.indirect
= NULL
,
726 .reg
.base_offset
= 0,
731 for (int i
= 0; i
< num_vals
; ++i
) {
732 if (nir_srcs_equal(values
[i
], dest_src
)) {
733 /* Each destination of a parallel copy instruction should be
734 * unique. A destination may get used as a source, so we still
735 * have to walk the list. However, the predecessor should not,
736 * at this point, be set yet, so we should have -1 here.
738 assert(pred
[i
] == -1);
743 dest_idx
= num_vals
++;
744 values
[dest_idx
] = dest_src
;
747 loc
[src_idx
] = src_idx
;
748 pred
[dest_idx
] = src_idx
;
750 to_do
[++to_do_idx
] = dest_idx
;
753 /* Currently empty destinations we can go ahead and fill */
754 int ready
[num_copies
* 2];
757 /* Mark the ones that are ready for copying. We know an index is a
758 * destination if it has a predecessor and it's ready for copying if
759 * it's not marked as containing data.
761 for (int i
= 0; i
< num_vals
; i
++) {
762 if (pred
[i
] != -1 && loc
[i
] == -1)
763 ready
[++ready_idx
] = i
;
766 while (to_do_idx
>= 0) {
767 while (ready_idx
>= 0) {
768 int b
= ready
[ready_idx
--];
770 emit_copy(pcopy
, values
[loc
[a
]], values
[b
], state
->mem_ctx
);
772 /* If any other copies want a they can find it at b */
775 /* b has been filled, mark it as not needing to be copied */
778 /* If a needs to be filled, it's ready for copying now */
780 ready
[++ready_idx
] = a
;
782 int b
= to_do
[to_do_idx
--];
786 /* If we got here, then we don't have any more trivial copies that we
787 * can do. We have to break a cycle, so we create a new temporary
788 * register for that purpose. Normally, if going out of SSA after
789 * register allocation, you would want to avoid creating temporary
790 * registers. However, we are going out of SSA before register
791 * allocation, so we would rather not create extra register
792 * dependencies for the backend to deal with. If it wants, the
793 * backend can coalesce the (possibly multiple) temporaries.
795 assert(num_vals
< num_copies
* 2);
796 nir_register
*reg
= nir_local_reg_create(state
->impl
);
797 reg
->name
= "copy_temp";
798 reg
->num_array_elems
= 0;
799 if (values
[b
].is_ssa
)
800 reg
->num_components
= values
[b
].ssa
->num_components
;
802 reg
->num_components
= values
[b
].reg
.reg
->num_components
;
803 values
[num_vals
].is_ssa
= false;
804 values
[num_vals
].reg
.reg
= reg
;
806 emit_copy(pcopy
, values
[b
], values
[num_vals
], state
->mem_ctx
);
808 ready
[++ready_idx
] = b
;
812 nir_instr_remove(&pcopy
->instr
);
815 /* Resolves the parallel copies in a block. Each block can have at most
816 * two: One at the beginning, right after all the phi noces, and one at
817 * the end (or right before the final jump if it exists).
820 resolve_parallel_copies_block(nir_block
*block
, void *void_state
)
822 struct from_ssa_state
*state
= void_state
;
824 /* At this point, we have removed all of the phi nodes. If a parallel
825 * copy existed right after the phi nodes in this block, it is now the
828 nir_instr
*first_instr
= nir_block_first_instr(block
);
829 if (first_instr
== NULL
)
830 return true; /* Empty, nothing to do. */
832 if (first_instr
->type
== nir_instr_type_parallel_copy
) {
833 nir_parallel_copy_instr
*pcopy
= nir_instr_as_parallel_copy(first_instr
);
835 resolve_parallel_copy(pcopy
, state
);
838 /* It's possible that the above code already cleaned up the end parallel
839 * copy. However, doing so removed it form the instructions list so we
840 * won't find it here. Therefore, it's safe to go ahead and just look
841 * for one and clean it up if it exists.
843 nir_parallel_copy_instr
*end_pcopy
=
844 get_parallel_copy_at_end_of_block(block
);
846 resolve_parallel_copy(end_pcopy
, state
);
852 nir_convert_from_ssa_impl(nir_function_impl
*impl
)
854 struct from_ssa_state state
;
856 state
.mem_ctx
= ralloc_parent(impl
);
857 state
.dead_ctx
= ralloc_context(NULL
);
859 state
.merge_node_table
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
860 _mesa_key_pointer_equal
);
862 nir_foreach_block(impl
, add_parallel_copy_to_end_of_block
, &state
);
863 nir_foreach_block(impl
, isolate_phi_nodes_block
, &state
);
865 /* Mark metadata as dirty before we ask for liveness analysis */
866 nir_metadata_preserve(impl
, nir_metadata_block_index
|
867 nir_metadata_dominance
);
869 nir_metadata_require(impl
, nir_metadata_live_variables
|
870 nir_metadata_dominance
);
872 nir_foreach_block(impl
, coalesce_phi_nodes_block
, &state
);
873 nir_foreach_block(impl
, agressive_coalesce_block
, &state
);
875 state
.ssa_table
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
876 _mesa_key_pointer_equal
);
877 nir_foreach_block(impl
, resolve_registers_block
, &state
);
879 nir_foreach_block(impl
, resolve_parallel_copies_block
, &state
);
881 nir_metadata_preserve(impl
, nir_metadata_block_index
|
882 nir_metadata_dominance
);
884 /* Clean up dead instructions and the hash tables */
885 _mesa_hash_table_destroy(state
.ssa_table
, NULL
);
886 _mesa_hash_table_destroy(state
.merge_node_table
, NULL
);
887 ralloc_free(state
.dead_ctx
);
891 nir_convert_from_ssa(nir_shader
*shader
)
893 nir_foreach_overload(shader
, overload
) {
895 nir_convert_from_ssa_impl(overload
->impl
);