2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Jason Ekstrand (jason@jlekstrand.net)
31 * This file implements an out-of-SSA pass as described in "Revisiting
32 * Out-of-SSA Translation for Correctness, Code Quality, and Efficiency" by
36 struct from_ssa_state
{
39 struct hash_table
*ssa_table
;
40 struct hash_table
*merge_node_table
;
42 nir_function_impl
*impl
;
45 /* Returns true if a dominates b */
47 ssa_def_dominates(nir_ssa_def
*a
, nir_ssa_def
*b
)
49 if (a
->live_index
== 0) {
50 /* SSA undefs always dominate */
52 } else if (b
->live_index
< a
->live_index
) {
54 } else if (a
->parent_instr
->block
== b
->parent_instr
->block
) {
55 return a
->live_index
<= b
->live_index
;
57 return nir_block_dominates(a
->parent_instr
->block
,
58 b
->parent_instr
->block
);
63 /* The following data structure, which I have named merge_set is a way of
64 * representing a set registers of non-interfering registers. This is
65 * based on the concept of a "dominence forest" presented in "Fast Copy
66 * Coalescing and Live-Range Identification" by Budimlic et. al. but the
67 * implementation concept is taken from "Revisiting Out-of-SSA Translation
68 * for Correctness, Code Quality, and Efficiency" by Boissinot et. al..
70 * Each SSA definition is associated with a merge_node and the association
71 * is represented by a combination of a hash table and the "def" parameter
72 * in the merge_node structure. The merge_set stores a linked list of
73 * merge_node's in dominence order of the ssa definitions. (Since the
74 * liveness analysis pass indexes the SSA values in dominence order for us,
75 * this is an easy thing to keep up.) It is assumed that no pair of the
76 * nodes in a given set interfere. Merging two sets or checking for
77 * interference can be done in a single linear-time merge-sort walk of the
83 struct exec_node node
;
84 struct merge_set
*set
;
88 typedef struct merge_set
{
89 struct exec_list nodes
;
96 merge_set_dump(merge_set
*set
, FILE *fp
)
98 nir_ssa_def
*dom
[set
->size
];
101 foreach_list_typed(merge_node
, node
, node
, &set
->nodes
) {
102 while (dom_idx
>= 0 && !ssa_def_dominates(dom
[dom_idx
], node
->def
))
105 for (int i
= 0; i
<= dom_idx
; i
++)
109 fprintf(fp
, "ssa_%d /* %s */\n", node
->def
->index
, node
->def
->name
);
111 fprintf(fp
, "ssa_%d\n", node
->def
->index
);
113 dom
[++dom_idx
] = node
->def
;
119 get_merge_node(nir_ssa_def
*def
, struct from_ssa_state
*state
)
121 struct hash_entry
*entry
=
122 _mesa_hash_table_search(state
->merge_node_table
, def
);
126 merge_set
*set
= ralloc(state
->dead_ctx
, merge_set
);
127 exec_list_make_empty(&set
->nodes
);
131 merge_node
*node
= ralloc(state
->dead_ctx
, merge_node
);
134 exec_list_push_head(&set
->nodes
, &node
->node
);
136 _mesa_hash_table_insert(state
->merge_node_table
, def
, node
);
142 merge_nodes_interfere(merge_node
*a
, merge_node
*b
)
144 return nir_ssa_defs_interfere(a
->def
, b
->def
);
147 /* Merges b into a */
149 merge_merge_sets(merge_set
*a
, merge_set
*b
)
151 struct exec_node
*an
= exec_list_get_head(&a
->nodes
);
152 struct exec_node
*bn
= exec_list_get_head(&b
->nodes
);
153 while (!exec_node_is_tail_sentinel(bn
)) {
154 merge_node
*a_node
= exec_node_data(merge_node
, an
, node
);
155 merge_node
*b_node
= exec_node_data(merge_node
, bn
, node
);
157 if (exec_node_is_tail_sentinel(an
) ||
158 a_node
->def
->live_index
> b_node
->def
->live_index
) {
159 struct exec_node
*next
= bn
->next
;
160 exec_node_remove(bn
);
161 exec_node_insert_node_before(an
, bn
);
162 exec_node_data(merge_node
, bn
, node
)->set
= a
;
175 /* Checks for any interference between two merge sets
177 * This is an implementation of Algorithm 2 in "Revisiting Out-of-SSA
178 * Translation for Correctness, Code Quality, and Efficiency" by
182 merge_sets_interfere(merge_set
*a
, merge_set
*b
)
184 merge_node
*dom
[a
->size
+ b
->size
];
187 struct exec_node
*an
= exec_list_get_head(&a
->nodes
);
188 struct exec_node
*bn
= exec_list_get_head(&b
->nodes
);
189 while (!exec_node_is_tail_sentinel(an
) ||
190 !exec_node_is_tail_sentinel(bn
)) {
193 if (exec_node_is_tail_sentinel(an
)) {
194 current
= exec_node_data(merge_node
, bn
, node
);
196 } else if (exec_node_is_tail_sentinel(bn
)) {
197 current
= exec_node_data(merge_node
, an
, node
);
200 merge_node
*a_node
= exec_node_data(merge_node
, an
, node
);
201 merge_node
*b_node
= exec_node_data(merge_node
, bn
, node
);
203 if (a_node
->def
->live_index
<= b_node
->def
->live_index
) {
212 while (dom_idx
>= 0 &&
213 !ssa_def_dominates(dom
[dom_idx
]->def
, current
->def
))
216 if (dom_idx
>= 0 && merge_nodes_interfere(current
, dom
[dom_idx
]))
219 dom
[++dom_idx
] = current
;
226 add_parallel_copy_to_end_of_block(nir_block
*block
, void *void_state
)
228 struct from_ssa_state
*state
= void_state
;
230 bool need_end_copy
= false;
231 if (block
->successors
[0]) {
232 nir_instr
*instr
= nir_block_first_instr(block
->successors
[0]);
233 if (instr
&& instr
->type
== nir_instr_type_phi
)
234 need_end_copy
= true;
237 if (block
->successors
[1]) {
238 nir_instr
*instr
= nir_block_first_instr(block
->successors
[1]);
239 if (instr
&& instr
->type
== nir_instr_type_phi
)
240 need_end_copy
= true;
244 /* If one of our successors has at least one phi node, we need to
245 * create a parallel copy at the end of the block but before the jump
248 nir_parallel_copy_instr
*pcopy
=
249 nir_parallel_copy_instr_create(state
->dead_ctx
);
251 nir_instr
*last_instr
= nir_block_last_instr(block
);
252 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
253 nir_instr_insert_before(last_instr
, &pcopy
->instr
);
255 nir_instr_insert_after_block(block
, &pcopy
->instr
);
262 static nir_parallel_copy_instr
*
263 get_parallel_copy_at_end_of_block(nir_block
*block
)
265 nir_instr
*last_instr
= nir_block_last_instr(block
);
266 if (last_instr
== NULL
)
269 /* The last instruction may be a jump in which case the parallel copy is
272 if (last_instr
->type
== nir_instr_type_jump
)
273 last_instr
= nir_instr_prev(last_instr
);
275 if (last_instr
&& last_instr
->type
== nir_instr_type_parallel_copy
)
276 return nir_instr_as_parallel_copy(last_instr
);
281 /** Isolate phi nodes with parallel copies
283 * In order to solve the dependency problems with the sources and
284 * destinations of phi nodes, we first isolate them by adding parallel
285 * copies to the beginnings and ends of basic blocks. For every block with
286 * phi nodes, we add a parallel copy immediately following the last phi
287 * node that copies the destinations of all of the phi nodes to new SSA
288 * values. We also add a parallel copy to the end of every block that has
289 * a successor with phi nodes that, for each phi node in each successor,
290 * copies the corresponding sorce of the phi node and adjust the phi to
291 * used the destination of the parallel copy.
293 * In SSA form, each value has exactly one definition. What this does is
294 * ensure that each value used in a phi also has exactly one use. The
295 * destinations of phis are only used by the parallel copy immediately
296 * following the phi nodes and. Thanks to the parallel copy at the end of
297 * the predecessor block, the sources of phi nodes are are the only use of
298 * that value. This allows us to immediately assign all the sources and
299 * destinations of any given phi node to the same register without worrying
300 * about interference at all. We do coalescing to get rid of the parallel
301 * copies where possible.
303 * Before this pass can be run, we have to iterate over the blocks with
304 * add_parallel_copy_to_end_of_block to ensure that the parallel copies at
305 * the ends of blocks exist. We can create the ones at the beginnings as
306 * we go, but the ones at the ends of blocks need to be created ahead of
307 * time because of potential back-edges in the CFG.
310 isolate_phi_nodes_block(nir_block
*block
, void *void_state
)
312 struct from_ssa_state
*state
= void_state
;
314 nir_instr
*last_phi_instr
= NULL
;
315 nir_foreach_instr(block
, instr
) {
316 /* Phi nodes only ever come at the start of a block */
317 if (instr
->type
!= nir_instr_type_phi
)
320 last_phi_instr
= instr
;
323 /* If we don't have any phi's, then there's nothing for us to do. */
324 if (last_phi_instr
== NULL
)
327 /* If we have phi nodes, we need to create a parallel copy at the
328 * start of this block but after the phi nodes.
330 nir_parallel_copy_instr
*block_pcopy
=
331 nir_parallel_copy_instr_create(state
->dead_ctx
);
332 nir_instr_insert_after(last_phi_instr
, &block_pcopy
->instr
);
334 nir_foreach_instr(block
, instr
) {
335 /* Phi nodes only ever come at the start of a block */
336 if (instr
->type
!= nir_instr_type_phi
)
339 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
340 assert(phi
->dest
.is_ssa
);
341 nir_foreach_phi_src(phi
, src
) {
342 nir_parallel_copy_instr
*pcopy
=
343 get_parallel_copy_at_end_of_block(src
->pred
);
346 nir_parallel_copy_entry
*entry
= ralloc(state
->dead_ctx
,
347 nir_parallel_copy_entry
);
348 exec_list_push_tail(&pcopy
->entries
, &entry
->node
);
350 nir_src_copy(&entry
->src
, &src
->src
, state
->dead_ctx
);
351 _mesa_set_add(src
->src
.ssa
->uses
, &pcopy
->instr
);
353 nir_ssa_dest_init(&pcopy
->instr
, &entry
->dest
,
354 phi
->dest
.ssa
.num_components
, src
->src
.ssa
->name
);
356 struct set_entry
*use_entry
=
357 _mesa_set_search(src
->src
.ssa
->uses
, instr
);
359 /* It is possible that a phi node can use the same source twice
360 * but for different basic blocks. If that happens, entry will
361 * be NULL because we already deleted it. This is safe
362 * because, by the time the loop is done, we will have deleted
363 * all of the sources of the phi from their respective use sets
364 * and moved them to the parallel copy definitions.
366 _mesa_set_remove(src
->src
.ssa
->uses
, use_entry
);
368 src
->src
.ssa
= &entry
->dest
.ssa
;
369 _mesa_set_add(entry
->dest
.ssa
.uses
, instr
);
372 nir_parallel_copy_entry
*entry
= ralloc(state
->dead_ctx
,
373 nir_parallel_copy_entry
);
374 exec_list_push_tail(&block_pcopy
->entries
, &entry
->node
);
376 nir_ssa_dest_init(&block_pcopy
->instr
, &entry
->dest
,
377 phi
->dest
.ssa
.num_components
, phi
->dest
.ssa
.name
);
378 nir_ssa_def_rewrite_uses(&phi
->dest
.ssa
,
379 nir_src_for_ssa(&entry
->dest
.ssa
),
382 entry
->src
.is_ssa
= true;
383 entry
->src
.ssa
= &phi
->dest
.ssa
;
384 _mesa_set_add(phi
->dest
.ssa
.uses
, &block_pcopy
->instr
);
391 coalesce_phi_nodes_block(nir_block
*block
, void *void_state
)
393 struct from_ssa_state
*state
= void_state
;
395 nir_foreach_instr(block
, instr
) {
396 /* Phi nodes only ever come at the start of a block */
397 if (instr
->type
!= nir_instr_type_phi
)
400 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
402 assert(phi
->dest
.is_ssa
);
403 merge_node
*dest_node
= get_merge_node(&phi
->dest
.ssa
, state
);
405 nir_foreach_phi_src(phi
, src
) {
406 assert(src
->src
.is_ssa
);
407 merge_node
*src_node
= get_merge_node(src
->src
.ssa
, state
);
408 if (src_node
->set
!= dest_node
->set
)
409 merge_merge_sets(dest_node
->set
, src_node
->set
);
417 agressive_coalesce_parallel_copy(nir_parallel_copy_instr
*pcopy
,
418 struct from_ssa_state
*state
)
420 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
421 if (!entry
->src
.is_ssa
)
424 /* Since load_const instructions are SSA only, we can't replace their
425 * destinations with registers and, therefore, can't coalesce them.
427 if (entry
->src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
430 /* Don't try and coalesce these */
431 if (entry
->dest
.ssa
.num_components
!= entry
->src
.ssa
->num_components
)
434 merge_node
*src_node
= get_merge_node(entry
->src
.ssa
, state
);
435 merge_node
*dest_node
= get_merge_node(&entry
->dest
.ssa
, state
);
437 if (src_node
->set
== dest_node
->set
)
440 if (!merge_sets_interfere(src_node
->set
, dest_node
->set
))
441 merge_merge_sets(src_node
->set
, dest_node
->set
);
446 agressive_coalesce_block(nir_block
*block
, void *void_state
)
448 struct from_ssa_state
*state
= void_state
;
450 nir_parallel_copy_instr
*start_pcopy
= NULL
;
451 nir_foreach_instr(block
, instr
) {
452 /* Phi nodes only ever come at the start of a block */
453 if (instr
->type
!= nir_instr_type_phi
) {
454 if (instr
->type
!= nir_instr_type_parallel_copy
)
455 break; /* The parallel copy must be right after the phis */
457 start_pcopy
= nir_instr_as_parallel_copy(instr
);
459 agressive_coalesce_parallel_copy(start_pcopy
, state
);
465 nir_parallel_copy_instr
*end_pcopy
=
466 get_parallel_copy_at_end_of_block(block
);
468 if (end_pcopy
&& end_pcopy
!= start_pcopy
)
469 agressive_coalesce_parallel_copy(end_pcopy
, state
);
474 static nir_register
*
475 get_register_for_ssa_def(nir_ssa_def
*def
, struct from_ssa_state
*state
)
477 struct hash_entry
*entry
=
478 _mesa_hash_table_search(state
->merge_node_table
, def
);
480 merge_node
*node
= (merge_node
*)entry
->data
;
482 /* If it doesn't have a register yet, create one. Note that all of
483 * the things in the merge set should be the same so it doesn't
484 * matter which node's definition we use.
486 if (node
->set
->reg
== NULL
) {
487 node
->set
->reg
= nir_local_reg_create(state
->impl
);
488 node
->set
->reg
->name
= def
->name
;
489 node
->set
->reg
->num_components
= def
->num_components
;
490 node
->set
->reg
->num_array_elems
= 0;
493 return node
->set
->reg
;
496 entry
= _mesa_hash_table_search(state
->ssa_table
, def
);
498 return (nir_register
*)entry
->data
;
500 /* We leave load_const SSA values alone. They act as immediates to
501 * the backend. If it got coalesced into a phi, that's ok.
503 if (def
->parent_instr
->type
== nir_instr_type_load_const
)
506 nir_register
*reg
= nir_local_reg_create(state
->impl
);
507 reg
->name
= def
->name
;
508 reg
->num_components
= def
->num_components
;
509 reg
->num_array_elems
= 0;
511 /* This register comes from an SSA definition that was not part of a
512 * phi-web. Therefore, we know it has a single unique definition
513 * that dominates all of its uses. Therefore, we can copy the
514 * parent_instr from the SSA def safely.
516 reg
->parent_instr
= def
->parent_instr
;
518 _mesa_hash_table_insert(state
->ssa_table
, def
, reg
);
524 rewrite_ssa_src(nir_src
*src
, void *void_state
)
526 struct from_ssa_state
*state
= void_state
;
529 nir_register
*reg
= get_register_for_ssa_def(src
->ssa
, state
);
532 assert(src
->ssa
->parent_instr
->type
== nir_instr_type_load_const
);
536 memset(src
, 0, sizeof *src
);
539 /* We don't need to remove it from the uses set because that is going
540 * away. We just need to add it to the one for the register. */
541 _mesa_set_add(reg
->uses
, state
->instr
);
548 rewrite_ssa_dest(nir_dest
*dest
, void *void_state
)
550 struct from_ssa_state
*state
= void_state
;
553 nir_register
*reg
= get_register_for_ssa_def(&dest
->ssa
, state
);
556 assert(dest
->ssa
.parent_instr
->type
== nir_instr_type_load_const
);
560 _mesa_set_destroy(dest
->ssa
.uses
, NULL
);
561 _mesa_set_destroy(dest
->ssa
.if_uses
, NULL
);
563 memset(dest
, 0, sizeof *dest
);
566 _mesa_set_add(reg
->defs
, state
->instr
);
572 /* Resolves ssa definitions to registers. While we're at it, we also
573 * remove phi nodes and ssa_undef instructions
576 resolve_registers_block(nir_block
*block
, void *void_state
)
578 struct from_ssa_state
*state
= void_state
;
580 nir_foreach_instr_safe(block
, instr
) {
581 state
->instr
= instr
;
582 nir_foreach_src(instr
, rewrite_ssa_src
, state
);
583 nir_foreach_dest(instr
, rewrite_ssa_dest
, state
);
585 if (instr
->type
== nir_instr_type_ssa_undef
||
586 instr
->type
== nir_instr_type_phi
) {
587 nir_instr_remove(instr
);
588 ralloc_steal(state
->dead_ctx
, instr
);
593 nir_if
*following_if
= nir_block_get_following_if(block
);
594 if (following_if
&& following_if
->condition
.is_ssa
) {
595 nir_register
*reg
= get_register_for_ssa_def(following_if
->condition
.ssa
,
598 memset(&following_if
->condition
, 0, sizeof following_if
->condition
);
599 following_if
->condition
.reg
.reg
= reg
;
601 _mesa_set_add(reg
->if_uses
, following_if
);
603 /* FIXME: We really shouldn't hit this. We should be doing
604 * constant control flow propagation.
606 assert(following_if
->condition
.ssa
->parent_instr
->type
== nir_instr_type_load_const
);
614 emit_copy(nir_parallel_copy_instr
*pcopy
, nir_src src
, nir_src dest_src
,
617 assert(!dest_src
.is_ssa
&&
618 dest_src
.reg
.indirect
== NULL
&&
619 dest_src
.reg
.base_offset
== 0);
622 assert(src
.ssa
->num_components
>= dest_src
.reg
.reg
->num_components
);
624 assert(src
.reg
.reg
->num_components
>= dest_src
.reg
.reg
->num_components
);
626 nir_alu_instr
*mov
= nir_alu_instr_create(mem_ctx
, nir_op_imov
);
627 nir_src_copy(&mov
->src
[0].src
, &src
, mem_ctx
);
628 mov
->dest
.dest
= nir_dest_for_reg(dest_src
.reg
.reg
);
629 mov
->dest
.write_mask
= (1 << dest_src
.reg
.reg
->num_components
) - 1;
631 nir_instr_insert_before(&pcopy
->instr
, &mov
->instr
);
634 /* Resolves a single parallel copy operation into a sequence of mov's
636 * This is based on Algorithm 1 from "Revisiting Out-of-SSA Translation for
637 * Correctness, Code Quality, and Efficiency" by Boissinot et. al..
638 * However, I never got the algorithm to work as written, so this version
639 * is slightly modified.
641 * The algorithm works by playing this little shell game with the values.
642 * We start by recording where every source value is and which source value
643 * each destination value should recieve. We then grab any copy whose
644 * destination is "empty", i.e. not used as a source, and do the following:
645 * - Find where its source value currently lives
646 * - Emit the move instruction
647 * - Set the location of the source value to the destination
648 * - Mark the location containing the source value
649 * - Mark the destination as no longer needing to be copied
651 * When we run out of "empty" destinations, we have a cycle and so we
652 * create a temporary register, copy to that register, and mark the value
653 * we copied as living in that temporary. Now, the cycle is broken, so we
654 * can continue with the above steps.
657 resolve_parallel_copy(nir_parallel_copy_instr
*pcopy
,
658 struct from_ssa_state
*state
)
660 unsigned num_copies
= 0;
661 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
662 /* Sources may be SSA */
663 if (!entry
->src
.is_ssa
&& entry
->src
.reg
.reg
== entry
->dest
.reg
.reg
)
669 if (num_copies
== 0) {
670 /* Hooray, we don't need any copies! */
671 nir_instr_remove(&pcopy
->instr
);
675 /* The register/source corresponding to the given index */
676 nir_src values
[num_copies
* 2];
677 memset(values
, 0, sizeof values
);
679 /* The current location of a given piece of data */
680 int loc
[num_copies
* 2];
682 /* The piece of data that the given piece of data is to be copied from */
683 int pred
[num_copies
* 2];
685 /* Initialize loc and pred. We will use -1 for "null" */
686 memset(loc
, -1, sizeof loc
);
687 memset(pred
, -1, sizeof pred
);
689 /* The destinations we have yet to properly fill */
690 int to_do
[num_copies
* 2];
693 /* Now we set everything up:
694 * - All values get assigned a temporary index
695 * - Current locations are set from sources
696 * - Predicessors are recorded from sources and destinations
699 nir_foreach_parallel_copy_entry(pcopy
, entry
) {
700 /* Sources may be SSA */
701 if (!entry
->src
.is_ssa
&& entry
->src
.reg
.reg
== entry
->dest
.reg
.reg
)
705 for (int i
= 0; i
< num_vals
; ++i
) {
706 if (nir_srcs_equal(values
[i
], entry
->src
))
710 src_idx
= num_vals
++;
711 values
[src_idx
] = entry
->src
;
714 nir_src dest_src
= nir_src_for_reg(entry
->dest
.reg
.reg
);
717 for (int i
= 0; i
< num_vals
; ++i
) {
718 if (nir_srcs_equal(values
[i
], dest_src
)) {
719 /* Each destination of a parallel copy instruction should be
720 * unique. A destination may get used as a source, so we still
721 * have to walk the list. However, the predecessor should not,
722 * at this point, be set yet, so we should have -1 here.
724 assert(pred
[i
] == -1);
729 dest_idx
= num_vals
++;
730 values
[dest_idx
] = dest_src
;
733 loc
[src_idx
] = src_idx
;
734 pred
[dest_idx
] = src_idx
;
736 to_do
[++to_do_idx
] = dest_idx
;
739 /* Currently empty destinations we can go ahead and fill */
740 int ready
[num_copies
* 2];
743 /* Mark the ones that are ready for copying. We know an index is a
744 * destination if it has a predecessor and it's ready for copying if
745 * it's not marked as containing data.
747 for (int i
= 0; i
< num_vals
; i
++) {
748 if (pred
[i
] != -1 && loc
[i
] == -1)
749 ready
[++ready_idx
] = i
;
752 while (to_do_idx
>= 0) {
753 while (ready_idx
>= 0) {
754 int b
= ready
[ready_idx
--];
756 emit_copy(pcopy
, values
[loc
[a
]], values
[b
], state
->mem_ctx
);
758 /* If any other copies want a they can find it at b */
761 /* b has been filled, mark it as not needing to be copied */
764 /* If a needs to be filled, it's ready for copying now */
766 ready
[++ready_idx
] = a
;
768 int b
= to_do
[to_do_idx
--];
772 /* If we got here, then we don't have any more trivial copies that we
773 * can do. We have to break a cycle, so we create a new temporary
774 * register for that purpose. Normally, if going out of SSA after
775 * register allocation, you would want to avoid creating temporary
776 * registers. However, we are going out of SSA before register
777 * allocation, so we would rather not create extra register
778 * dependencies for the backend to deal with. If it wants, the
779 * backend can coalesce the (possibly multiple) temporaries.
781 assert(num_vals
< num_copies
* 2);
782 nir_register
*reg
= nir_local_reg_create(state
->impl
);
783 reg
->name
= "copy_temp";
784 reg
->num_array_elems
= 0;
785 if (values
[b
].is_ssa
)
786 reg
->num_components
= values
[b
].ssa
->num_components
;
788 reg
->num_components
= values
[b
].reg
.reg
->num_components
;
789 values
[num_vals
].is_ssa
= false;
790 values
[num_vals
].reg
.reg
= reg
;
792 emit_copy(pcopy
, values
[b
], values
[num_vals
], state
->mem_ctx
);
794 ready
[++ready_idx
] = b
;
798 nir_instr_remove(&pcopy
->instr
);
801 /* Resolves the parallel copies in a block. Each block can have at most
802 * two: One at the beginning, right after all the phi noces, and one at
803 * the end (or right before the final jump if it exists).
806 resolve_parallel_copies_block(nir_block
*block
, void *void_state
)
808 struct from_ssa_state
*state
= void_state
;
810 /* At this point, we have removed all of the phi nodes. If a parallel
811 * copy existed right after the phi nodes in this block, it is now the
814 nir_instr
*first_instr
= nir_block_first_instr(block
);
815 if (first_instr
== NULL
)
816 return true; /* Empty, nothing to do. */
818 if (first_instr
->type
== nir_instr_type_parallel_copy
) {
819 nir_parallel_copy_instr
*pcopy
= nir_instr_as_parallel_copy(first_instr
);
821 resolve_parallel_copy(pcopy
, state
);
824 /* It's possible that the above code already cleaned up the end parallel
825 * copy. However, doing so removed it form the instructions list so we
826 * won't find it here. Therefore, it's safe to go ahead and just look
827 * for one and clean it up if it exists.
829 nir_parallel_copy_instr
*end_pcopy
=
830 get_parallel_copy_at_end_of_block(block
);
832 resolve_parallel_copy(end_pcopy
, state
);
838 nir_convert_from_ssa_impl(nir_function_impl
*impl
)
840 struct from_ssa_state state
;
842 state
.mem_ctx
= ralloc_parent(impl
);
843 state
.dead_ctx
= ralloc_context(NULL
);
845 state
.merge_node_table
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
846 _mesa_key_pointer_equal
);
848 nir_foreach_block(impl
, add_parallel_copy_to_end_of_block
, &state
);
849 nir_foreach_block(impl
, isolate_phi_nodes_block
, &state
);
851 /* Mark metadata as dirty before we ask for liveness analysis */
852 nir_metadata_preserve(impl
, nir_metadata_block_index
|
853 nir_metadata_dominance
);
855 nir_metadata_require(impl
, nir_metadata_live_variables
|
856 nir_metadata_dominance
);
858 nir_foreach_block(impl
, coalesce_phi_nodes_block
, &state
);
859 nir_foreach_block(impl
, agressive_coalesce_block
, &state
);
861 state
.ssa_table
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
862 _mesa_key_pointer_equal
);
863 nir_foreach_block(impl
, resolve_registers_block
, &state
);
865 nir_foreach_block(impl
, resolve_parallel_copies_block
, &state
);
867 nir_metadata_preserve(impl
, nir_metadata_block_index
|
868 nir_metadata_dominance
);
870 /* Clean up dead instructions and the hash tables */
871 _mesa_hash_table_destroy(state
.ssa_table
, NULL
);
872 _mesa_hash_table_destroy(state
.merge_node_table
, NULL
);
873 ralloc_free(state
.dead_ctx
);
877 nir_convert_from_ssa(nir_shader
*shader
)
879 nir_foreach_overload(shader
, overload
) {
881 nir_convert_from_ssa_impl(overload
->impl
);