Merge branch 'wip/i965-separate-sampler-tex' into vulkan
[mesa.git] / src / glsl / nir / nir_gather_info.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25
26 static void
27 gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader)
28 {
29 switch (instr->intrinsic) {
30 case nir_intrinsic_discard:
31 assert(shader->stage == MESA_SHADER_FRAGMENT);
32 shader->info.fs.uses_discard = true;
33 break;
34
35 case nir_intrinsic_load_front_face:
36 case nir_intrinsic_load_vertex_id:
37 case nir_intrinsic_load_vertex_id_zero_base:
38 case nir_intrinsic_load_base_vertex:
39 case nir_intrinsic_load_instance_id:
40 case nir_intrinsic_load_sample_id:
41 case nir_intrinsic_load_sample_pos:
42 case nir_intrinsic_load_sample_mask_in:
43 case nir_intrinsic_load_primitive_id:
44 case nir_intrinsic_load_invocation_id:
45 case nir_intrinsic_load_local_invocation_id:
46 case nir_intrinsic_load_work_group_id:
47 case nir_intrinsic_load_num_work_groups:
48 shader->info.system_values_read |=
49 (1 << nir_system_value_from_intrinsic(instr->intrinsic));
50 break;
51
52 case nir_intrinsic_end_primitive:
53 assert(shader->stage == MESA_SHADER_GEOMETRY);
54 shader->info.gs.uses_end_primitive = 1;
55 break;
56
57 default:
58 break;
59 }
60 }
61
62 static void
63 gather_tex_info(nir_tex_instr *instr, nir_shader *shader)
64 {
65 if (instr->op == nir_texop_tg4)
66 shader->info.uses_texture_gather = true;
67 }
68
69 static bool
70 gather_info_block(nir_block *block, void *shader)
71 {
72 nir_foreach_instr(block, instr) {
73 switch (instr->type) {
74 case nir_instr_type_intrinsic:
75 gather_intrinsic_info(nir_instr_as_intrinsic(instr), shader);
76 break;
77 case nir_instr_type_tex:
78 gather_tex_info(nir_instr_as_tex(instr), shader);
79 break;
80 case nir_instr_type_call:
81 assert(!"nir_shader_gather_info only works if functions are inlined");
82 break;
83 default:
84 break;
85 }
86 }
87
88 return true;
89 }
90
91 void
92 nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
93 {
94 shader->info.inputs_read = 0;
95 foreach_list_typed(nir_variable, var, node, &shader->inputs)
96 shader->info.inputs_read |= (1ull << var->data.location);
97
98 /* TODO: Some day we may need to add stream support to NIR */
99 shader->info.outputs_written = 0;
100 foreach_list_typed(nir_variable, var, node, &shader->outputs)
101 shader->info.outputs_written |= (1ull << var->data.location);
102
103 shader->info.system_values_read = 0;
104 foreach_list_typed(nir_variable, var, node, &shader->system_values)
105 shader->info.system_values_read |= (1ull << var->data.location);
106
107 nir_foreach_block(entrypoint, gather_info_block, shader);
108 }