2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
28 #include "ir_uniform.h"
30 #include "main/config.h"
34 const struct gl_shader_program
*shader_program
;
39 * replace atomic counter intrinsics that use a variable with intrinsics
40 * that directly store the buffer index and byte offset
44 lower_instr(nir_intrinsic_instr
*instr
,
45 lower_atomic_state
*state
)
48 switch (instr
->intrinsic
) {
49 case nir_intrinsic_atomic_counter_read_var
:
50 op
= nir_intrinsic_atomic_counter_read
;
53 case nir_intrinsic_atomic_counter_inc_var
:
54 op
= nir_intrinsic_atomic_counter_inc
;
57 case nir_intrinsic_atomic_counter_dec_var
:
58 op
= nir_intrinsic_atomic_counter_dec
;
65 if (instr
->variables
[0]->var
->data
.mode
!= nir_var_uniform
&&
66 instr
->variables
[0]->var
->data
.mode
!= nir_var_shader_storage
)
67 return; /* atomics passed as function arguments can't be lowered */
69 void *mem_ctx
= ralloc_parent(instr
);
70 unsigned uniform_loc
= instr
->variables
[0]->var
->data
.location
;
72 nir_intrinsic_instr
*new_instr
= nir_intrinsic_instr_create(mem_ctx
, op
);
73 new_instr
->const_index
[0] =
74 state
->shader_program
->UniformStorage
[uniform_loc
].opaque
[state
->shader
->stage
].index
;
76 nir_load_const_instr
*offset_const
= nir_load_const_instr_create(mem_ctx
, 1);
77 offset_const
->value
.u
[0] = instr
->variables
[0]->var
->data
.atomic
.offset
;
79 nir_instr_insert_before(&instr
->instr
, &offset_const
->instr
);
81 nir_ssa_def
*offset_def
= &offset_const
->def
;
83 nir_deref
*tail
= &instr
->variables
[0]->deref
;
84 while (tail
->child
!= NULL
) {
85 assert(tail
->child
->deref_type
== nir_deref_type_array
);
86 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
89 unsigned child_array_elements
= tail
->child
!= NULL
?
90 glsl_get_aoa_size(tail
->type
) : 1;
92 offset_const
->value
.u
[0] += deref_array
->base_offset
*
93 child_array_elements
* ATOMIC_COUNTER_SIZE
;
95 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
96 nir_load_const_instr
*atomic_counter_size
=
97 nir_load_const_instr_create(mem_ctx
, 1);
98 atomic_counter_size
->value
.u
[0] = child_array_elements
* ATOMIC_COUNTER_SIZE
;
99 nir_instr_insert_before(&instr
->instr
, &atomic_counter_size
->instr
);
101 nir_alu_instr
*mul
= nir_alu_instr_create(mem_ctx
, nir_op_imul
);
102 nir_ssa_dest_init(&mul
->instr
, &mul
->dest
.dest
, 1, NULL
);
103 mul
->dest
.write_mask
= 0x1;
104 nir_src_copy(&mul
->src
[0].src
, &deref_array
->indirect
, mul
);
105 mul
->src
[1].src
.is_ssa
= true;
106 mul
->src
[1].src
.ssa
= &atomic_counter_size
->def
;
107 nir_instr_insert_before(&instr
->instr
, &mul
->instr
);
109 nir_alu_instr
*add
= nir_alu_instr_create(mem_ctx
, nir_op_iadd
);
110 nir_ssa_dest_init(&add
->instr
, &add
->dest
.dest
, 1, NULL
);
111 add
->dest
.write_mask
= 0x1;
112 add
->src
[0].src
.is_ssa
= true;
113 add
->src
[0].src
.ssa
= &mul
->dest
.dest
.ssa
;
114 add
->src
[1].src
.is_ssa
= true;
115 add
->src
[1].src
.ssa
= offset_def
;
116 nir_instr_insert_before(&instr
->instr
, &add
->instr
);
118 offset_def
= &add
->dest
.dest
.ssa
;
122 new_instr
->src
[0].is_ssa
= true;
123 new_instr
->src
[0].ssa
= offset_def
;
125 if (instr
->dest
.is_ssa
) {
126 nir_ssa_dest_init(&new_instr
->instr
, &new_instr
->dest
,
127 instr
->dest
.ssa
.num_components
, NULL
);
128 nir_ssa_def_rewrite_uses(&instr
->dest
.ssa
,
129 nir_src_for_ssa(&new_instr
->dest
.ssa
));
131 nir_dest_copy(&new_instr
->dest
, &instr
->dest
, mem_ctx
);
134 nir_instr_insert_before(&instr
->instr
, &new_instr
->instr
);
135 nir_instr_remove(&instr
->instr
);
139 lower_block(nir_block
*block
, void *state
)
141 nir_foreach_instr_safe(block
, instr
) {
142 if (instr
->type
== nir_instr_type_intrinsic
)
143 lower_instr(nir_instr_as_intrinsic(instr
),
144 (lower_atomic_state
*) state
);
151 nir_lower_atomics(nir_shader
*shader
,
152 const struct gl_shader_program
*shader_program
)
154 lower_atomic_state state
= {
156 .shader_program
= shader_program
,
159 nir_foreach_overload(shader
, overload
) {
160 if (overload
->impl
) {
161 nir_foreach_block(overload
->impl
, lower_block
, (void *) &state
);
162 nir_metadata_preserve(overload
->impl
, nir_metadata_block_index
|
163 nir_metadata_dominance
);