src/glsl/nir/nir_lower_io.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *    Jason Ekstrand (jason@jlekstrand.net)
  26  *
  27  */
  28
  29 /*
  30  * This lowering pass converts references to input/output variables with
  31  * loads/stores to actual input/output intrinsics.
  32  */
  33
  34 #include "nir.h"
  35 #include "nir_builder.h"
  36
  37 struct lower_io_state {
  38    nir_builder builder;
  39    void *mem_ctx;
  40    int (*type_size)(const struct glsl_type *type);
  41    nir_variable_mode mode;
  42 };
  43
  44 void
  45 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
  46                          int (*type_size)(const struct glsl_type *))
  47 {
  48    unsigned location = 0;
  49
  50    nir_foreach_variable(var, var_list) {
  51       /*
  52        * UBO's have their own address spaces, so don't count them towards the
  53        * number of global uniforms
  54        */
  55       if ((var->data.mode == nir_var_uniform || var->data.mode == nir_var_shader_storage) &&
  56           var->interface_type != NULL)
  57          continue;
  58
  59       var->data.driver_location = location;
  60       location += type_size(var->type);
  61    }
  62
  63    *size = location;
  64 }
  65
  66 /**
  67  * Returns true if we're processing a stage whose inputs are arrays indexed
  68  * by a vertex number (such as geometry shader inputs).
  69  */
  70 static bool
  71 is_per_vertex_input(struct lower_io_state *state, nir_variable *var)
  72 {
  73    gl_shader_stage stage = state->builder.shader->stage;
  74
  75    return var->data.mode == nir_var_shader_in && !var->data.patch &&
  76           (stage == MESA_SHADER_TESS_CTRL ||
  77            stage == MESA_SHADER_TESS_EVAL ||
  78            stage == MESA_SHADER_GEOMETRY);
  79 }
  80
  81 static unsigned
  82 get_io_offset(nir_deref_var *deref, nir_instr *instr,
  83               nir_ssa_def **vertex_index,
  84               nir_ssa_def **out_indirect,
  85               struct lower_io_state *state)
  86 {
  87    nir_ssa_def *indirect = NULL;
  88    unsigned base_offset = 0;
  89
  90    nir_builder *b = &state->builder;
  91    b->cursor = nir_before_instr(instr);
  92
  93    nir_deref *tail = &deref->deref;
  94
  95    /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
  96     * outermost array index separate.  Process the rest normally.
  97     */
  98    if (vertex_index != NULL) {
  99       tail = tail->child;
 100       assert(tail->deref_type == nir_deref_type_array);
 101       nir_deref_array *deref_array = nir_deref_as_array(tail);
 102
 103       nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset);
 104       if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
 105          vtx = nir_iadd(b, vtx, nir_ssa_for_src(b, deref_array->indirect, 1));
 106       }
 107       *vertex_index = vtx;
 108    }
 109
 110    while (tail->child != NULL) {
 111       const struct glsl_type *parent_type = tail->type;
 112       tail = tail->child;
 113
 114       if (tail->deref_type == nir_deref_type_array) {
 115          nir_deref_array *deref_array = nir_deref_as_array(tail);
 116          unsigned size = state->type_size(tail->type);
 117
 118          base_offset += size * deref_array->base_offset;
 119
 120          if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
 121             nir_ssa_def *mul =
 122                nir_imul(b, nir_imm_int(b, size),
 123                         nir_ssa_for_src(b, deref_array->indirect, 1));
 124
 125             indirect = indirect ? nir_iadd(b, indirect, mul) : mul;
 126          }
 127       } else if (tail->deref_type == nir_deref_type_struct) {
 128          nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
 129
 130          for (unsigned i = 0; i < deref_struct->index; i++) {
 131             base_offset +=
 132                state->type_size(glsl_get_struct_field(parent_type, i));
 133          }
 134       }
 135    }
 136
 137    *out_indirect = indirect;
 138    return base_offset;
 139 }
 140
 141 static nir_intrinsic_op
 142 load_op(struct lower_io_state *state,
 143         nir_variable_mode mode, bool per_vertex, bool has_indirect)
 144 {
 145    nir_intrinsic_op op;
 146    switch (mode) {
 147    case nir_var_shader_in:
 148       if (per_vertex) {
 149          op = has_indirect ? nir_intrinsic_load_per_vertex_input_indirect :
 150                              nir_intrinsic_load_per_vertex_input;
 151       } else {
 152          op = has_indirect ? nir_intrinsic_load_input_indirect :
 153                              nir_intrinsic_load_input;
 154       }
 155       break;
 156    case nir_var_uniform:
 157       op = has_indirect ? nir_intrinsic_load_uniform_indirect :
 158                           nir_intrinsic_load_uniform;
 159       break;
 160    default:
 161       unreachable("Unknown variable mode");
 162    }
 163    return op;
 164 }
 165
 166 static bool
 167 nir_lower_io_block(nir_block *block, void *void_state)
 168 {
 169    struct lower_io_state *state = void_state;
 170
 171    nir_foreach_instr_safe(block, instr) {
 172       if (instr->type != nir_instr_type_intrinsic)
 173          continue;
 174
 175       nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
 176
 177       if (intrin->intrinsic != nir_intrinsic_load_var &&
 178           intrin->intrinsic != nir_intrinsic_store_var)
 179          continue;
 180
 181       nir_variable_mode mode = intrin->variables[0]->var->data.mode;
 182
 183       if (state->mode != -1 && state->mode != mode)
 184          continue;
 185
 186       switch (intrin->intrinsic) {
 187       case nir_intrinsic_load_var: {
 188          if (mode != nir_var_shader_in && mode != nir_var_uniform)
 189             continue;
 190
 191          bool per_vertex =
 192             is_per_vertex_input(state, intrin->variables[0]->var);
 193
 194          nir_ssa_def *indirect;
 195          nir_ssa_def *vertex_index;
 196
 197          unsigned offset = get_io_offset(intrin->variables[0], &intrin->instr,
 198                                          per_vertex ? &vertex_index : NULL,
 199                                          &indirect, state);
 200
 201          nir_intrinsic_instr *load =
 202             nir_intrinsic_instr_create(state->mem_ctx,
 203                                        load_op(state, mode, per_vertex,
 204                                                indirect));
 205          load->num_components = intrin->num_components;
 206
 207          unsigned location = intrin->variables[0]->var->data.driver_location;
 208          if (mode == nir_var_uniform) {
 209             load->const_index[0] = location;
 210             load->const_index[1] = offset;
 211          } else {
 212             load->const_index[0] = location + offset;
 213          }
 214
 215          if (per_vertex)
 216             load->src[0] = nir_src_for_ssa(vertex_index);
 217
 218          if (indirect)
 219             load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(indirect);
 220
 221          if (intrin->dest.is_ssa) {
 222             nir_ssa_dest_init(&load->instr, &load->dest,
 223                               intrin->num_components, NULL);
 224             nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
 225                                      nir_src_for_ssa(&load->dest.ssa));
 226          } else {
 227             nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx);
 228          }
 229
 230          nir_instr_insert_before(&intrin->instr, &load->instr);
 231          nir_instr_remove(&intrin->instr);
 232          break;
 233       }
 234
 235       case nir_intrinsic_store_var: {
 236          if (intrin->variables[0]->var->data.mode != nir_var_shader_out)
 237             continue;
 238
 239          nir_ssa_def *indirect;
 240
 241          unsigned offset = get_io_offset(intrin->variables[0], &intrin->instr,
 242                                          NULL, &indirect, state);
 243          offset += intrin->variables[0]->var->data.driver_location;
 244
 245          nir_intrinsic_op store_op;
 246          if (indirect) {
 247             store_op = nir_intrinsic_store_output_indirect;
 248          } else {
 249             store_op = nir_intrinsic_store_output;
 250          }
 251
 252          nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx,
 253                                                                  store_op);
 254          store->num_components = intrin->num_components;
 255          store->const_index[0] = offset;
 256
 257          nir_src_copy(&store->src[0], &intrin->src[0], store);
 258
 259          if (indirect)
 260             store->src[1] = nir_src_for_ssa(indirect);
 261
 262          nir_instr_insert_before(&intrin->instr, &store->instr);
 263          nir_instr_remove(&intrin->instr);
 264          break;
 265       }
 266
 267       default:
 268          break;
 269       }
 270    }
 271
 272    return true;
 273 }
 274
 275 static void
 276 nir_lower_io_impl(nir_function_impl *impl,
 277                   nir_variable_mode mode,
 278                   int (*type_size)(const struct glsl_type *))
 279 {
 280    struct lower_io_state state;
 281
 282    nir_builder_init(&state.builder, impl);
 283    state.mem_ctx = ralloc_parent(impl);
 284    state.mode = mode;
 285    state.type_size = type_size;
 286
 287    nir_foreach_block(impl, nir_lower_io_block, &state);
 288
 289    nir_metadata_preserve(impl, nir_metadata_block_index |
 290                                nir_metadata_dominance);
 291 }
 292
 293 void
 294 nir_lower_io(nir_shader *shader, nir_variable_mode mode,
 295              int (*type_size)(const struct glsl_type *))
 296 {
 297    nir_foreach_overload(shader, overload) {
 298       if (overload->impl)
 299          nir_lower_io_impl(overload->impl, mode, type_size);
 300    }
 301 }