src/glsl/nir/nir_lower_locals_to_regs.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Jason Ekstrand (jason@jlekstrand.net)
  25  *
  26  */
  27
  28 #include "nir.h"
  29
  30 struct locals_to_regs_state {
  31    void *mem_ctx;
  32    nir_function_impl *impl;
  33
  34    /* A hash table mapping derefs to registers */
  35    struct hash_table *regs_table;
  36 };
  37
  38 /* The following two functions implement a hash and equality check for
  39  * variable dreferences.  When the hash or equality function encounters an
  40  * array, it ignores the offset and whether it is direct or indirect
  41  * entirely.
  42  */
  43 static uint32_t
  44 hash_deref(const void *void_deref)
  45 {
  46    const nir_deref *deref = void_deref;
  47
  48    uint32_t hash;
  49    if (deref->child) {
  50       hash = hash_deref(deref->child);
  51    } else {
  52       hash = 2166136261ul;
  53    }
  54
  55    switch (deref->deref_type) {
  56    case nir_deref_type_var:
  57       hash ^= _mesa_hash_pointer(nir_deref_as_var(deref)->var);
  58       break;
  59    case nir_deref_type_array: {
  60       hash ^= 268435183;
  61       break;
  62    }
  63    case nir_deref_type_struct:
  64       hash ^= nir_deref_as_struct(deref)->index;
  65       break;
  66    }
  67
  68    return hash * 0x01000193;
  69 }
  70
  71 static bool
  72 derefs_equal(const void *void_a, const void *void_b)
  73 {
  74    const nir_deref *a = void_a;
  75    const nir_deref *b = void_b;
  76
  77    if (a->deref_type != b->deref_type)
  78       return false;
  79
  80    switch (a->deref_type) {
  81    case nir_deref_type_var:
  82       if (nir_deref_as_var(a)->var != nir_deref_as_var(b)->var)
  83          return false;
  84       break;
  85    case nir_deref_type_array:
  86       /* Do nothing.  All array derefs are the same */
  87       break;
  88    case nir_deref_type_struct:
  89       if (nir_deref_as_struct(a)->index != nir_deref_as_struct(b)->index)
  90          return false;
  91       break;
  92    default:
  93       unreachable("Invalid dreference type");
  94    }
  95
  96    assert((a->child == NULL) == (b->child == NULL));
  97    if (a->child)
  98       return derefs_equal(a->child, b->child);
  99    else
 100       return true;
 101 }
 102
 103 static nir_register *
 104 get_reg_for_deref(nir_deref_var *deref, struct locals_to_regs_state *state)
 105 {
 106    uint32_t hash = hash_deref(deref);
 107
 108    struct hash_entry *entry =
 109       _mesa_hash_table_search_pre_hashed(state->regs_table, hash, deref);
 110    if (entry)
 111       return entry->data;
 112
 113    unsigned array_size = 1;
 114    nir_deref *tail = &deref->deref;
 115    while (tail->child) {
 116       if (tail->child->deref_type == nir_deref_type_array) {
 117          /* Multiply by the parent's type. */
 118          if (glsl_type_is_matrix(tail->type)) {
 119             array_size *= glsl_get_matrix_columns(tail->type);
 120          } else {
 121             assert(glsl_get_length(tail->type) > 0);
 122             array_size *= glsl_get_length(tail->type);
 123          }
 124       }
 125       tail = tail->child;
 126    }
 127
 128    assert(glsl_type_is_vector(tail->type) || glsl_type_is_scalar(tail->type));
 129
 130    nir_register *reg = nir_local_reg_create(state->impl);
 131    reg->num_components = glsl_get_vector_elements(tail->type);
 132    reg->num_array_elems = array_size > 1 ? array_size : 0;
 133
 134    _mesa_hash_table_insert_with_hash(state->regs_table, hash, deref, reg);
 135
 136    return reg;
 137 }
 138
 139 static nir_src
 140 get_deref_reg_src(nir_deref_var *deref, nir_instr *instr,
 141                   struct locals_to_regs_state *state)
 142 {
 143    nir_src src;
 144
 145    src.is_ssa = false;
 146    src.reg.reg = get_reg_for_deref(deref, state);
 147    src.reg.base_offset = 0;
 148    src.reg.indirect = NULL;
 149
 150    nir_deref *tail = &deref->deref;
 151    while (tail->child != NULL) {
 152       const struct glsl_type *parent_type = tail->type;
 153       tail = tail->child;
 154
 155       if (tail->deref_type != nir_deref_type_array)
 156          continue;
 157
 158       nir_deref_array *deref_array = nir_deref_as_array(tail);
 159
 160       src.reg.base_offset *= glsl_get_length(parent_type);
 161       src.reg.base_offset += deref_array->base_offset;
 162
 163       if (src.reg.indirect) {
 164          nir_load_const_instr *load_const =
 165             nir_load_const_instr_create(state->mem_ctx);
 166          load_const->num_components = 1;
 167          load_const->value.u[0] = glsl_get_length(parent_type);
 168          load_const->dest.is_ssa = true;
 169          nir_ssa_def_init(&load_const->instr, &load_const->dest.ssa, 1, NULL);
 170          nir_instr_insert_before(instr, &load_const->instr);
 171
 172          nir_alu_instr *mul = nir_alu_instr_create(state->mem_ctx, nir_op_imul);
 173          mul->src[0].src = *src.reg.indirect;
 174          mul->src[1].src.is_ssa = true;
 175          mul->src[1].src.ssa = &load_const->dest.ssa;
 176          mul->dest.write_mask = 1;
 177          mul->dest.dest.is_ssa = true;
 178          nir_ssa_def_init(&mul->instr, &mul->dest.dest.ssa, 1, NULL);
 179          nir_instr_insert_before(instr, &mul->instr);
 180
 181          src.reg.indirect->is_ssa = true;
 182          src.reg.indirect->ssa = &mul->dest.dest.ssa;
 183       }
 184
 185       if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
 186          if (src.reg.indirect == NULL) {
 187             src.reg.indirect = ralloc(state->mem_ctx, nir_src);
 188             *src.reg.indirect = nir_src_copy(deref_array->indirect,
 189                                              state->mem_ctx);
 190          } else {
 191             nir_alu_instr *add = nir_alu_instr_create(state->mem_ctx,
 192                                                       nir_op_iadd);
 193             add->src[0].src = *src.reg.indirect;
 194             add->src[1].src = nir_src_copy(deref_array->indirect,
 195                                            state->mem_ctx);
 196             add->dest.write_mask = 1;
 197             add->dest.dest.is_ssa = true;
 198             nir_ssa_def_init(&add->instr, &add->dest.dest.ssa, 1, NULL);
 199             nir_instr_insert_before(instr, &add->instr);
 200
 201             src.reg.indirect->is_ssa = true;
 202             src.reg.indirect->ssa = &add->dest.dest.ssa;
 203          }
 204       }
 205    }
 206
 207    return src;
 208 }
 209
 210 static bool
 211 lower_locals_to_regs_block(nir_block *block, void *void_state)
 212 {
 213    struct locals_to_regs_state *state = void_state;
 214
 215    nir_foreach_instr_safe(block, instr) {
 216       if (instr->type != nir_instr_type_intrinsic)
 217          continue;
 218
 219       nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
 220
 221       switch (intrin->intrinsic) {
 222       case nir_intrinsic_load_var_vec1:
 223       case nir_intrinsic_load_var_vec2:
 224       case nir_intrinsic_load_var_vec3:
 225       case nir_intrinsic_load_var_vec4: {
 226          if (intrin->variables[0]->var->data.mode != nir_var_local)
 227             continue;
 228
 229          nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx, nir_op_imov);
 230          mov->src[0].src = get_deref_reg_src(intrin->variables[0],
 231                                              &intrin->instr, state);
 232          unsigned num_components = mov->src[0].src.reg.reg->num_components;
 233          mov->dest.write_mask = (1 << num_components) - 1;
 234          if (intrin->dest.is_ssa) {
 235             mov->dest.dest.is_ssa = true;
 236             nir_ssa_def_init(&mov->instr, &mov->dest.dest.ssa,
 237                              num_components, NULL);
 238
 239             nir_src new_src = {
 240                .is_ssa = true,
 241                .ssa = &mov->dest.dest.ssa,
 242             };
 243
 244             nir_ssa_def_rewrite_uses(&intrin->dest.ssa, new_src,
 245                                      state->mem_ctx);
 246          } else {
 247             mov->dest.dest = nir_dest_copy(intrin->dest, state->mem_ctx);
 248          }
 249          nir_instr_insert_before(&intrin->instr, &mov->instr);
 250
 251          nir_instr_remove(&intrin->instr);
 252          break;
 253       }
 254
 255       case nir_intrinsic_store_var_vec1:
 256       case nir_intrinsic_store_var_vec2:
 257       case nir_intrinsic_store_var_vec3:
 258       case nir_intrinsic_store_var_vec4: {
 259          if (intrin->variables[0]->var->data.mode != nir_var_local)
 260             continue;
 261
 262          nir_src reg_src = get_deref_reg_src(intrin->variables[0],
 263                                              &intrin->instr, state);
 264          unsigned num_components = reg_src.reg.reg->num_components;
 265
 266          nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx, nir_op_imov);
 267          mov->src[0].src = nir_src_copy(intrin->src[0], state->mem_ctx);
 268          mov->dest.write_mask = (1 << num_components) - 1;
 269          mov->dest.dest.is_ssa = false;
 270          mov->dest.dest.reg.reg = reg_src.reg.reg;
 271          mov->dest.dest.reg.base_offset = reg_src.reg.base_offset;
 272          mov->dest.dest.reg.indirect = reg_src.reg.indirect;
 273
 274          nir_instr_insert_before(&intrin->instr, &mov->instr);
 275
 276          nir_instr_remove(&intrin->instr);
 277          break;
 278       }
 279
 280       case nir_intrinsic_copy_var:
 281          unreachable("There should be no copies whatsoever at this point");
 282          break;
 283
 284       default:
 285          continue;
 286       }
 287    }
 288
 289    return true;
 290 }
 291
 292 static void
 293 nir_lower_locals_to_regs_impl(nir_function_impl *impl)
 294 {
 295    struct locals_to_regs_state state;
 296
 297    state.mem_ctx = ralloc_parent(impl);
 298    state.impl = impl;
 299    state.regs_table = _mesa_hash_table_create(NULL, hash_deref, derefs_equal);
 300
 301    nir_foreach_block(impl, lower_locals_to_regs_block, &state);
 302
 303    _mesa_hash_table_destroy(state.regs_table, NULL);
 304 }
 305
 306 void
 307 nir_lower_locals_to_regs(nir_shader *shader)
 308 {
 309    nir_foreach_overload(shader, overload) {
 310       if (overload->impl)
 311          nir_lower_locals_to_regs_impl(overload->impl);
 312    }
 313 }