src/gpu-compute/GPUStaticInstFlags.py

   1 # Copyright (c) 2016 Advanced Micro Devices, Inc.
   2 # All rights reserved.
   3 #
   4 # For use for simulation and test purposes only
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  20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  31
  32 from m5.params import *
  33
  34 class GPUStaticInstFlags(Enum):
  35     wrapper_name = 'GPUStaticInstFlags'
  36     wrapper_is_struct = True
  37     enum_name = 'Flags'
  38
  39     vals = [
  40         # Op types
  41         'ALU',               # ALU op
  42         'Branch',            # Branch instruction
  43         'CondBranch',        # Conditinal Branch instruction
  44         'Nop',               # No-op (no effect at all)
  45         'Return',            # Subroutine return instruction
  46         'EndOfKernel',       # Kernel termination instruction
  47         'KernelLaunch',      # Kernel launch inst
  48         'UnconditionalJump', #
  49         'SpecialOp',         # Special op
  50         'Waitcnt',           # Is a waitcnt instruction
  51         'Sleep',             # Is a sleep instruction
  52
  53         # Memory ops
  54         'MemBarrier',        # Barrier instruction
  55         'MemSync',           # Synchronizing instruction
  56         'MemoryRef',         # References memory (load, store, or atomic)
  57         'Flat',              # Flat memory op
  58         'Load',              # Reads from memory
  59         'Store',             # Writes to memory
  60
  61         # Atomic ops
  62         'AtomicReturn',      # Atomic instruction that returns data
  63         'AtomicNoReturn',    # Atomic instruction that doesn't return data
  64
  65         # Instruction attributes
  66         'Scalar',            # A scalar (not vector) operation
  67         'ReadsSCC',          # The instruction reads SCC
  68         'WritesSCC',         # The instruction writes SCC
  69         'ReadsVCC',          # The instruction reads VCC
  70         'WritesVCC',         # The instruction writes VCC
  71         'ReadsEXEC',         # The instruction reads Exec Mask
  72         'WritesEXEC',        # The instruction writes Exec Mask
  73         'ReadsMode',         # The instruction reads Mode register
  74         'WritesMode',        # The instruction writes Mode register
  75         'IgnoreExec',        # The instruction ignores the Exec Mask
  76         'IsSDWA',            # The instruction is a SDWA instruction
  77         'IsDPP',             # The instruction is a DPP instruction
  78
  79         # Atomic OP types
  80         'AtomicAnd',
  81         'AtomicOr',
  82         'AtomicXor',
  83         'AtomicCAS',
  84         'AtomicExch',
  85         'AtomicAdd',
  86         'AtomicSub',
  87         'AtomicInc',
  88         'AtomicDec',
  89         'AtomicMax',
  90         'AtomicMin',
  91
  92         # Segment access flags
  93         'ArgSegment',        # Accesses the arg segment
  94         'GlobalSegment',     # Accesses global memory
  95         'GroupSegment',      # Accesses local memory (LDS), aka shared memory
  96         'KernArgSegment',    # Accesses the kernel argument segment
  97         'PrivateSegment',    # Accesses the private segment
  98         'ReadOnlySegment',   # Accesses read only memory
  99         'SpillSegment',      # Accesses the spill segment
 100         'NoSegment',         # Does not have an associated segment
 101
 102         # Coherence flags
 103         'GloballyCoherent',  # Coherent with other work-items on same device
 104         'SystemCoherent',    # Coherent with a different device, or the host
 105
 106         # Floating-point flags
 107         'F16',               # F16 operation
 108         'F32',               # F32 operation
 109         'F64',               # F64 operation
 110
 111         # MAC, MAD, FMA
 112         'FMA',               # FMA
 113         'MAC',               # MAC
 114         'MAD'                # MAD
 115         ]