riscv: Fix bugs with RISC-V decoder and detailed CPUs
[gem5.git] / src / gpu-compute / hsa_code.hh
1 /*
2 * Copyright (c) 2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Author: Anthony Gutierrez
34 */
35
36 #ifndef __HSA_CODE_HH__
37 #define __HSA_CODE_HH__
38
39 #include <string>
40 #include <vector>
41
42 #include "arch/gpu_types.hh"
43 #include "config/the_gpu_isa.hh"
44
45 class HsaKernelInfo;
46
47 /* @class HsaCode
48 * base code object for the set of HSA kernels associated
49 * with a single application. this class provides the common
50 * methods for creating, accessing, and storing information
51 * about kernel and variable symbols, symbol name, memory
52 * segment sizes, and instruction count, etc.
53 */
54
55 class HsaCode
56 {
57 public:
58 HsaCode(const std::string &name) : readonly_data(nullptr), funcarg_size(0),
59 _name(name)
60 {
61 }
62
63 enum class MemorySegment {
64 NONE,
65 FLAT,
66 GLOBAL,
67 READONLY,
68 KERNARG,
69 GROUP,
70 PRIVATE,
71 SPILL,
72 ARG,
73 EXTSPACE0
74 };
75
76 const std::string& name() const { return _name; }
77 int numInsts() const { return _insts.size(); }
78 std::vector<TheGpuISA::RawMachInst>* insts() { return &_insts; }
79
80 void
81 setReadonlyData(uint8_t *_readonly_data)
82 {
83 readonly_data = _readonly_data;
84 }
85
86 virtual int getSize(MemorySegment segment) const = 0;
87 virtual void generateHsaKernelInfo(HsaKernelInfo *hsaKernelInfo) const = 0;
88
89 uint8_t *readonly_data;
90 int funcarg_size;
91
92 protected:
93 // An array that stores instruction indices (0 through kernel size)
94 // for a kernel passed to code object constructor as an argument.
95 std::vector<TheGpuISA::RawMachInst> _insts;
96
97 private:
98 const std::string _name;
99 };
100
101 #endif // __HSA_CODE_HH__