src/gpu-compute/vector_register_state.hh

   1 /*
   2  * Copyright (c) 2015 Advanced Micro Devices, Inc.
   3  * All rights reserved.
   4  *
   5  * For use for simulation and test purposes only
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright notice,
  11  * this list of conditions and the following disclaimer.
  12  *
  13  * 2. Redistributions in binary form must reproduce the above copyright notice,
  14  * this list of conditions and the following disclaimer in the documentation
  15  * and/or other materials provided with the distribution.
  16  *
  17  * 3. Neither the name of the copyright holder nor the names of its contributors
  18  * may be used to endorse or promote products derived from this software
  19  * without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * Author: John Kalamatianos
  34  */
  35
  36 #ifndef __VECTOR_REGISTER_STATE_HH__
  37 #define __VECTOR_REGISTER_STATE_HH__
  38
  39 #include <array>
  40 #include <cassert>
  41 #include <string>
  42 #include <vector>
  43
  44 #include "gpu-compute/misc.hh"
  45
  46 class ComputeUnit;
  47
  48 // Vector Register State per SIMD unit (contents of the vector
  49 // registers in the VRF of the SIMD)
  50 class VecRegisterState
  51 {
  52   public:
  53     VecRegisterState();
  54     void init(uint32_t _size, uint32_t wf_size);
  55
  56     const std::string& name() const { return _name; }
  57     void setParent(ComputeUnit *_computeUnit);
  58     void regStats() { }
  59
  60     // Access methods
  61     template<typename T>
  62     T
  63     read(int regIdx, int threadId=0) {
  64         T *p0;
  65         assert(sizeof(T) == 4 || sizeof(T) == 8);
  66         if (sizeof(T) == 4) {
  67             p0 = (T*)(&s_reg[regIdx][threadId]);
  68         } else {
  69             p0 = (T*)(&d_reg[regIdx][threadId]);
  70         }
  71
  72         return *p0;
  73     }
  74
  75     template<typename T>
  76     void
  77     write(unsigned int regIdx, T value, int threadId=0) {
  78         T *p0;
  79         assert(sizeof(T) == 4 || sizeof(T) == 8);
  80         if (sizeof(T) == 4) {
  81             p0 = (T*)(&s_reg[regIdx][threadId]);
  82         } else {
  83             p0 = (T*)(&d_reg[regIdx][threadId]);
  84         }
  85
  86         *p0 = value;
  87     }
  88
  89     // (Single Precision) Vector Register File size.
  90     int regSize() { return s_reg.size(); }
  91
  92   private:
  93     ComputeUnit *computeUnit;
  94     std::string _name;
  95     // 32-bit Single Precision Vector Register State
  96     std::vector<std::vector<uint32_t>> s_reg;
  97     // 64-bit Double Precision Vector Register State
  98     std::vector<std::vector<uint64_t>> d_reg;
  99 };
 100
 101 #endif // __VECTOR_REGISTER_STATE_HH__