1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
6 from nmigen
.cli
import main
, verilog
8 from nmutil
.singlepipe
import (ControlBase
, SimpleHandshake
, PassThroughStage
)
9 from nmutil
.multipipe
import CombMuxOutPipe
10 from nmutil
.multipipe
import PriorityCombMuxInPipe
11 from nmutil
.concurrentunit
import ReservationStations
, num_bits
13 from ieee754
.fpcommon
.getop
import FPADDBaseData
14 from ieee754
.fpcommon
.denorm
import FPSCData
15 from ieee754
.fpcommon
.pack
import FPPackData
16 from ieee754
.fpcommon
.normtopack
import FPNormToPack
17 from .specialcases
import FPAddSpecialCasesDeNorm
18 from .addstages
import FPAddAlignSingleAdd
22 class FPADDBasePipe(ControlBase
):
23 def __init__(self
, pspec
):
24 ControlBase
.__init
__(self
)
25 self
.pipe1
= FPAddSpecialCasesDeNorm(pspec
)
26 self
.pipe2
= FPAddAlignSingleAdd(pspec
)
27 self
.pipe3
= FPNormToPack(pspec
)
29 self
._eqs
= self
.connect([self
.pipe1
, self
.pipe2
, self
.pipe3
])
31 def elaborate(self
, platform
):
32 m
= ControlBase
.elaborate(self
, platform
)
33 m
.submodules
.scnorm
= self
.pipe1
34 m
.submodules
.addalign
= self
.pipe2
35 m
.submodules
.normpack
= self
.pipe3
40 class FPADDMuxInOut(ReservationStations
):
41 """ Reservation-Station version of FPADD pipeline.
43 * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
44 * 3-stage adder pipeline
45 * fan-out on outputs (an array of FPPackData: z,mid)
47 Fan-in and Fan-out are combinatorial.
49 def __init__(self
, width
, num_rows
, op_wid
=None):
50 self
.id_wid
= num_bits(width
)
52 self
.pspec
= {'width': width
, 'id_wid': self
.id_wid
, 'op_wid': op_wid
}
53 self
.alu
= FPADDBasePipe(self
.pspec
)
54 ReservationStations
.__init
__(self
, num_rows
)
57 return FPADDBaseData(self
.pspec
)
60 return FPPackData(self
.pspec
)