1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
6 from nmigen
.cli
import main
, verilog
8 from nmutil
.singlepipe
import ControlBase
9 from nmutil
.concurrentunit
import ReservationStations
, num_bits
11 from ieee754
.fpcommon
.getop
import FPADDBaseData
12 from ieee754
.fpcommon
.denorm
import FPSCData
13 from ieee754
.fpcommon
.pack
import FPPackData
14 from ieee754
.fpcommon
.normtopack
import FPNormToPack
15 from .specialcases
import FPMulSpecialCasesDeNorm
16 from .mulstages
import FPMulStages
20 class FPMULBasePipe(ControlBase
):
21 def __init__(self
, width
, pspec
):
22 ControlBase
.__init
__(self
)
23 self
.pipe1
= FPMulSpecialCasesDeNorm(width
, pspec
)
24 self
.pipe2
= FPMulStages(width
, pspec
)
25 self
.pipe3
= FPNormToPack(width
, pspec
)
27 self
._eqs
= self
.connect([self
.pipe1
, self
.pipe2
, self
.pipe3
])
29 def elaborate(self
, platform
):
30 m
= ControlBase
.elaborate(self
, platform
)
31 m
.submodules
.scnorm
= self
.pipe1
32 m
.submodules
.mulstages
= self
.pipe2
33 m
.submodules
.normpack
= self
.pipe3
38 class FPMULMuxInOut(ReservationStations
):
39 """ Reservation-Station version of FPMUL pipeline.
41 * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
42 * 2-stage multiplier pipeline
43 * fan-out on outputs (an array of FPPackData: z,mid)
45 Fan-in and Fan-out are combinatorial.
47 def __init__(self
, width
, num_rows
, op_wid
=0):
50 self
.id_wid
= num_bits(width
)
52 self
.pspec
['id_wid'] = self
.id_wid
53 self
.pspec
['op_wid'] = self
.op_wid
54 self
.alu
= FPMULBasePipe(width
, self
.pspec
)
55 ReservationStations
.__init
__(self
, num_rows
)
58 return FPADDBaseData(self
.width
, self
.pspec
)
61 return FPPackData(self
.width
, self
.pspec
)