2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
32 struct brw_stage_prog_data
;
41 struct blorp_context
{
44 const struct isl_device
*isl_dev
;
46 const struct brw_compiler
*compiler
;
48 bool (*lookup_shader
)(struct blorp_batch
*batch
,
49 const void *key
, uint32_t key_size
,
50 uint32_t *kernel_out
, void *prog_data_out
);
51 bool (*upload_shader
)(struct blorp_batch
*batch
,
53 const void *key
, uint32_t key_size
,
54 const void *kernel
, uint32_t kernel_size
,
55 const struct brw_stage_prog_data
*prog_data
,
56 uint32_t prog_data_size
,
57 uint32_t *kernel_out
, void *prog_data_out
);
58 void (*exec
)(struct blorp_batch
*batch
, const struct blorp_params
*params
);
61 void blorp_init(struct blorp_context
*blorp
, void *driver_ctx
,
62 struct isl_device
*isl_dev
);
63 void blorp_finish(struct blorp_context
*blorp
);
65 enum blorp_batch_flags
{
67 * This flag indicates that blorp should *not* re-emit the depth and
68 * stencil buffer packets. Instead, the driver guarantees that all depth
69 * and stencil images passed in will match what is currently set in the
72 BLORP_BATCH_NO_EMIT_DEPTH_STENCIL
= (1 << 0),
74 /* This flag indicates that the blorp call should be predicated. */
75 BLORP_BATCH_PREDICATE_ENABLE
= (1 << 1),
77 /* This flag indicates that blorp should *not* update the indirect clear
80 BLORP_BATCH_NO_UPDATE_CLEAR_COLOR
= (1 << 2),
84 struct blorp_context
*blorp
;
86 enum blorp_batch_flags flags
;
89 void blorp_batch_init(struct blorp_context
*blorp
, struct blorp_batch
*batch
,
90 void *driver_batch
, enum blorp_batch_flags flags
);
91 void blorp_batch_finish(struct blorp_batch
*batch
);
93 struct blorp_address
{
102 const struct isl_surf
*surf
;
103 struct blorp_address addr
;
105 const struct isl_surf
*aux_surf
;
106 struct blorp_address aux_addr
;
107 enum isl_aux_usage aux_usage
;
109 union isl_color_value clear_color
;
112 * If set (bo != NULL), clear_color is ignored and the actual clear color
113 * is fetched from this address. On gen7-8, this is all of dword 7 of
114 * RENDER_SURFACE_STATE and is the responsibility of the caller to ensure
115 * that it contains a swizzle of RGBA and resource min LOD of 0.
117 struct blorp_address clear_color_addr
;
119 /* Only allowed for simple 2D non-MSAA surfaces */
120 uint32_t tile_x_sa
, tile_y_sa
;
125 BLORP_FILTER_NEAREST
,
126 BLORP_FILTER_BILINEAR
,
127 BLORP_FILTER_SAMPLE_0
,
128 BLORP_FILTER_AVERAGE
,
129 BLORP_FILTER_MIN_SAMPLE
,
130 BLORP_FILTER_MAX_SAMPLE
,
134 blorp_blit(struct blorp_batch
*batch
,
135 const struct blorp_surf
*src_surf
,
136 unsigned src_level
, unsigned src_layer
,
137 enum isl_format src_format
, struct isl_swizzle src_swizzle
,
138 const struct blorp_surf
*dst_surf
,
139 unsigned dst_level
, unsigned dst_layer
,
140 enum isl_format dst_format
, struct isl_swizzle dst_swizzle
,
141 float src_x0
, float src_y0
,
142 float src_x1
, float src_y1
,
143 float dst_x0
, float dst_y0
,
144 float dst_x1
, float dst_y1
,
145 enum blorp_filter filter
,
146 bool mirror_x
, bool mirror_y
);
149 blorp_copy(struct blorp_batch
*batch
,
150 const struct blorp_surf
*src_surf
,
151 unsigned src_level
, unsigned src_layer
,
152 const struct blorp_surf
*dst_surf
,
153 unsigned dst_level
, unsigned dst_layer
,
154 uint32_t src_x
, uint32_t src_y
,
155 uint32_t dst_x
, uint32_t dst_y
,
156 uint32_t src_width
, uint32_t src_height
);
159 blorp_buffer_copy(struct blorp_batch
*batch
,
160 struct blorp_address src
,
161 struct blorp_address dst
,
164 union isl_color_value
165 swizzle_color_value(union isl_color_value src
, struct isl_swizzle swizzle
);
168 blorp_fast_clear(struct blorp_batch
*batch
,
169 const struct blorp_surf
*surf
,
170 enum isl_format format
, struct isl_swizzle swizzle
,
171 uint32_t level
, uint32_t start_layer
, uint32_t num_layers
,
172 uint32_t x0
, uint32_t y0
, uint32_t x1
, uint32_t y1
);
175 blorp_clear(struct blorp_batch
*batch
,
176 const struct blorp_surf
*surf
,
177 enum isl_format format
, struct isl_swizzle swizzle
,
178 uint32_t level
, uint32_t start_layer
, uint32_t num_layers
,
179 uint32_t x0
, uint32_t y0
, uint32_t x1
, uint32_t y1
,
180 union isl_color_value clear_color
,
181 const bool color_write_disable
[4]);
184 blorp_clear_depth_stencil(struct blorp_batch
*batch
,
185 const struct blorp_surf
*depth
,
186 const struct blorp_surf
*stencil
,
187 uint32_t level
, uint32_t start_layer
,
189 uint32_t x0
, uint32_t y0
, uint32_t x1
, uint32_t y1
,
190 bool clear_depth
, float depth_value
,
191 uint8_t stencil_mask
, uint8_t stencil_value
);
193 blorp_can_hiz_clear_depth(const struct gen_device_info
*devinfo
,
194 const struct isl_surf
*surf
,
195 enum isl_aux_usage aux_usage
,
196 uint32_t level
, uint32_t layer
,
197 uint32_t x0
, uint32_t y0
, uint32_t x1
, uint32_t y1
);
199 blorp_hiz_clear_depth_stencil(struct blorp_batch
*batch
,
200 const struct blorp_surf
*depth
,
201 const struct blorp_surf
*stencil
,
203 uint32_t start_layer
, uint32_t num_layers
,
204 uint32_t x0
, uint32_t y0
,
205 uint32_t x1
, uint32_t y1
,
206 bool clear_depth
, float depth_value
,
207 bool clear_stencil
, uint8_t stencil_value
);
211 blorp_gen8_hiz_clear_attachments(struct blorp_batch
*batch
,
212 uint32_t num_samples
,
213 uint32_t x0
, uint32_t y0
,
214 uint32_t x1
, uint32_t y1
,
215 bool clear_depth
, bool clear_stencil
,
216 uint8_t stencil_value
);
218 blorp_clear_attachments(struct blorp_batch
*batch
,
219 uint32_t binding_table_offset
,
220 enum isl_format depth_format
,
221 uint32_t num_samples
,
222 uint32_t start_layer
, uint32_t num_layers
,
223 uint32_t x0
, uint32_t y0
, uint32_t x1
, uint32_t y1
,
224 bool clear_color
, union isl_color_value color_value
,
225 bool clear_depth
, float depth_value
,
226 uint8_t stencil_mask
, uint8_t stencil_value
);
229 blorp_ccs_resolve(struct blorp_batch
*batch
,
230 struct blorp_surf
*surf
, uint32_t level
,
231 uint32_t start_layer
, uint32_t num_layers
,
232 enum isl_format format
,
233 enum isl_aux_op resolve_op
);
236 blorp_ccs_ambiguate(struct blorp_batch
*batch
,
237 struct blorp_surf
*surf
,
238 uint32_t level
, uint32_t layer
);
241 blorp_mcs_partial_resolve(struct blorp_batch
*batch
,
242 struct blorp_surf
*surf
,
243 enum isl_format format
,
244 uint32_t start_layer
, uint32_t num_layers
);
247 blorp_hiz_op(struct blorp_batch
*batch
, struct blorp_surf
*surf
,
248 uint32_t level
, uint32_t start_layer
, uint32_t num_layers
,
252 blorp_hiz_stencil_op(struct blorp_batch
*batch
, struct blorp_surf
*stencil
,
253 uint32_t level
, uint32_t start_layer
,
254 uint32_t num_layers
, enum isl_aux_op op
);
256 } /* end extern "C" */
257 #endif /* __cplusplus */