src/intel/blorp/blorp_clear.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/ralloc.h"
  25
  26 #include "main/macros.h" /* Needed for MAX3 and MAX2 for format_rgb9e5 */
  27 #include "util/format_rgb9e5.h"
  28
  29 #include "blorp_priv.h"
  30 #include "brw_defines.h"
  31
  32 #include "compiler/nir/nir_builder.h"
  33
  34 #define FILE_DEBUG_FLAG DEBUG_BLORP
  35
  36 struct brw_blorp_const_color_prog_key
  37 {
  38    bool use_simd16_replicated_data;
  39    bool pad[3];
  40 };
  41
  42 static void
  43 blorp_params_get_clear_kernel(struct blorp_context *blorp,
  44                               struct blorp_params *params,
  45                               bool use_replicated_data)
  46 {
  47    struct brw_blorp_const_color_prog_key blorp_key;
  48    memset(&blorp_key, 0, sizeof(blorp_key));
  49    blorp_key.use_simd16_replicated_data = use_replicated_data;
  50
  51    if (blorp->lookup_shader(blorp, &blorp_key, sizeof(blorp_key),
  52                             &params->wm_prog_kernel, &params->wm_prog_data))
  53       return;
  54
  55    void *mem_ctx = ralloc_context(NULL);
  56
  57    nir_builder b;
  58    nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
  59    b.shader->info.name = ralloc_strdup(b.shader, "BLORP-clear");
  60
  61    nir_variable *v_color = nir_variable_create(b.shader, nir_var_shader_in,
  62                                                glsl_vec4_type(), "v_color");
  63    v_color->data.location = VARYING_SLOT_VAR0;
  64    v_color->data.interpolation = INTERP_MODE_FLAT;
  65
  66    nir_variable *frag_color = nir_variable_create(b.shader, nir_var_shader_out,
  67                                                   glsl_vec4_type(),
  68                                                   "gl_FragColor");
  69    frag_color->data.location = FRAG_RESULT_COLOR;
  70
  71    nir_copy_var(&b, frag_color, v_color);
  72
  73    struct brw_wm_prog_key wm_key;
  74    brw_blorp_init_wm_prog_key(&wm_key);
  75
  76    struct brw_blorp_prog_data prog_data;
  77    unsigned program_size;
  78    const unsigned *program =
  79       brw_blorp_compile_nir_shader(blorp, b.shader, &wm_key, use_replicated_data,
  80                                    &prog_data, &program_size);
  81
  82    blorp->upload_shader(blorp, &blorp_key, sizeof(blorp_key),
  83                         program, program_size,
  84                         &prog_data, sizeof(prog_data),
  85                         &params->wm_prog_kernel, &params->wm_prog_data);
  86
  87    ralloc_free(mem_ctx);
  88 }
  89
  90 /* The x0, y0, x1, and y1 parameters must already be populated with the render
  91  * area of the framebuffer to be cleared.
  92  */
  93 static void
  94 get_fast_clear_rect(const struct isl_device *dev,
  95                     const struct isl_surf *aux_surf,
  96                     unsigned *x0, unsigned *y0,
  97                     unsigned *x1, unsigned *y1)
  98 {
  99    unsigned int x_align, y_align;
 100    unsigned int x_scaledown, y_scaledown;
 101
 102    /* Only single sampled surfaces need to (and actually can) be resolved. */
 103    if (aux_surf->usage == ISL_SURF_USAGE_CCS_BIT) {
 104       /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
 105        * Target(s)", beneath the "Fast Color Clear" bullet (p327):
 106        *
 107        *     Clear pass must have a clear rectangle that must follow
 108        *     alignment rules in terms of pixels and lines as shown in the
 109        *     table below. Further, the clear-rectangle height and width
 110        *     must be multiple of the following dimensions. If the height
 111        *     and width of the render target being cleared do not meet these
 112        *     requirements, an MCS buffer can be created such that it
 113        *     follows the requirement and covers the RT.
 114        *
 115        * The alignment size in the table that follows is related to the
 116        * alignment size that is baked into the CCS surface format but with X
 117        * alignment multiplied by 16 and Y alignment multiplied by 32.
 118        */
 119       x_align = isl_format_get_layout(aux_surf->format)->bw;
 120       y_align = isl_format_get_layout(aux_surf->format)->bh;
 121
 122       x_align *= 16;
 123
 124       /* SKL+ line alignment requirement for Y-tiled are half those of the prior
 125        * generations.
 126        */
 127       if (dev->info->gen >= 9)
 128          y_align *= 16;
 129       else
 130          y_align *= 32;
 131
 132       /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
 133        * Target(s)", beneath the "Fast Color Clear" bullet (p327):
 134        *
 135        *     In order to optimize the performance MCS buffer (when bound to
 136        *     1X RT) clear similarly to MCS buffer clear for MSRT case,
 137        *     clear rect is required to be scaled by the following factors
 138        *     in the horizontal and vertical directions:
 139        *
 140        * The X and Y scale down factors in the table that follows are each
 141        * equal to half the alignment value computed above.
 142        */
 143       x_scaledown = x_align / 2;
 144       y_scaledown = y_align / 2;
 145
 146       /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
 147        * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
 148        * Clear of Non-MultiSampled Render Target Restrictions":
 149        *
 150        *   Clear rectangle must be aligned to two times the number of
 151        *   pixels in the table shown below due to 16x16 hashing across the
 152        *   slice.
 153        */
 154       x_align *= 2;
 155       y_align *= 2;
 156    } else {
 157       assert(aux_surf->usage == ISL_SURF_USAGE_MCS_BIT);
 158
 159       /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
 160        * Target(s)", beneath the "MSAA Compression" bullet (p326):
 161        *
 162        *     Clear pass for this case requires that scaled down primitive
 163        *     is sent down with upper left co-ordinate to coincide with
 164        *     actual rectangle being cleared. For MSAA, clear rectangle’s
 165        *     height and width need to as show in the following table in
 166        *     terms of (width,height) of the RT.
 167        *
 168        *     MSAA  Width of Clear Rect  Height of Clear Rect
 169        *      2X     Ceil(1/8*width)      Ceil(1/2*height)
 170        *      4X     Ceil(1/8*width)      Ceil(1/2*height)
 171        *      8X     Ceil(1/2*width)      Ceil(1/2*height)
 172        *     16X         width            Ceil(1/2*height)
 173        *
 174        * The text "with upper left co-ordinate to coincide with actual
 175        * rectangle being cleared" is a little confusing--it seems to imply
 176        * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
 177        * feed the pipeline using the rectangle (x,y) to
 178        * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
 179        * the number of samples.  Experiments indicate that this is not
 180        * quite correct; actually, what the hardware appears to do is to
 181        * align whatever rectangle is sent down the pipeline to the nearest
 182        * multiple of 2x2 blocks, and then scale it up by a factor of N
 183        * horizontally and 2 vertically.  So the resulting alignment is 4
 184        * vertically and either 4 or 16 horizontally, and the scaledown
 185        * factor is 2 vertically and either 2 or 8 horizontally.
 186        */
 187       switch (aux_surf->format) {
 188       case ISL_FORMAT_MCS_2X:
 189       case ISL_FORMAT_MCS_4X:
 190          x_scaledown = 8;
 191          break;
 192       case ISL_FORMAT_MCS_8X:
 193          x_scaledown = 2;
 194          break;
 195       case ISL_FORMAT_MCS_16X:
 196          x_scaledown = 1;
 197          break;
 198       default:
 199          unreachable("Unexpected MCS format for fast clear");
 200       }
 201       y_scaledown = 2;
 202       x_align = x_scaledown * 2;
 203       y_align = y_scaledown * 2;
 204    }
 205
 206    *x0 = ROUND_DOWN_TO(*x0,  x_align) / x_scaledown;
 207    *y0 = ROUND_DOWN_TO(*y0, y_align) / y_scaledown;
 208    *x1 = ALIGN(*x1, x_align) / x_scaledown;
 209    *y1 = ALIGN(*y1, y_align) / y_scaledown;
 210 }
 211
 212 void
 213 blorp_fast_clear(struct blorp_batch *batch,
 214                  const struct blorp_surf *surf, enum isl_format format,
 215                  uint32_t level, uint32_t start_layer, uint32_t num_layers,
 216                  uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1)
 217 {
 218    struct blorp_params params;
 219    blorp_params_init(&params);
 220    params.num_layers = num_layers;
 221
 222    params.x0 = x0;
 223    params.y0 = y0;
 224    params.x1 = x1;
 225    params.y1 = y1;
 226
 227    memset(&params.wm_inputs, 0xff, 4*sizeof(float));
 228    params.fast_clear_op = BLORP_FAST_CLEAR_OP_CLEAR;
 229
 230    get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf,
 231                        &params.x0, &params.y0, &params.x1, &params.y1);
 232
 233    blorp_params_get_clear_kernel(batch->blorp, &params, true);
 234
 235    brw_blorp_surface_info_init(batch->blorp, &params.dst, surf, level,
 236                                start_layer, format, true);
 237
 238    batch->blorp->exec(batch, &params);
 239 }
 240
 241
 242 void
 243 blorp_clear(struct blorp_batch *batch,
 244             const struct blorp_surf *surf,
 245             enum isl_format format, struct isl_swizzle swizzle,
 246             uint32_t level, uint32_t start_layer, uint32_t num_layers,
 247             uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
 248             union isl_color_value clear_color,
 249             const bool color_write_disable[4])
 250 {
 251    struct blorp_params params;
 252    blorp_params_init(&params);
 253
 254    params.x0 = x0;
 255    params.y0 = y0;
 256    params.x1 = x1;
 257    params.y1 = y1;
 258
 259    if (format == ISL_FORMAT_R9G9B9E5_SHAREDEXP) {
 260       clear_color.u32[0] = float3_to_rgb9e5(clear_color.f32);
 261       format = ISL_FORMAT_R32_UINT;
 262    }
 263
 264    memcpy(&params.wm_inputs, clear_color.f32, sizeof(float) * 4);
 265
 266    bool use_simd16_replicated_data = true;
 267
 268    /* From the SNB PRM (Vol4_Part1):
 269     *
 270     *     "Replicated data (Message Type = 111) is only supported when
 271     *      accessing tiled memory.  Using this Message Type to access linear
 272     *      (untiled) memory is UNDEFINED."
 273     */
 274    if (surf->surf->tiling == ISL_TILING_LINEAR)
 275       use_simd16_replicated_data = false;
 276
 277    /* Constant color writes ignore everyting in blend and color calculator
 278     * state.  This is not documented.
 279     */
 280    if (color_write_disable) {
 281       for (unsigned i = 0; i < 4; i++) {
 282          params.color_write_disable[i] = color_write_disable[i];
 283          if (color_write_disable[i])
 284             use_simd16_replicated_data = false;
 285       }
 286    }
 287
 288    blorp_params_get_clear_kernel(batch->blorp, &params,
 289                                  use_simd16_replicated_data);
 290
 291    while (num_layers > 0) {
 292       brw_blorp_surface_info_init(batch->blorp, &params.dst, surf, level,
 293                                   start_layer, format, true);
 294       params.dst.view.swizzle = swizzle;
 295
 296       /* We may be restricted on the number of layers we can bind at any one
 297        * time.  In particular, Sandy Bridge has a maximum number of layers of
 298        * 512 but a maximum 3D texture size is much larger.
 299        */
 300       params.num_layers = MIN2(params.dst.view.array_len, num_layers);
 301       batch->blorp->exec(batch, &params);
 302
 303       start_layer += params.num_layers;
 304       num_layers -= params.num_layers;
 305    }
 306 }
 307
 308 void
 309 blorp_clear_depth_stencil(struct blorp_batch *batch,
 310                           const struct blorp_surf *depth,
 311                           const struct blorp_surf *stencil,
 312                           uint32_t level, uint32_t start_layer,
 313                           uint32_t num_layers,
 314                           uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
 315                           bool clear_depth, float depth_value,
 316                           uint8_t stencil_mask, uint8_t stencil_value)
 317 {
 318    struct blorp_params params;
 319    blorp_params_init(&params);
 320
 321    params.x0 = x0;
 322    params.y0 = y0;
 323    params.x1 = x1;
 324    params.y1 = y1;
 325
 326    while (num_layers > 0) {
 327       params.num_layers = num_layers;
 328
 329       if (stencil_mask) {
 330          brw_blorp_surface_info_init(batch->blorp, &params.stencil, stencil,
 331                                      level, start_layer,
 332                                      ISL_FORMAT_UNSUPPORTED, true);
 333          params.stencil_mask = stencil_mask;
 334          params.stencil_ref = stencil_value;
 335
 336          params.dst.surf.samples = params.stencil.surf.samples;
 337          params.dst.surf.logical_level0_px =
 338             params.stencil.surf.logical_level0_px;
 339          params.dst.view = params.depth.view;
 340
 341          /* We may be restricted on the number of layers we can bind at any
 342           * one time.  In particular, Sandy Bridge has a maximum number of
 343           * layers of 512 but a maximum 3D texture size is much larger.
 344           */
 345          if (params.stencil.view.array_len < params.num_layers)
 346             params.num_layers = params.stencil.view.array_len;
 347       }
 348
 349       if (clear_depth) {
 350          brw_blorp_surface_info_init(batch->blorp, &params.depth, depth,
 351                                      level, start_layer,
 352                                      ISL_FORMAT_UNSUPPORTED, true);
 353          params.z = depth_value;
 354          params.depth_format =
 355             isl_format_get_depth_format(depth->surf->format, false);
 356
 357          params.dst.surf.samples = params.depth.surf.samples;
 358          params.dst.surf.logical_level0_px =
 359             params.depth.surf.logical_level0_px;
 360          params.dst.view = params.depth.view;
 361
 362          /* We may be restricted on the number of layers we can bind at any
 363           * one time.  In particular, Sandy Bridge has a maximum number of
 364           * layers of 512 but a maximum 3D texture size is much larger.
 365           */
 366          if (params.depth.view.array_len < params.num_layers)
 367             params.num_layers = params.depth.view.array_len;
 368       }
 369
 370       batch->blorp->exec(batch, &params);
 371
 372       start_layer += params.num_layers;
 373       num_layers -= params.num_layers;
 374    }
 375 }
 376
 377 void
 378 blorp_ccs_resolve(struct blorp_batch *batch,
 379                   struct blorp_surf *surf, enum isl_format format)
 380 {
 381    struct blorp_params params;
 382    blorp_params_init(&params);
 383
 384    brw_blorp_surface_info_init(batch->blorp, &params.dst, surf,
 385                                0 /* level */, 0 /* layer */, format, true);
 386
 387    /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
 388     *
 389     *     A rectangle primitive must be scaled down by the following factors
 390     *     with respect to render target being resolved.
 391     *
 392     * The scaledown factors in the table that follows are related to the block
 393     * size of the CCS format.  For IVB and HSW, we divide by two, for BDW we
 394     * multiply by 8 and 16. On Sky Lake, we multiply by 8.
 395     */
 396    const struct isl_format_layout *aux_fmtl =
 397       isl_format_get_layout(params.dst.aux_surf.format);
 398    assert(aux_fmtl->txc == ISL_TXC_CCS);
 399
 400    unsigned x_scaledown, y_scaledown;
 401    if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 9) {
 402       x_scaledown = aux_fmtl->bw * 8;
 403       y_scaledown = aux_fmtl->bh * 8;
 404    } else if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 8) {
 405       x_scaledown = aux_fmtl->bw * 8;
 406       y_scaledown = aux_fmtl->bh * 16;
 407    } else {
 408       x_scaledown = aux_fmtl->bw / 2;
 409       y_scaledown = aux_fmtl->bh / 2;
 410    }
 411    params.x0 = params.y0 = 0;
 412    params.x1 = params.dst.aux_surf.logical_level0_px.width;
 413    params.y1 = params.dst.aux_surf.logical_level0_px.height;
 414    params.x1 = ALIGN(params.x1, x_scaledown) / x_scaledown;
 415    params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown;
 416
 417    if (batch->blorp->isl_dev->info->gen >= 9) {
 418       if (params.dst.aux_usage == ISL_AUX_USAGE_CCS_E)
 419          params.fast_clear_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
 420       else
 421          params.fast_clear_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
 422    } else {
 423       /* Broadwell and earlier do not have a partial resolve */
 424       params.fast_clear_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
 425    }
 426
 427    /* Note: there is no need to initialize push constants because it doesn't
 428     * matter what data gets dispatched to the render target.  However, we must
 429     * ensure that the fragment shader delivers the data using the "replicated
 430     * color" message.
 431     */
 432
 433    blorp_params_get_clear_kernel(batch->blorp, &params, true);
 434
 435    batch->blorp->exec(batch, &params);
 436 }