2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 #include "compiler/nir/nir.h"
30 #include "compiler/brw_compiler.h"
39 * Binding table indices used by BLORP.
42 BLORP_RENDERBUFFER_BT_INDEX
,
43 BLORP_TEXTURE_BT_INDEX
,
47 struct brw_blorp_surface_info
52 struct blorp_address addr
;
54 struct isl_surf aux_surf
;
55 struct blorp_address aux_addr
;
56 enum isl_aux_usage aux_usage
;
58 union isl_color_value clear_color
;
59 struct blorp_address clear_color_addr
;
63 /* Z offset into a 3-D texture or slice of a 2-D array texture. */
66 uint32_t tile_x_sa
, tile_y_sa
;
70 brw_blorp_surface_info_init(struct blorp_context
*blorp
,
71 struct brw_blorp_surface_info
*info
,
72 const struct blorp_surf
*surf
,
73 unsigned int level
, unsigned int layer
,
74 enum isl_format format
, bool is_render_target
);
76 blorp_surf_convert_to_single_slice(const struct isl_device
*isl_dev
,
77 struct brw_blorp_surface_info
*info
);
79 surf_fake_rgb_with_red(const struct isl_device
*isl_dev
,
80 struct brw_blorp_surface_info
*info
);
82 blorp_surf_convert_to_uncompressed(const struct isl_device
*isl_dev
,
83 struct brw_blorp_surface_info
*info
,
84 uint32_t *x
, uint32_t *y
,
85 uint32_t *width
, uint32_t *height
);
87 blorp_surf_fake_interleaved_msaa(const struct isl_device
*isl_dev
,
88 struct brw_blorp_surface_info
*info
);
90 blorp_surf_retile_w_to_y(const struct isl_device
*isl_dev
,
91 struct brw_blorp_surface_info
*info
);
94 struct brw_blorp_coord_transform
101 * Bounding rectangle telling pixel discard which pixels are not to be
102 * touched. This is needed in when surfaces are configured as something else
103 * what they really are:
105 * - writing W-tiled stencil as Y-tiled
106 * - writing interleaved multisampled as single sampled.
108 * See blorp_nir_discard_if_outside_rect().
110 struct brw_blorp_discard_rect
119 * Grid needed for blended and scaled blits of integer formats, see
120 * blorp_nir_manual_blend_bilinear().
122 struct brw_blorp_rect_grid
129 struct blorp_surf_offset
{
134 struct brw_blorp_wm_inputs
136 uint32_t clear_color
[4];
138 struct brw_blorp_discard_rect discard_rect
;
139 struct brw_blorp_rect_grid rect_grid
;
140 struct brw_blorp_coord_transform coord_transform
[2];
142 struct blorp_surf_offset src_offset
;
143 struct blorp_surf_offset dst_offset
;
145 /* (1/width, 1/height) for the source surface */
146 float src_inv_size
[2];
148 /* Minimum layer setting works for all the textures types but texture_3d
149 * for which the setting has no effect. Use the z-coordinate instead.
153 /* Pad out to an integral number of registers */
157 #define BLORP_CREATE_NIR_INPUT(shader, name, type) ({ \
158 nir_variable *input = nir_variable_create((shader), nir_var_shader_in, \
160 if ((shader)->info.stage == MESA_SHADER_FRAGMENT) \
161 input->data.interpolation = INTERP_MODE_FLAT; \
162 input->data.location = VARYING_SLOT_VAR0 + \
163 offsetof(struct brw_blorp_wm_inputs, name) / (4 * sizeof(float)); \
164 input->data.location_frac = \
165 (offsetof(struct brw_blorp_wm_inputs, name) / sizeof(float)) % 4; \
169 struct blorp_vs_inputs
{
171 uint32_t _instance_id
; /* Set in hardware by SGVS */
175 static inline unsigned
176 brw_blorp_get_urb_length(const struct brw_wm_prog_data
*prog_data
)
178 if (prog_data
== NULL
)
181 /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
183 * read_length = ceiling((max_source_attr+1)/2)
185 return MAX2((prog_data
->num_varying_inputs
+ 1) / 2, 1);
195 uint8_t stencil_mask
;
197 struct brw_blorp_surface_info depth
;
198 struct brw_blorp_surface_info stencil
;
199 uint32_t depth_format
;
200 struct brw_blorp_surface_info src
;
201 struct brw_blorp_surface_info dst
;
202 enum isl_aux_op hiz_op
;
203 bool full_surface_hiz_op
;
204 enum isl_aux_op fast_clear_op
;
205 bool color_write_disable
[4];
206 struct brw_blorp_wm_inputs wm_inputs
;
207 struct blorp_vs_inputs vs_inputs
;
208 bool dst_clear_color_as_input
;
209 unsigned num_samples
;
210 unsigned num_draw_buffers
;
212 uint32_t vs_prog_kernel
;
213 struct brw_vs_prog_data
*vs_prog_data
;
214 uint32_t sf_prog_kernel
;
215 struct brw_sf_prog_data
*sf_prog_data
;
216 uint32_t wm_prog_kernel
;
217 struct brw_wm_prog_data
*wm_prog_data
;
219 bool use_pre_baked_binding_table
;
220 uint32_t pre_baked_binding_table_offset
;
223 void blorp_params_init(struct blorp_params
*params
);
225 enum blorp_shader_type
{
226 BLORP_SHADER_TYPE_BLIT
,
227 BLORP_SHADER_TYPE_CLEAR
,
228 BLORP_SHADER_TYPE_MCS_PARTIAL_RESOLVE
,
229 BLORP_SHADER_TYPE_LAYER_OFFSET_VS
,
230 BLORP_SHADER_TYPE_GEN4_SF
,
233 struct brw_blorp_blit_prog_key
235 enum blorp_shader_type shader_type
; /* Must be BLORP_SHADER_TYPE_BLIT */
237 /* Number of samples per pixel that have been configured in the surface
238 * state for texturing from.
240 unsigned tex_samples
;
242 /* MSAA layout that has been configured in the surface state for texturing
245 enum isl_msaa_layout tex_layout
;
247 enum isl_aux_usage tex_aux_usage
;
249 /* Actual number of samples per pixel in the source image. */
250 unsigned src_samples
;
252 /* Actual MSAA layout used by the source image. */
253 enum isl_msaa_layout src_layout
;
255 /* The swizzle to apply to the source in the shader */
256 struct isl_swizzle src_swizzle
;
258 /* The format of the source if format-specific workarounds are needed
259 * and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
262 enum isl_format src_format
;
264 /* True if the source requires normalized coordinates */
265 bool src_coords_normalized
;
267 /* Number of samples per pixel that have been configured in the render
272 /* MSAA layout that has been configured in the render target. */
273 enum isl_msaa_layout rt_layout
;
275 /* Actual number of samples per pixel in the destination image. */
276 unsigned dst_samples
;
278 /* Actual MSAA layout used by the destination image. */
279 enum isl_msaa_layout dst_layout
;
281 /* The swizzle to apply to the destination in the shader */
282 struct isl_swizzle dst_swizzle
;
284 /* The format of the destination if format-specific workarounds are needed
285 * and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
288 enum isl_format dst_format
;
290 /* Whether or not the format workarounds are a bitcast operation */
291 bool format_bit_cast
;
293 /** True if we need to perform SINT -> UINT clamping. */
296 /** True if we need to perform UINT -> SINT clamping. */
299 /* Type of the data to be read from the texture (one of
300 * nir_type_(int|uint|float)).
302 nir_alu_type texture_data_type
;
304 /* True if the source image is W tiled. If true, the surface state for the
305 * source image must be configured as Y tiled, and tex_samples must be 0.
309 /* True if the destination image is W tiled. If true, the surface state
310 * for the render target must be configured as Y tiled, and rt_samples must
315 /* True if the destination is an RGB format. If true, the surface state
316 * for the render target must be configured as red with three times the
317 * normal width. We need to do this because you cannot render to
318 * non-power-of-two formats.
322 isl_surf_usage_flags_t dst_usage
;
324 enum blorp_filter filter
;
326 /* True if the rectangle being sent through the rendering pipeline might be
327 * larger than the destination rectangle, so the WM program should kill any
328 * pixels that are outside the destination rectangle.
333 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
334 * than one sample per pixel.
336 bool persample_msaa_dispatch
;
338 /* True if this blit operation may involve intratile offsets on the source.
339 * In this case, we need to add the offset before texturing.
341 bool need_src_offset
;
343 /* True if this blit operation may involve intratile offsets on the
344 * destination. In this case, we need to add the offset to gl_FragCoord.
346 bool need_dst_offset
;
348 /* Scale factors between the pixel grid and the grid of samples. We're
349 * using grid of samples for bilinear filetring in multisample scaled blits.
356 * \name BLORP internals
359 * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
362 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key
*wm_key
);
365 blorp_compile_fs(struct blorp_context
*blorp
, void *mem_ctx
,
366 struct nir_shader
*nir
,
367 struct brw_wm_prog_key
*wm_key
,
369 struct brw_wm_prog_data
*wm_prog_data
);
372 blorp_compile_vs(struct blorp_context
*blorp
, void *mem_ctx
,
373 struct nir_shader
*nir
,
374 struct brw_vs_prog_data
*vs_prog_data
);
377 blorp_ensure_sf_program(struct blorp_batch
*batch
,
378 struct blorp_params
*params
);
383 } /* end extern "C" */
384 #endif /* __cplusplus */
386 #endif /* BLORP_PRIV_H */