src/intel/blorp/blorp_priv.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "compiler/nir/nir.h"
  29 #include "brw_compiler.h"
  30
  31 #include "blorp.h"
  32
  33 #ifdef __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 /**
  38  * Binding table indices used by BLORP.
  39  */
  40 enum {
  41    BLORP_RENDERBUFFER_BT_INDEX,
  42    BLORP_TEXTURE_BT_INDEX,
  43    BLORP_NUM_BT_ENTRIES
  44 };
  45
  46 enum blorp_fast_clear_op {
  47    BLORP_FAST_CLEAR_OP_NONE = 0,
  48    BLORP_FAST_CLEAR_OP_CLEAR,
  49    BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL,
  50    BLORP_FAST_CLEAR_OP_RESOLVE_FULL,
  51 };
  52
  53 struct brw_blorp_surface_info
  54 {
  55    struct isl_surf surf;
  56    struct blorp_address addr;
  57
  58    struct isl_surf aux_surf;
  59    struct blorp_address aux_addr;
  60    enum isl_aux_usage aux_usage;
  61
  62    union isl_color_value clear_color;
  63
  64    struct isl_view view;
  65
  66    /* Z offset into a 3-D texture or slice of a 2-D array texture. */
  67    uint32_t z_offset;
  68
  69    uint32_t tile_x_sa, tile_y_sa;
  70 };
  71
  72 void
  73 brw_blorp_surface_info_init(struct blorp_context *blorp,
  74                             struct brw_blorp_surface_info *info,
  75                             const struct blorp_surf *surf,
  76                             unsigned int level, unsigned int layer,
  77                             enum isl_format format, bool is_render_target);
  78
  79
  80 struct brw_blorp_coord_transform
  81 {
  82    float multiplier;
  83    float offset;
  84 };
  85
  86 /**
  87  * Bounding rectangle telling pixel discard which pixels are not to be
  88  * touched. This is needed in when surfaces are configured as something else
  89  * what they really are:
  90  *
  91  *    - writing W-tiled stencil as Y-tiled
  92  *    - writing interleaved multisampled as single sampled.
  93  *
  94  * See blorp_nir_discard_if_outside_rect().
  95  */
  96 struct brw_blorp_discard_rect
  97 {
  98    uint32_t x0;
  99    uint32_t x1;
 100    uint32_t y0;
 101    uint32_t y1;
 102 };
 103
 104 /**
 105  * Grid needed for blended and scaled blits of integer formats, see
 106  * blorp_nir_manual_blend_bilinear().
 107  */
 108 struct brw_blorp_rect_grid
 109 {
 110    float x1;
 111    float y1;
 112    float pad[2];
 113 };
 114
 115 struct blorp_surf_offset {
 116    uint32_t x;
 117    uint32_t y;
 118 };
 119
 120 struct brw_blorp_wm_inputs
 121 {
 122    struct brw_blorp_discard_rect discard_rect;
 123    struct brw_blorp_rect_grid rect_grid;
 124    struct brw_blorp_coord_transform coord_transform[2];
 125
 126    struct blorp_surf_offset src_offset;
 127    struct blorp_surf_offset dst_offset;
 128
 129    /* Minimum layer setting works for all the textures types but texture_3d
 130     * for which the setting has no effect. Use the z-coordinate instead.
 131     */
 132    uint32_t src_z;
 133
 134    /* Pad out to an integral number of registers */
 135    uint32_t pad[1];
 136 };
 137
 138 struct brw_blorp_prog_data
 139 {
 140    bool dispatch_8;
 141    bool dispatch_16;
 142
 143    uint8_t first_curbe_grf_0;
 144    uint8_t first_curbe_grf_2;
 145
 146    uint32_t ksp_offset_2;
 147
 148    /**
 149     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 150     * than one sample per pixel.
 151     */
 152    bool persample_msaa_dispatch;
 153
 154    /**
 155     * Mask of which FS inputs are marked flat by the shader source.  This is
 156     * needed for setting up 3DSTATE_SF/SBE.
 157     */
 158    uint32_t flat_inputs;
 159    unsigned num_varying_inputs;
 160    uint64_t inputs_read;
 161 };
 162
 163 static inline unsigned
 164 brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
 165 {
 166    if (prog_data == NULL)
 167       return 1;
 168
 169    /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
 170     *
 171     * read_length = ceiling((max_source_attr+1)/2)
 172     */
 173    return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
 174 }
 175
 176 struct blorp_params
 177 {
 178    uint32_t x0;
 179    uint32_t y0;
 180    uint32_t x1;
 181    uint32_t y1;
 182    struct brw_blorp_surface_info depth;
 183    uint32_t depth_format;
 184    struct brw_blorp_surface_info src;
 185    struct brw_blorp_surface_info dst;
 186    enum blorp_hiz_op hiz_op;
 187    enum blorp_fast_clear_op fast_clear_op;
 188    bool color_write_disable[4];
 189    struct brw_blorp_wm_inputs wm_inputs;
 190    unsigned num_draw_buffers;
 191    unsigned num_layers;
 192    uint32_t wm_prog_kernel;
 193    struct brw_blorp_prog_data *wm_prog_data;
 194 };
 195
 196 void blorp_params_init(struct blorp_params *params);
 197
 198 struct brw_blorp_blit_prog_key
 199 {
 200    /* Number of samples per pixel that have been configured in the surface
 201     * state for texturing from.
 202     */
 203    unsigned tex_samples;
 204
 205    /* MSAA layout that has been configured in the surface state for texturing
 206     * from.
 207     */
 208    enum isl_msaa_layout tex_layout;
 209
 210    enum isl_aux_usage tex_aux_usage;
 211
 212    /* Actual number of samples per pixel in the source image. */
 213    unsigned src_samples;
 214
 215    /* Actual MSAA layout used by the source image. */
 216    enum isl_msaa_layout src_layout;
 217
 218    /* Number of samples per pixel that have been configured in the render
 219     * target.
 220     */
 221    unsigned rt_samples;
 222
 223    /* MSAA layout that has been configured in the render target. */
 224    enum isl_msaa_layout rt_layout;
 225
 226    /* Actual number of samples per pixel in the destination image. */
 227    unsigned dst_samples;
 228
 229    /* Actual MSAA layout used by the destination image. */
 230    enum isl_msaa_layout dst_layout;
 231
 232    /* Type of the data to be read from the texture (one of
 233     * nir_type_(int|uint|float)).
 234     */
 235    nir_alu_type texture_data_type;
 236
 237    /* True if the source image is W tiled.  If true, the surface state for the
 238     * source image must be configured as Y tiled, and tex_samples must be 0.
 239     */
 240    bool src_tiled_w;
 241
 242    /* True if the destination image is W tiled.  If true, the surface state
 243     * for the render target must be configured as Y tiled, and rt_samples must
 244     * be 0.
 245     */
 246    bool dst_tiled_w;
 247
 248    /* True if the destination is an RGB format.  If true, the surface state
 249     * for the render target must be configured as red with three times the
 250     * normal width.  We need to do this because you cannot render to
 251     * non-power-of-two formats.
 252     */
 253    bool dst_rgb;
 254
 255    /* True if all source samples should be blended together to produce each
 256     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 257     * equal src_samples, and tex_samples must be nonzero.
 258     */
 259    bool blend;
 260
 261    /* True if the rectangle being sent through the rendering pipeline might be
 262     * larger than the destination rectangle, so the WM program should kill any
 263     * pixels that are outside the destination rectangle.
 264     */
 265    bool use_kill;
 266
 267    /**
 268     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 269     * than one sample per pixel.
 270     */
 271    bool persample_msaa_dispatch;
 272
 273    /* True for scaled blitting. */
 274    bool blit_scaled;
 275
 276    /* True if this blit operation may involve intratile offsets on the source.
 277     * In this case, we need to add the offset before texturing.
 278     */
 279    bool need_src_offset;
 280
 281    /* True if this blit operation may involve intratile offsets on the
 282     * destination.  In this case, we need to add the offset to gl_FragCoord.
 283     */
 284    bool need_dst_offset;
 285
 286    /* Scale factors between the pixel grid and the grid of samples. We're
 287     * using grid of samples for bilinear filetring in multisample scaled blits.
 288     */
 289    float x_scale;
 290    float y_scale;
 291
 292    /* True for blits with filter = GL_LINEAR. */
 293    bool bilinear_filter;
 294 };
 295
 296 /**
 297  * \name BLORP internals
 298  * \{
 299  *
 300  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 301  */
 302
 303 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
 304
 305 const unsigned *
 306 brw_blorp_compile_nir_shader(struct blorp_context *blorp, struct nir_shader *nir,
 307                              const struct brw_wm_prog_key *wm_key,
 308                              bool use_repclear,
 309                              struct brw_blorp_prog_data *prog_data,
 310                              unsigned *program_size);
 311
 312 /** \} */
 313
 314 #ifdef __cplusplus
 315 } /* end extern "C" */
 316 #endif /* __cplusplus */