intel: Fix aux map alignments on 32-bit builds.
[mesa.git] / src / intel / common / gen_batch_decoder.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "common/gen_decoder.h"
25 #include "gen_disasm.h"
26 #include "util/macros.h"
27 #include "main/macros.h" /* Needed for ROUND_DOWN_TO */
28
29 #include <string.h>
30
31 void
32 gen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx,
33 const struct gen_device_info *devinfo,
34 FILE *fp, enum gen_batch_decode_flags flags,
35 const char *xml_path,
36 struct gen_batch_decode_bo (*get_bo)(void *,
37 bool,
38 uint64_t),
39 unsigned (*get_state_size)(void *, uint64_t,
40 uint64_t),
41 void *user_data)
42 {
43 memset(ctx, 0, sizeof(*ctx));
44
45 ctx->get_bo = get_bo;
46 ctx->get_state_size = get_state_size;
47 ctx->user_data = user_data;
48 ctx->fp = fp;
49 ctx->flags = flags;
50 ctx->max_vbo_decoded_lines = -1; /* No limit! */
51 ctx->engine = I915_ENGINE_CLASS_RENDER;
52
53 if (xml_path == NULL)
54 ctx->spec = gen_spec_load(devinfo);
55 else
56 ctx->spec = gen_spec_load_from_path(devinfo, xml_path);
57 ctx->disasm = gen_disasm_create(devinfo);
58 }
59
60 void
61 gen_batch_decode_ctx_finish(struct gen_batch_decode_ctx *ctx)
62 {
63 gen_spec_destroy(ctx->spec);
64 gen_disasm_destroy(ctx->disasm);
65 }
66
67 #define CSI "\e["
68 #define RED_COLOR CSI "31m"
69 #define BLUE_HEADER CSI "0;44m"
70 #define GREEN_HEADER CSI "1;42m"
71 #define NORMAL CSI "0m"
72
73 static void
74 ctx_print_group(struct gen_batch_decode_ctx *ctx,
75 struct gen_group *group,
76 uint64_t address, const void *map)
77 {
78 gen_print_group(ctx->fp, group, address, map, 0,
79 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) != 0);
80 }
81
82 static struct gen_batch_decode_bo
83 ctx_get_bo(struct gen_batch_decode_ctx *ctx, bool ppgtt, uint64_t addr)
84 {
85 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0)) {
86 /* On Broadwell and above, we have 48-bit addresses which consume two
87 * dwords. Some packets require that these get stored in a "canonical
88 * form" which means that bit 47 is sign-extended through the upper
89 * bits. In order to correctly handle those aub dumps, we need to mask
90 * off the top 16 bits.
91 */
92 addr &= (~0ull >> 16);
93 }
94
95 struct gen_batch_decode_bo bo = ctx->get_bo(ctx->user_data, ppgtt, addr);
96
97 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0))
98 bo.addr &= (~0ull >> 16);
99
100 /* We may actually have an offset into the bo */
101 if (bo.map != NULL) {
102 assert(bo.addr <= addr);
103 uint64_t offset = addr - bo.addr;
104 bo.map += offset;
105 bo.addr += offset;
106 bo.size -= offset;
107 }
108
109 return bo;
110 }
111
112 static int
113 update_count(struct gen_batch_decode_ctx *ctx,
114 uint64_t address,
115 uint64_t base_address,
116 unsigned element_dwords,
117 unsigned guess)
118 {
119 unsigned size = 0;
120
121 if (ctx->get_state_size)
122 size = ctx->get_state_size(ctx->user_data, address, base_address);
123
124 if (size > 0)
125 return size / (sizeof(uint32_t) * element_dwords);
126
127 /* In the absence of any information, just guess arbitrarily. */
128 return guess;
129 }
130
131 static void
132 ctx_disassemble_program(struct gen_batch_decode_ctx *ctx,
133 uint32_t ksp, const char *type)
134 {
135 uint64_t addr = ctx->instruction_base + ksp;
136 struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, addr);
137 if (!bo.map)
138 return;
139
140 fprintf(ctx->fp, "\nReferenced %s:\n", type);
141 gen_disasm_disassemble(ctx->disasm, bo.map, 0, ctx->fp);
142 }
143
144 /* Heuristic to determine whether a uint32_t is probably actually a float
145 * (http://stackoverflow.com/a/2953466)
146 */
147
148 static bool
149 probably_float(uint32_t bits)
150 {
151 int exp = ((bits & 0x7f800000U) >> 23) - 127;
152 uint32_t mant = bits & 0x007fffff;
153
154 /* +- 0.0 */
155 if (exp == -127 && mant == 0)
156 return true;
157
158 /* +- 1 billionth to 1 billion */
159 if (-30 <= exp && exp <= 30)
160 return true;
161
162 /* some value with only a few binary digits */
163 if ((mant & 0x0000ffff) == 0)
164 return true;
165
166 return false;
167 }
168
169 static void
170 ctx_print_buffer(struct gen_batch_decode_ctx *ctx,
171 struct gen_batch_decode_bo bo,
172 uint32_t read_length,
173 uint32_t pitch,
174 int max_lines)
175 {
176 const uint32_t *dw_end =
177 bo.map + ROUND_DOWN_TO(MIN2(bo.size, read_length), 4);
178
179 int column_count = 0, line_count = -1;
180 for (const uint32_t *dw = bo.map; dw < dw_end; dw++) {
181 if (column_count * 4 == pitch || column_count == 8) {
182 fprintf(ctx->fp, "\n");
183 column_count = 0;
184 line_count++;
185
186 if (max_lines >= 0 && line_count >= max_lines)
187 break;
188 }
189 fprintf(ctx->fp, column_count == 0 ? " " : " ");
190
191 if ((ctx->flags & GEN_BATCH_DECODE_FLOATS) && probably_float(*dw))
192 fprintf(ctx->fp, " %8.2f", *(float *) dw);
193 else
194 fprintf(ctx->fp, " 0x%08x", *dw);
195
196 column_count++;
197 }
198 fprintf(ctx->fp, "\n");
199 }
200
201 static struct gen_group *
202 gen_ctx_find_instruction(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
203 {
204 return gen_spec_find_instruction(ctx->spec, ctx->engine, p);
205 }
206
207 static void
208 handle_state_base_address(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
209 {
210 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
211
212 struct gen_field_iterator iter;
213 gen_field_iterator_init(&iter, inst, p, 0, false);
214
215 uint64_t surface_base = 0, dynamic_base = 0, instruction_base = 0;
216 bool surface_modify = 0, dynamic_modify = 0, instruction_modify = 0;
217
218 while (gen_field_iterator_next(&iter)) {
219 if (strcmp(iter.name, "Surface State Base Address") == 0) {
220 surface_base = iter.raw_value;
221 } else if (strcmp(iter.name, "Dynamic State Base Address") == 0) {
222 dynamic_base = iter.raw_value;
223 } else if (strcmp(iter.name, "Instruction Base Address") == 0) {
224 instruction_base = iter.raw_value;
225 } else if (strcmp(iter.name, "Surface State Base Address Modify Enable") == 0) {
226 surface_modify = iter.raw_value;
227 } else if (strcmp(iter.name, "Dynamic State Base Address Modify Enable") == 0) {
228 dynamic_modify = iter.raw_value;
229 } else if (strcmp(iter.name, "Instruction Base Address Modify Enable") == 0) {
230 instruction_modify = iter.raw_value;
231 }
232 }
233
234 if (dynamic_modify)
235 ctx->dynamic_base = dynamic_base;
236
237 if (surface_modify)
238 ctx->surface_base = surface_base;
239
240 if (instruction_modify)
241 ctx->instruction_base = instruction_base;
242 }
243
244 static void
245 dump_binding_table(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
246 {
247 struct gen_group *strct =
248 gen_spec_find_struct(ctx->spec, "RENDER_SURFACE_STATE");
249 if (strct == NULL) {
250 fprintf(ctx->fp, "did not find RENDER_SURFACE_STATE info\n");
251 return;
252 }
253
254 if (count < 0) {
255 count = update_count(ctx, ctx->surface_base + offset,
256 ctx->surface_base, 1, 8);
257 }
258
259 if (offset % 32 != 0 || offset >= UINT16_MAX) {
260 fprintf(ctx->fp, " invalid binding table pointer\n");
261 return;
262 }
263
264 struct gen_batch_decode_bo bind_bo =
265 ctx_get_bo(ctx, true, ctx->surface_base + offset);
266
267 if (bind_bo.map == NULL) {
268 fprintf(ctx->fp, " binding table unavailable\n");
269 return;
270 }
271
272 const uint32_t *pointers = bind_bo.map;
273 for (int i = 0; i < count; i++) {
274 if (pointers[i] == 0)
275 continue;
276
277 uint64_t addr = ctx->surface_base + pointers[i];
278 struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, addr);
279 uint32_t size = strct->dw_length * 4;
280
281 if (pointers[i] % 32 != 0 ||
282 addr < bo.addr || addr + size >= bo.addr + bo.size) {
283 fprintf(ctx->fp, "pointer %u: 0x%08x <not valid>\n", i, pointers[i]);
284 continue;
285 }
286
287 fprintf(ctx->fp, "pointer %u: 0x%08x\n", i, pointers[i]);
288 ctx_print_group(ctx, strct, addr, bo.map + (addr - bo.addr));
289 }
290 }
291
292 static void
293 dump_samplers(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
294 {
295 struct gen_group *strct = gen_spec_find_struct(ctx->spec, "SAMPLER_STATE");
296 uint64_t state_addr = ctx->dynamic_base + offset;
297
298 if (count < 0) {
299 count = update_count(ctx, state_addr, ctx->dynamic_base,
300 strct->dw_length, 4);
301 }
302
303 struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, state_addr);
304 const void *state_map = bo.map;
305
306 if (state_map == NULL) {
307 fprintf(ctx->fp, " samplers unavailable\n");
308 return;
309 }
310
311 if (offset % 32 != 0 || state_addr - bo.addr >= bo.size) {
312 fprintf(ctx->fp, " invalid sampler state pointer\n");
313 return;
314 }
315
316 for (int i = 0; i < count; i++) {
317 fprintf(ctx->fp, "sampler state %d\n", i);
318 ctx_print_group(ctx, strct, state_addr, state_map);
319 state_addr += 16;
320 state_map += 16;
321 }
322 }
323
324 static void
325 handle_media_interface_descriptor_load(struct gen_batch_decode_ctx *ctx,
326 const uint32_t *p)
327 {
328 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
329 struct gen_group *desc =
330 gen_spec_find_struct(ctx->spec, "INTERFACE_DESCRIPTOR_DATA");
331
332 struct gen_field_iterator iter;
333 gen_field_iterator_init(&iter, inst, p, 0, false);
334 uint32_t descriptor_offset = 0;
335 int descriptor_count = 0;
336 while (gen_field_iterator_next(&iter)) {
337 if (strcmp(iter.name, "Interface Descriptor Data Start Address") == 0) {
338 descriptor_offset = strtol(iter.value, NULL, 16);
339 } else if (strcmp(iter.name, "Interface Descriptor Total Length") == 0) {
340 descriptor_count =
341 strtol(iter.value, NULL, 16) / (desc->dw_length * 4);
342 }
343 }
344
345 uint64_t desc_addr = ctx->dynamic_base + descriptor_offset;
346 struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, desc_addr);
347 const void *desc_map = bo.map;
348
349 if (desc_map == NULL) {
350 fprintf(ctx->fp, " interface descriptors unavailable\n");
351 return;
352 }
353
354 for (int i = 0; i < descriptor_count; i++) {
355 fprintf(ctx->fp, "descriptor %d: %08x\n", i, descriptor_offset);
356
357 ctx_print_group(ctx, desc, desc_addr, desc_map);
358
359 gen_field_iterator_init(&iter, desc, desc_map, 0, false);
360 uint64_t ksp = 0;
361 uint32_t sampler_offset = 0, sampler_count = 0;
362 uint32_t binding_table_offset = 0, binding_entry_count = 0;
363 while (gen_field_iterator_next(&iter)) {
364 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
365 ksp = strtoll(iter.value, NULL, 16);
366 } else if (strcmp(iter.name, "Sampler State Pointer") == 0) {
367 sampler_offset = strtol(iter.value, NULL, 16);
368 } else if (strcmp(iter.name, "Sampler Count") == 0) {
369 sampler_count = strtol(iter.value, NULL, 10);
370 } else if (strcmp(iter.name, "Binding Table Pointer") == 0) {
371 binding_table_offset = strtol(iter.value, NULL, 16);
372 } else if (strcmp(iter.name, "Binding Table Entry Count") == 0) {
373 binding_entry_count = strtol(iter.value, NULL, 10);
374 }
375 }
376
377 ctx_disassemble_program(ctx, ksp, "compute shader");
378 printf("\n");
379
380 dump_samplers(ctx, sampler_offset, sampler_count);
381 dump_binding_table(ctx, binding_table_offset, binding_entry_count);
382
383 desc_map += desc->dw_length;
384 desc_addr += desc->dw_length * 4;
385 }
386 }
387
388 static void
389 handle_3dstate_vertex_buffers(struct gen_batch_decode_ctx *ctx,
390 const uint32_t *p)
391 {
392 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
393 struct gen_group *vbs = gen_spec_find_struct(ctx->spec, "VERTEX_BUFFER_STATE");
394
395 struct gen_batch_decode_bo vb = {};
396 uint32_t vb_size = 0;
397 int index = -1;
398 int pitch = -1;
399 bool ready = false;
400
401 struct gen_field_iterator iter;
402 gen_field_iterator_init(&iter, inst, p, 0, false);
403 while (gen_field_iterator_next(&iter)) {
404 if (iter.struct_desc != vbs)
405 continue;
406
407 struct gen_field_iterator vbs_iter;
408 gen_field_iterator_init(&vbs_iter, vbs, &iter.p[iter.start_bit / 32], 0, false);
409 while (gen_field_iterator_next(&vbs_iter)) {
410 if (strcmp(vbs_iter.name, "Vertex Buffer Index") == 0) {
411 index = vbs_iter.raw_value;
412 } else if (strcmp(vbs_iter.name, "Buffer Pitch") == 0) {
413 pitch = vbs_iter.raw_value;
414 } else if (strcmp(vbs_iter.name, "Buffer Starting Address") == 0) {
415 vb = ctx_get_bo(ctx, true, vbs_iter.raw_value);
416 } else if (strcmp(vbs_iter.name, "Buffer Size") == 0) {
417 vb_size = vbs_iter.raw_value;
418 ready = true;
419 } else if (strcmp(vbs_iter.name, "End Address") == 0) {
420 if (vb.map && vbs_iter.raw_value >= vb.addr)
421 vb_size = (vbs_iter.raw_value + 1) - vb.addr;
422 else
423 vb_size = 0;
424 ready = true;
425 }
426
427 if (!ready)
428 continue;
429
430 fprintf(ctx->fp, "vertex buffer %d, size %d\n", index, vb_size);
431
432 if (vb.map == NULL) {
433 fprintf(ctx->fp, " buffer contents unavailable\n");
434 continue;
435 }
436
437 if (vb.map == 0 || vb_size == 0)
438 continue;
439
440 ctx_print_buffer(ctx, vb, vb_size, pitch, ctx->max_vbo_decoded_lines);
441
442 vb.map = NULL;
443 vb_size = 0;
444 index = -1;
445 pitch = -1;
446 ready = false;
447 }
448 }
449 }
450
451 static void
452 handle_3dstate_index_buffer(struct gen_batch_decode_ctx *ctx,
453 const uint32_t *p)
454 {
455 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
456
457 struct gen_batch_decode_bo ib = {};
458 uint32_t ib_size = 0;
459 uint32_t format = 0;
460
461 struct gen_field_iterator iter;
462 gen_field_iterator_init(&iter, inst, p, 0, false);
463 while (gen_field_iterator_next(&iter)) {
464 if (strcmp(iter.name, "Index Format") == 0) {
465 format = iter.raw_value;
466 } else if (strcmp(iter.name, "Buffer Starting Address") == 0) {
467 ib = ctx_get_bo(ctx, true, iter.raw_value);
468 } else if (strcmp(iter.name, "Buffer Size") == 0) {
469 ib_size = iter.raw_value;
470 }
471 }
472
473 if (ib.map == NULL) {
474 fprintf(ctx->fp, " buffer contents unavailable\n");
475 return;
476 }
477
478 const void *m = ib.map;
479 const void *ib_end = ib.map + MIN2(ib.size, ib_size);
480 for (int i = 0; m < ib_end && i < 10; i++) {
481 switch (format) {
482 case 0:
483 fprintf(ctx->fp, "%3d ", *(uint8_t *)m);
484 m += 1;
485 break;
486 case 1:
487 fprintf(ctx->fp, "%3d ", *(uint16_t *)m);
488 m += 2;
489 break;
490 case 2:
491 fprintf(ctx->fp, "%3d ", *(uint32_t *)m);
492 m += 4;
493 break;
494 }
495 }
496
497 if (m < ib_end)
498 fprintf(ctx->fp, "...");
499 fprintf(ctx->fp, "\n");
500 }
501
502 static void
503 decode_single_ksp(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
504 {
505 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
506
507 uint64_t ksp = 0;
508 bool is_simd8 = false; /* vertex shaders on Gen8+ only */
509 bool is_enabled = true;
510
511 struct gen_field_iterator iter;
512 gen_field_iterator_init(&iter, inst, p, 0, false);
513 while (gen_field_iterator_next(&iter)) {
514 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
515 ksp = iter.raw_value;
516 } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) {
517 is_simd8 = iter.raw_value;
518 } else if (strcmp(iter.name, "Dispatch Mode") == 0) {
519 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
520 } else if (strcmp(iter.name, "Dispatch Enable") == 0) {
521 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
522 } else if (strcmp(iter.name, "Enable") == 0) {
523 is_enabled = iter.raw_value;
524 }
525 }
526
527 const char *type =
528 strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" :
529 strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" :
530 strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" :
531 strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" :
532 strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation evaluation shader" :
533 strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation control shader" :
534 strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") :
535 strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") :
536 NULL;
537
538 if (is_enabled) {
539 ctx_disassemble_program(ctx, ksp, type);
540 printf("\n");
541 }
542 }
543
544 static void
545 decode_ps_kernels(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
546 {
547 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
548
549 uint64_t ksp[3] = {0, 0, 0};
550 bool enabled[3] = {false, false, false};
551
552 struct gen_field_iterator iter;
553 gen_field_iterator_init(&iter, inst, p, 0, false);
554 while (gen_field_iterator_next(&iter)) {
555 if (strncmp(iter.name, "Kernel Start Pointer ",
556 strlen("Kernel Start Pointer ")) == 0) {
557 int idx = iter.name[strlen("Kernel Start Pointer ")] - '0';
558 ksp[idx] = strtol(iter.value, NULL, 16);
559 } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) {
560 enabled[0] = strcmp(iter.value, "true") == 0;
561 } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) {
562 enabled[1] = strcmp(iter.value, "true") == 0;
563 } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) {
564 enabled[2] = strcmp(iter.value, "true") == 0;
565 }
566 }
567
568 /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */
569 if (enabled[0] + enabled[1] + enabled[2] == 1) {
570 if (enabled[1]) {
571 ksp[1] = ksp[0];
572 ksp[0] = 0;
573 } else if (enabled[2]) {
574 ksp[2] = ksp[0];
575 ksp[0] = 0;
576 }
577 } else {
578 uint64_t tmp = ksp[1];
579 ksp[1] = ksp[2];
580 ksp[2] = tmp;
581 }
582
583 if (enabled[0])
584 ctx_disassemble_program(ctx, ksp[0], "SIMD8 fragment shader");
585 if (enabled[1])
586 ctx_disassemble_program(ctx, ksp[1], "SIMD16 fragment shader");
587 if (enabled[2])
588 ctx_disassemble_program(ctx, ksp[2], "SIMD32 fragment shader");
589
590 if (enabled[0] || enabled[1] || enabled[2])
591 fprintf(ctx->fp, "\n");
592 }
593
594 static void
595 decode_3dstate_constant_all(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
596 {
597 struct gen_group *inst =
598 gen_spec_find_instruction(ctx->spec, ctx->engine, p);
599 struct gen_group *body =
600 gen_spec_find_struct(ctx->spec, "3DSTATE_CONSTANT_ALL_DATA");
601
602 uint32_t read_length[4];
603 struct gen_batch_decode_bo buffer[4];
604 memset(buffer, 0, sizeof(buffer));
605
606 struct gen_field_iterator outer;
607 gen_field_iterator_init(&outer, inst, p, 0, false);
608 int idx = 0;
609 while (gen_field_iterator_next(&outer)) {
610 if (outer.struct_desc != body)
611 continue;
612
613 struct gen_field_iterator iter;
614 gen_field_iterator_init(&iter, body, &outer.p[outer.start_bit / 32],
615 0, false);
616 while (gen_field_iterator_next(&iter)) {
617 if (!strcmp(iter.name, "Pointer To Constant Buffer")) {
618 buffer[idx] = ctx_get_bo(ctx, true, iter.raw_value);
619 } else if (!strcmp(iter.name, "Constant Buffer Read Length")) {
620 read_length[idx] = iter.raw_value;
621 }
622 }
623 idx++;
624 }
625
626 for (int i = 0; i < 4; i++) {
627 if (read_length[i] == 0 || buffer[i].map == NULL)
628 continue;
629
630 unsigned size = read_length[i] * 32;
631 fprintf(ctx->fp, "constant buffer %d, size %u\n", i, size);
632
633 ctx_print_buffer(ctx, buffer[i], size, 0, -1);
634 }
635 }
636
637 static void
638 decode_3dstate_constant(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
639 {
640 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
641 struct gen_group *body =
642 gen_spec_find_struct(ctx->spec, "3DSTATE_CONSTANT_BODY");
643
644 uint32_t read_length[4] = {0};
645 uint64_t read_addr[4];
646
647 struct gen_field_iterator outer;
648 gen_field_iterator_init(&outer, inst, p, 0, false);
649 while (gen_field_iterator_next(&outer)) {
650 if (outer.struct_desc != body)
651 continue;
652
653 struct gen_field_iterator iter;
654 gen_field_iterator_init(&iter, body, &outer.p[outer.start_bit / 32],
655 0, false);
656
657 while (gen_field_iterator_next(&iter)) {
658 int idx;
659 if (sscanf(iter.name, "Read Length[%d]", &idx) == 1) {
660 read_length[idx] = iter.raw_value;
661 } else if (sscanf(iter.name, "Buffer[%d]", &idx) == 1) {
662 read_addr[idx] = iter.raw_value;
663 }
664 }
665
666 for (int i = 0; i < 4; i++) {
667 if (read_length[i] == 0)
668 continue;
669
670 struct gen_batch_decode_bo buffer = ctx_get_bo(ctx, true, read_addr[i]);
671 if (!buffer.map) {
672 fprintf(ctx->fp, "constant buffer %d unavailable\n", i);
673 continue;
674 }
675
676 unsigned size = read_length[i] * 32;
677 fprintf(ctx->fp, "constant buffer %d, size %u\n", i, size);
678
679 ctx_print_buffer(ctx, buffer, size, 0, -1);
680 }
681 }
682 }
683
684 static void
685 decode_gen6_3dstate_binding_table_pointers(struct gen_batch_decode_ctx *ctx,
686 const uint32_t *p)
687 {
688 fprintf(ctx->fp, "VS Binding Table:\n");
689 dump_binding_table(ctx, p[1], -1);
690
691 fprintf(ctx->fp, "GS Binding Table:\n");
692 dump_binding_table(ctx, p[2], -1);
693
694 fprintf(ctx->fp, "PS Binding Table:\n");
695 dump_binding_table(ctx, p[3], -1);
696 }
697
698 static void
699 decode_3dstate_binding_table_pointers(struct gen_batch_decode_ctx *ctx,
700 const uint32_t *p)
701 {
702 dump_binding_table(ctx, p[1], -1);
703 }
704
705 static void
706 decode_3dstate_sampler_state_pointers(struct gen_batch_decode_ctx *ctx,
707 const uint32_t *p)
708 {
709 dump_samplers(ctx, p[1], -1);
710 }
711
712 static void
713 decode_3dstate_sampler_state_pointers_gen6(struct gen_batch_decode_ctx *ctx,
714 const uint32_t *p)
715 {
716 dump_samplers(ctx, p[1], -1);
717 dump_samplers(ctx, p[2], -1);
718 dump_samplers(ctx, p[3], -1);
719 }
720
721 static bool
722 str_ends_with(const char *str, const char *end)
723 {
724 int offset = strlen(str) - strlen(end);
725 if (offset < 0)
726 return false;
727
728 return strcmp(str + offset, end) == 0;
729 }
730
731 static void
732 decode_dynamic_state_pointers(struct gen_batch_decode_ctx *ctx,
733 const char *struct_type, const uint32_t *p,
734 int count)
735 {
736 struct gen_group *inst = gen_ctx_find_instruction(ctx, p);
737
738 uint32_t state_offset = 0;
739
740 struct gen_field_iterator iter;
741 gen_field_iterator_init(&iter, inst, p, 0, false);
742 while (gen_field_iterator_next(&iter)) {
743 if (str_ends_with(iter.name, "Pointer")) {
744 state_offset = iter.raw_value;
745 break;
746 }
747 }
748
749 uint64_t state_addr = ctx->dynamic_base + state_offset;
750 struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, state_addr);
751 const void *state_map = bo.map;
752
753 if (state_map == NULL) {
754 fprintf(ctx->fp, " dynamic %s state unavailable\n", struct_type);
755 return;
756 }
757
758 struct gen_group *state = gen_spec_find_struct(ctx->spec, struct_type);
759 if (strcmp(struct_type, "BLEND_STATE") == 0) {
760 /* Blend states are different from the others because they have a header
761 * struct called BLEND_STATE which is followed by a variable number of
762 * BLEND_STATE_ENTRY structs.
763 */
764 fprintf(ctx->fp, "%s\n", struct_type);
765 ctx_print_group(ctx, state, state_addr, state_map);
766
767 state_addr += state->dw_length * 4;
768 state_map += state->dw_length * 4;
769
770 struct_type = "BLEND_STATE_ENTRY";
771 state = gen_spec_find_struct(ctx->spec, struct_type);
772 }
773
774 count = update_count(ctx, ctx->dynamic_base + state_offset,
775 ctx->dynamic_base, state->dw_length, count);
776
777 for (int i = 0; i < count; i++) {
778 fprintf(ctx->fp, "%s %d\n", struct_type, i);
779 ctx_print_group(ctx, state, state_addr, state_map);
780
781 state_addr += state->dw_length * 4;
782 state_map += state->dw_length * 4;
783 }
784 }
785
786 static void
787 decode_3dstate_viewport_state_pointers_cc(struct gen_batch_decode_ctx *ctx,
788 const uint32_t *p)
789 {
790 decode_dynamic_state_pointers(ctx, "CC_VIEWPORT", p, 4);
791 }
792
793 static void
794 decode_3dstate_viewport_state_pointers_sf_clip(struct gen_batch_decode_ctx *ctx,
795 const uint32_t *p)
796 {
797 decode_dynamic_state_pointers(ctx, "SF_CLIP_VIEWPORT", p, 4);
798 }
799
800 static void
801 decode_3dstate_blend_state_pointers(struct gen_batch_decode_ctx *ctx,
802 const uint32_t *p)
803 {
804 decode_dynamic_state_pointers(ctx, "BLEND_STATE", p, 1);
805 }
806
807 static void
808 decode_3dstate_cc_state_pointers(struct gen_batch_decode_ctx *ctx,
809 const uint32_t *p)
810 {
811 decode_dynamic_state_pointers(ctx, "COLOR_CALC_STATE", p, 1);
812 }
813
814 static void
815 decode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx *ctx,
816 const uint32_t *p)
817 {
818 decode_dynamic_state_pointers(ctx, "SCISSOR_RECT", p, 1);
819 }
820
821 static void
822 decode_3dstate_slice_table_state_pointers(struct gen_batch_decode_ctx *ctx,
823 const uint32_t *p)
824 {
825 decode_dynamic_state_pointers(ctx, "SLICE_HASH_TABLE", p, 1);
826 }
827
828 static void
829 decode_load_register_imm(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
830 {
831 struct gen_group *reg = gen_spec_find_register(ctx->spec, p[1]);
832
833 if (reg != NULL) {
834 fprintf(ctx->fp, "register %s (0x%x): 0x%x\n",
835 reg->name, reg->register_offset, p[2]);
836 ctx_print_group(ctx, reg, reg->register_offset, &p[2]);
837 }
838 }
839
840 struct custom_decoder {
841 const char *cmd_name;
842 void (*decode)(struct gen_batch_decode_ctx *ctx, const uint32_t *p);
843 } custom_decoders[] = {
844 { "STATE_BASE_ADDRESS", handle_state_base_address },
845 { "MEDIA_INTERFACE_DESCRIPTOR_LOAD", handle_media_interface_descriptor_load },
846 { "3DSTATE_VERTEX_BUFFERS", handle_3dstate_vertex_buffers },
847 { "3DSTATE_INDEX_BUFFER", handle_3dstate_index_buffer },
848 { "3DSTATE_VS", decode_single_ksp },
849 { "3DSTATE_GS", decode_single_ksp },
850 { "3DSTATE_DS", decode_single_ksp },
851 { "3DSTATE_HS", decode_single_ksp },
852 { "3DSTATE_PS", decode_ps_kernels },
853 { "3DSTATE_WM", decode_ps_kernels },
854 { "3DSTATE_CONSTANT_VS", decode_3dstate_constant },
855 { "3DSTATE_CONSTANT_GS", decode_3dstate_constant },
856 { "3DSTATE_CONSTANT_PS", decode_3dstate_constant },
857 { "3DSTATE_CONSTANT_HS", decode_3dstate_constant },
858 { "3DSTATE_CONSTANT_DS", decode_3dstate_constant },
859 { "3DSTATE_CONSTANT_ALL", decode_3dstate_constant_all },
860
861 { "3DSTATE_BINDING_TABLE_POINTERS", decode_gen6_3dstate_binding_table_pointers },
862 { "3DSTATE_BINDING_TABLE_POINTERS_VS", decode_3dstate_binding_table_pointers },
863 { "3DSTATE_BINDING_TABLE_POINTERS_HS", decode_3dstate_binding_table_pointers },
864 { "3DSTATE_BINDING_TABLE_POINTERS_DS", decode_3dstate_binding_table_pointers },
865 { "3DSTATE_BINDING_TABLE_POINTERS_GS", decode_3dstate_binding_table_pointers },
866 { "3DSTATE_BINDING_TABLE_POINTERS_PS", decode_3dstate_binding_table_pointers },
867
868 { "3DSTATE_SAMPLER_STATE_POINTERS_VS", decode_3dstate_sampler_state_pointers },
869 { "3DSTATE_SAMPLER_STATE_POINTERS_HS", decode_3dstate_sampler_state_pointers },
870 { "3DSTATE_SAMPLER_STATE_POINTERS_DS", decode_3dstate_sampler_state_pointers },
871 { "3DSTATE_SAMPLER_STATE_POINTERS_GS", decode_3dstate_sampler_state_pointers },
872 { "3DSTATE_SAMPLER_STATE_POINTERS_PS", decode_3dstate_sampler_state_pointers },
873 { "3DSTATE_SAMPLER_STATE_POINTERS", decode_3dstate_sampler_state_pointers_gen6 },
874
875 { "3DSTATE_VIEWPORT_STATE_POINTERS_CC", decode_3dstate_viewport_state_pointers_cc },
876 { "3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP", decode_3dstate_viewport_state_pointers_sf_clip },
877 { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers },
878 { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers },
879 { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers },
880 { "3DSTATE_SLICE_TABLE_STATE_POINTERS", decode_3dstate_slice_table_state_pointers },
881 { "MI_LOAD_REGISTER_IMM", decode_load_register_imm }
882 };
883
884 void
885 gen_print_batch(struct gen_batch_decode_ctx *ctx,
886 const uint32_t *batch, uint32_t batch_size,
887 uint64_t batch_addr, bool from_ring)
888 {
889 const uint32_t *p, *end = batch + batch_size / sizeof(uint32_t);
890 int length;
891 struct gen_group *inst;
892 const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
893
894 if (ctx->n_batch_buffer_start >= 100) {
895 fprintf(ctx->fp, "%s0x%08"PRIx64": Max batch buffer jumps exceeded%s\n",
896 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
897 (ctx->flags & GEN_BATCH_DECODE_OFFSETS) ? batch_addr : 0,
898 reset_color);
899 return;
900 }
901
902 ctx->n_batch_buffer_start++;
903
904 for (p = batch; p < end; p += length) {
905 inst = gen_ctx_find_instruction(ctx, p);
906 length = gen_group_get_length(inst, p);
907 assert(inst == NULL || length > 0);
908 length = MAX2(1, length);
909
910 uint64_t offset;
911 if (ctx->flags & GEN_BATCH_DECODE_OFFSETS)
912 offset = batch_addr + ((char *)p - (char *)batch);
913 else
914 offset = 0;
915
916 if (inst == NULL) {
917 fprintf(ctx->fp, "%s0x%08"PRIx64": unknown instruction %08x%s\n",
918 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
919 offset, p[0], reset_color);
920 continue;
921 }
922
923 const char *color;
924 const char *inst_name = gen_group_get_name(inst);
925 if (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) {
926 reset_color = NORMAL;
927 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
928 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0 ||
929 strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0)
930 color = GREEN_HEADER;
931 else
932 color = BLUE_HEADER;
933 } else {
934 color = NORMAL;
935 }
936 } else {
937 color = "";
938 reset_color = "";
939 }
940
941 fprintf(ctx->fp, "%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
942 color, offset, p[0], inst_name, reset_color);
943
944 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
945 ctx_print_group(ctx, inst, offset, p);
946
947 for (int i = 0; i < ARRAY_SIZE(custom_decoders); i++) {
948 if (strcmp(inst_name, custom_decoders[i].cmd_name) == 0) {
949 custom_decoders[i].decode(ctx, p);
950 break;
951 }
952 }
953 }
954
955 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0) {
956 uint64_t next_batch_addr = 0;
957 bool ppgtt = false;
958 bool second_level = false;
959 struct gen_field_iterator iter;
960 gen_field_iterator_init(&iter, inst, p, 0, false);
961 while (gen_field_iterator_next(&iter)) {
962 if (strcmp(iter.name, "Batch Buffer Start Address") == 0) {
963 next_batch_addr = iter.raw_value;
964 } else if (strcmp(iter.name, "Second Level Batch Buffer") == 0) {
965 second_level = iter.raw_value;
966 } else if (strcmp(iter.name, "Address Space Indicator") == 0) {
967 ppgtt = iter.raw_value;
968 }
969 }
970
971 struct gen_batch_decode_bo next_batch = ctx_get_bo(ctx, ppgtt, next_batch_addr);
972
973 if (next_batch.map == NULL) {
974 fprintf(ctx->fp, "Secondary batch at 0x%08"PRIx64" unavailable\n",
975 next_batch_addr);
976 } else {
977 gen_print_batch(ctx, next_batch.map, next_batch.size,
978 next_batch.addr, false);
979 }
980 if (second_level) {
981 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts
982 * like a subroutine call. Commands that come afterwards get
983 * processed once the 2nd level batch buffer returns with
984 * MI_BATCH_BUFFER_END.
985 */
986 continue;
987 } else if (!from_ring) {
988 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts
989 * like a goto. Nothing after it will ever get processed. In
990 * order to prevent the recursion from growing, we just reset the
991 * loop and continue;
992 */
993 break;
994 }
995 } else if (strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0) {
996 break;
997 }
998 }
999
1000 ctx->n_batch_buffer_start--;
1001 }