2 * Copyright © 2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "common/gen_decoder.h"
25 #include "gen_disasm.h"
30 gen_batch_decode_ctx_init(struct gen_batch_decode_ctx
*ctx
,
31 const struct gen_device_info
*devinfo
,
32 FILE *fp
, enum gen_batch_decode_flags flags
,
34 struct gen_batch_decode_bo (*get_bo
)(void *,
36 unsigned (*get_state_size
)(void *, uint32_t),
39 memset(ctx
, 0, sizeof(*ctx
));
42 ctx
->get_state_size
= get_state_size
;
43 ctx
->user_data
= user_data
;
46 ctx
->max_vbo_decoded_lines
= -1; /* No limit! */
49 ctx
->spec
= gen_spec_load(devinfo
);
51 ctx
->spec
= gen_spec_load_from_path(devinfo
, xml_path
);
52 ctx
->disasm
= gen_disasm_create(devinfo
);
56 gen_batch_decode_ctx_finish(struct gen_batch_decode_ctx
*ctx
)
58 gen_spec_destroy(ctx
->spec
);
59 gen_disasm_destroy(ctx
->disasm
);
63 #define RED_COLOR CSI "31m"
64 #define BLUE_HEADER CSI "0;44m"
65 #define GREEN_HEADER CSI "1;42m"
66 #define NORMAL CSI "0m"
68 #define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0])
71 ctx_print_group(struct gen_batch_decode_ctx
*ctx
,
72 struct gen_group
*group
,
73 uint64_t address
, const void *map
)
75 gen_print_group(ctx
->fp
, group
, address
, map
, 0,
76 (ctx
->flags
& GEN_BATCH_DECODE_IN_COLOR
) != 0);
79 static struct gen_batch_decode_bo
80 ctx_get_bo(struct gen_batch_decode_ctx
*ctx
, uint64_t addr
)
82 if (gen_spec_get_gen(ctx
->spec
) >= gen_make_gen(8,0)) {
83 /* On Broadwell and above, we have 48-bit addresses which consume two
84 * dwords. Some packets require that these get stored in a "canonical
85 * form" which means that bit 47 is sign-extended through the upper
86 * bits. In order to correctly handle those aub dumps, we need to mask
87 * off the top 16 bits.
89 addr
&= (~0ull >> 16);
92 struct gen_batch_decode_bo bo
= ctx
->get_bo(ctx
->user_data
, addr
);
94 if (gen_spec_get_gen(ctx
->spec
) >= gen_make_gen(8,0))
95 bo
.addr
&= (~0ull >> 16);
97 /* We may actually have an offset into the bo */
99 assert(bo
.addr
<= addr
);
100 uint64_t offset
= addr
- bo
.addr
;
110 update_count(struct gen_batch_decode_ctx
*ctx
,
111 uint32_t offset_from_dsba
,
112 unsigned element_dwords
,
117 if (ctx
->get_state_size
)
118 size
= ctx
->get_state_size(ctx
->user_data
, offset_from_dsba
);
121 return size
/ (sizeof(uint32_t) * element_dwords
);
123 /* In the absence of any information, just guess arbitrarily. */
128 ctx_disassemble_program(struct gen_batch_decode_ctx
*ctx
,
129 uint32_t ksp
, const char *type
)
131 if (!ctx
->instruction_base
.map
)
134 printf("\nReferenced %s:\n", type
);
135 gen_disasm_disassemble(ctx
->disasm
,
136 (void *)ctx
->instruction_base
.map
, ksp
,
140 /* Heuristic to determine whether a uint32_t is probably actually a float
141 * (http://stackoverflow.com/a/2953466)
145 probably_float(uint32_t bits
)
147 int exp
= ((bits
& 0x7f800000U
) >> 23) - 127;
148 uint32_t mant
= bits
& 0x007fffff;
151 if (exp
== -127 && mant
== 0)
154 /* +- 1 billionth to 1 billion */
155 if (-30 <= exp
&& exp
<= 30)
158 /* some value with only a few binary digits */
159 if ((mant
& 0x0000ffff) == 0)
166 ctx_print_buffer(struct gen_batch_decode_ctx
*ctx
,
167 struct gen_batch_decode_bo bo
,
168 uint32_t read_length
,
172 const uint32_t *dw_end
= bo
.map
+ MIN2(bo
.size
, read_length
);
174 int column_count
= 0, line_count
= -1;
175 for (const uint32_t *dw
= bo
.map
; dw
< dw_end
; dw
++) {
176 if (column_count
* 4 == pitch
|| column_count
== 8) {
177 fprintf(ctx
->fp
, "\n");
181 if (max_lines
>= 0 && line_count
>= max_lines
)
184 fprintf(ctx
->fp
, column_count
== 0 ? " " : " ");
186 if ((ctx
->flags
& GEN_BATCH_DECODE_FLOATS
) && probably_float(*dw
))
187 fprintf(ctx
->fp
, " %8.2f", *(float *) dw
);
189 fprintf(ctx
->fp
, " 0x%08x", *dw
);
193 fprintf(ctx
->fp
, "\n");
197 handle_state_base_address(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
)
199 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
201 struct gen_field_iterator iter
;
202 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
204 while (gen_field_iterator_next(&iter
)) {
205 if (strcmp(iter
.name
, "Surface State Base Address") == 0) {
206 ctx
->surface_base
= ctx_get_bo(ctx
, iter
.raw_value
);
207 } else if (strcmp(iter
.name
, "Dynamic State Base Address") == 0) {
208 ctx
->dynamic_base
= ctx_get_bo(ctx
, iter
.raw_value
);
209 } else if (strcmp(iter
.name
, "Instruction Base Address") == 0) {
210 ctx
->instruction_base
= ctx_get_bo(ctx
, iter
.raw_value
);
216 dump_binding_table(struct gen_batch_decode_ctx
*ctx
, uint32_t offset
, int count
)
218 struct gen_group
*strct
=
219 gen_spec_find_struct(ctx
->spec
, "RENDER_SURFACE_STATE");
221 fprintf(ctx
->fp
, "did not find RENDER_SURFACE_STATE info\n");
226 count
= update_count(ctx
, offset
, 1, 8);
228 if (ctx
->surface_base
.map
== NULL
) {
229 fprintf(ctx
->fp
, " binding table unavailable\n");
233 if (offset
% 32 != 0 || offset
>= UINT16_MAX
||
234 offset
>= ctx
->surface_base
.size
) {
235 fprintf(ctx
->fp
, " invalid binding table pointer\n");
239 const uint32_t *pointers
= ctx
->surface_base
.map
+ offset
;
240 for (int i
= 0; i
< count
; i
++) {
241 if (pointers
[i
] == 0)
244 if (pointers
[i
] % 32 != 0 ||
245 (pointers
[i
] + strct
->dw_length
* 4) >= ctx
->surface_base
.size
) {
246 fprintf(ctx
->fp
, "pointer %u: %08x <not valid>\n", i
, pointers
[i
]);
250 fprintf(ctx
->fp
, "pointer %u: %08x\n", i
, pointers
[i
]);
251 ctx_print_group(ctx
, strct
, ctx
->surface_base
.addr
+ pointers
[i
],
252 ctx
->surface_base
.map
+ pointers
[i
]);
257 dump_samplers(struct gen_batch_decode_ctx
*ctx
, uint32_t offset
, int count
)
259 struct gen_group
*strct
= gen_spec_find_struct(ctx
->spec
, "SAMPLER_STATE");
262 count
= update_count(ctx
, offset
, strct
->dw_length
, 4);
264 if (ctx
->dynamic_base
.map
== NULL
) {
265 fprintf(ctx
->fp
, " samplers unavailable\n");
269 if (offset
% 32 != 0 || offset
>= ctx
->dynamic_base
.size
) {
270 fprintf(ctx
->fp
, " invalid sampler state pointer\n");
274 uint64_t state_addr
= ctx
->dynamic_base
.addr
+ offset
;
275 const void *state_map
= ctx
->dynamic_base
.map
+ offset
;
276 for (int i
= 0; i
< count
; i
++) {
277 fprintf(ctx
->fp
, "sampler state %d\n", i
);
278 ctx_print_group(ctx
, strct
, state_addr
, state_map
);
285 handle_media_interface_descriptor_load(struct gen_batch_decode_ctx
*ctx
,
288 if (ctx
->dynamic_base
.map
== NULL
)
291 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
292 struct gen_group
*desc
=
293 gen_spec_find_struct(ctx
->spec
, "INTERFACE_DESCRIPTOR_DATA");
295 struct gen_field_iterator iter
;
296 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
297 uint32_t descriptor_offset
= 0;
298 int descriptor_count
= 0;
299 while (gen_field_iterator_next(&iter
)) {
300 if (strcmp(iter
.name
, "Interface Descriptor Data Start Address") == 0) {
301 descriptor_offset
= strtol(iter
.value
, NULL
, 16);
302 } else if (strcmp(iter
.name
, "Interface Descriptor Total Length") == 0) {
304 strtol(iter
.value
, NULL
, 16) / (desc
->dw_length
* 4);
308 uint64_t desc_addr
= ctx
->dynamic_base
.addr
+ descriptor_offset
;
309 const uint32_t *desc_map
= ctx
->dynamic_base
.map
+ descriptor_offset
;
310 for (int i
= 0; i
< descriptor_count
; i
++) {
311 fprintf(ctx
->fp
, "descriptor %d: %08x\n", i
, descriptor_offset
);
313 ctx_print_group(ctx
, desc
, desc_addr
, desc_map
);
315 gen_field_iterator_init(&iter
, desc
, desc_map
, 0, false);
317 uint32_t sampler_offset
, sampler_count
;
318 uint32_t binding_table_offset
, binding_entry_count
;
319 while (gen_field_iterator_next(&iter
)) {
320 if (strcmp(iter
.name
, "Kernel Start Pointer") == 0) {
321 ksp
= strtoll(iter
.value
, NULL
, 16);
322 } else if (strcmp(iter
.name
, "Sampler State Pointer") == 0) {
323 sampler_offset
= strtol(iter
.value
, NULL
, 16);
324 } else if (strcmp(iter
.name
, "Sampler Count") == 0) {
325 sampler_count
= strtol(iter
.value
, NULL
, 10);
326 } else if (strcmp(iter
.name
, "Binding Table Pointer") == 0) {
327 binding_table_offset
= strtol(iter
.value
, NULL
, 16);
328 } else if (strcmp(iter
.name
, "Binding Table Entry Count") == 0) {
329 binding_entry_count
= strtol(iter
.value
, NULL
, 10);
333 ctx_disassemble_program(ctx
, ksp
, "compute shader");
336 dump_samplers(ctx
, sampler_offset
, sampler_count
);
337 dump_binding_table(ctx
, binding_table_offset
, binding_entry_count
);
339 desc_map
+= desc
->dw_length
;
340 desc_addr
+= desc
->dw_length
* 4;
345 handle_3dstate_vertex_buffers(struct gen_batch_decode_ctx
*ctx
,
348 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
349 struct gen_group
*vbs
= gen_spec_find_struct(ctx
->spec
, "VERTEX_BUFFER_STATE");
351 struct gen_batch_decode_bo vb
= {};
352 uint32_t vb_size
= 0;
357 struct gen_field_iterator iter
;
358 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
359 while (gen_field_iterator_next(&iter
)) {
360 if (iter
.struct_desc
!= vbs
)
363 struct gen_field_iterator vbs_iter
;
364 gen_field_iterator_init(&vbs_iter
, vbs
, &iter
.p
[iter
.start_bit
/ 32], 0, false);
365 while (gen_field_iterator_next(&vbs_iter
)) {
366 if (strcmp(vbs_iter
.name
, "Vertex Buffer Index") == 0) {
367 index
= vbs_iter
.raw_value
;
368 } else if (strcmp(vbs_iter
.name
, "Buffer Pitch") == 0) {
369 pitch
= vbs_iter
.raw_value
;
370 } else if (strcmp(vbs_iter
.name
, "Buffer Starting Address") == 0) {
371 vb
= ctx_get_bo(ctx
, vbs_iter
.raw_value
);
372 } else if (strcmp(vbs_iter
.name
, "Buffer Size") == 0) {
373 vb_size
= vbs_iter
.raw_value
;
375 } else if (strcmp(vbs_iter
.name
, "End Address") == 0) {
376 if (vb
.map
&& vbs_iter
.raw_value
>= vb
.addr
)
377 vb_size
= vbs_iter
.raw_value
- vb
.addr
;
386 fprintf(ctx
->fp
, "vertex buffer %d, size %d\n", index
, vb_size
);
388 if (vb
.map
== NULL
) {
389 fprintf(ctx
->fp
, " buffer contents unavailable\n");
393 if (vb
.map
== 0 || vb_size
== 0)
396 ctx_print_buffer(ctx
, vb
, vb_size
, pitch
, ctx
->max_vbo_decoded_lines
);
408 handle_3dstate_index_buffer(struct gen_batch_decode_ctx
*ctx
,
411 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
413 struct gen_batch_decode_bo ib
= {};
414 uint32_t ib_size
= 0;
417 struct gen_field_iterator iter
;
418 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
419 while (gen_field_iterator_next(&iter
)) {
420 if (strcmp(iter
.name
, "Index Format") == 0) {
421 format
= iter
.raw_value
;
422 } else if (strcmp(iter
.name
, "Buffer Starting Address") == 0) {
423 ib
= ctx_get_bo(ctx
, iter
.raw_value
);
424 } else if (strcmp(iter
.name
, "Buffer Size") == 0) {
425 ib_size
= iter
.raw_value
;
429 if (ib
.map
== NULL
) {
430 fprintf(ctx
->fp
, " buffer contents unavailable\n");
434 const void *m
= ib
.map
;
435 const void *ib_end
= ib
.map
+ MIN2(ib
.size
, ib_size
);
436 for (int i
= 0; m
< ib_end
&& i
< 10; i
++) {
439 fprintf(ctx
->fp
, "%3d ", *(uint8_t *)m
);
443 fprintf(ctx
->fp
, "%3d ", *(uint16_t *)m
);
447 fprintf(ctx
->fp
, "%3d ", *(uint32_t *)m
);
454 fprintf(ctx
->fp
, "...");
455 fprintf(ctx
->fp
, "\n");
459 decode_single_ksp(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
)
461 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
464 bool is_simd8
= false; /* vertex shaders on Gen8+ only */
465 bool is_enabled
= true;
467 struct gen_field_iterator iter
;
468 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
469 while (gen_field_iterator_next(&iter
)) {
470 if (strcmp(iter
.name
, "Kernel Start Pointer") == 0) {
471 ksp
= iter
.raw_value
;
472 } else if (strcmp(iter
.name
, "SIMD8 Dispatch Enable") == 0) {
473 is_simd8
= iter
.raw_value
;
474 } else if (strcmp(iter
.name
, "Dispatch Mode") == 0) {
475 is_simd8
= strcmp(iter
.value
, "SIMD8") == 0;
476 } else if (strcmp(iter
.name
, "Dispatch Enable") == 0) {
477 is_simd8
= strcmp(iter
.value
, "SIMD8") == 0;
478 } else if (strcmp(iter
.name
, "Enable") == 0) {
479 is_enabled
= iter
.raw_value
;
484 strcmp(inst
->name
, "VS_STATE") == 0 ? "vertex shader" :
485 strcmp(inst
->name
, "GS_STATE") == 0 ? "geometry shader" :
486 strcmp(inst
->name
, "SF_STATE") == 0 ? "strips and fans shader" :
487 strcmp(inst
->name
, "CLIP_STATE") == 0 ? "clip shader" :
488 strcmp(inst
->name
, "3DSTATE_DS") == 0 ? "tessellation evaluation shader" :
489 strcmp(inst
->name
, "3DSTATE_HS") == 0 ? "tessellation control shader" :
490 strcmp(inst
->name
, "3DSTATE_VS") == 0 ? (is_simd8
? "SIMD8 vertex shader" : "vec4 vertex shader") :
491 strcmp(inst
->name
, "3DSTATE_GS") == 0 ? (is_simd8
? "SIMD8 geometry shader" : "vec4 geometry shader") :
495 ctx_disassemble_program(ctx
, ksp
, type
);
501 decode_ps_kernels(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
)
503 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
505 uint64_t ksp
[3] = {0, 0, 0};
506 bool enabled
[3] = {false, false, false};
508 struct gen_field_iterator iter
;
509 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
510 while (gen_field_iterator_next(&iter
)) {
511 if (strncmp(iter
.name
, "Kernel Start Pointer ",
512 strlen("Kernel Start Pointer ")) == 0) {
513 int idx
= iter
.name
[strlen("Kernel Start Pointer ")] - '0';
514 ksp
[idx
] = strtol(iter
.value
, NULL
, 16);
515 } else if (strcmp(iter
.name
, "8 Pixel Dispatch Enable") == 0) {
516 enabled
[0] = strcmp(iter
.value
, "true") == 0;
517 } else if (strcmp(iter
.name
, "16 Pixel Dispatch Enable") == 0) {
518 enabled
[1] = strcmp(iter
.value
, "true") == 0;
519 } else if (strcmp(iter
.name
, "32 Pixel Dispatch Enable") == 0) {
520 enabled
[2] = strcmp(iter
.value
, "true") == 0;
524 /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */
525 if (enabled
[0] + enabled
[1] + enabled
[2] == 1) {
529 } else if (enabled
[2]) {
534 uint64_t tmp
= ksp
[1];
540 ctx_disassemble_program(ctx
, ksp
[0], "SIMD8 fragment shader");
542 ctx_disassemble_program(ctx
, ksp
[1], "SIMD16 fragment shader");
544 ctx_disassemble_program(ctx
, ksp
[2], "SIMD32 fragment shader");
545 fprintf(ctx
->fp
, "\n");
549 decode_3dstate_constant(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
)
551 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
552 struct gen_group
*body
=
553 gen_spec_find_struct(ctx
->spec
, "3DSTATE_CONSTANT_BODY");
555 uint32_t read_length
[4];
556 struct gen_batch_decode_bo buffer
[4];
557 memset(buffer
, 0, sizeof(buffer
));
559 struct gen_field_iterator outer
;
560 gen_field_iterator_init(&outer
, inst
, p
, 0, false);
561 while (gen_field_iterator_next(&outer
)) {
562 if (outer
.struct_desc
!= body
)
565 struct gen_field_iterator iter
;
566 gen_field_iterator_init(&iter
, body
, &outer
.p
[outer
.start_bit
/ 32],
569 while (gen_field_iterator_next(&iter
)) {
571 if (sscanf(iter
.name
, "Read Length[%d]", &idx
) == 1) {
572 read_length
[idx
] = iter
.raw_value
;
573 } else if (sscanf(iter
.name
, "Buffer[%d]", &idx
) == 1) {
574 buffer
[idx
] = ctx_get_bo(ctx
, iter
.raw_value
);
578 for (int i
= 0; i
< 4; i
++) {
579 if (read_length
[i
] == 0 || buffer
[i
].map
== NULL
)
582 unsigned size
= read_length
[i
] * 32;
583 fprintf(ctx
->fp
, "constant buffer %d, size %u\n", i
, size
);
585 ctx_print_buffer(ctx
, buffer
[i
], size
, 0, -1);
591 decode_3dstate_binding_table_pointers(struct gen_batch_decode_ctx
*ctx
,
594 dump_binding_table(ctx
, p
[1], -1);
598 decode_3dstate_sampler_state_pointers(struct gen_batch_decode_ctx
*ctx
,
601 dump_samplers(ctx
, p
[1], -1);
605 decode_3dstate_sampler_state_pointers_gen6(struct gen_batch_decode_ctx
*ctx
,
608 dump_samplers(ctx
, p
[1], -1);
609 dump_samplers(ctx
, p
[2], -1);
610 dump_samplers(ctx
, p
[3], -1);
614 str_ends_with(const char *str
, const char *end
)
616 int offset
= strlen(str
) - strlen(end
);
620 return strcmp(str
+ offset
, end
) == 0;
624 decode_dynamic_state_pointers(struct gen_batch_decode_ctx
*ctx
,
625 const char *struct_type
, const uint32_t *p
,
628 if (ctx
->dynamic_base
.map
== NULL
) {
629 fprintf(ctx
->fp
, " dynamic %s state unavailable\n", struct_type
);
633 struct gen_group
*inst
= gen_spec_find_instruction(ctx
->spec
, p
);
634 struct gen_group
*state
= gen_spec_find_struct(ctx
->spec
, struct_type
);
636 uint32_t state_offset
;
638 struct gen_field_iterator iter
;
639 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
640 while (gen_field_iterator_next(&iter
)) {
641 if (str_ends_with(iter
.name
, "Pointer")) {
642 state_offset
= iter
.raw_value
;
647 uint32_t state_addr
= ctx
->dynamic_base
.addr
+ state_offset
;
648 const uint32_t *state_map
= ctx
->dynamic_base
.map
+ state_offset
;
649 for (int i
= 0; i
< count
; i
++) {
650 fprintf(ctx
->fp
, "%s %d\n", struct_type
, i
);
651 ctx_print_group(ctx
, state
, state_offset
, state_map
);
653 state_addr
+= state
->dw_length
* 4;
654 state_map
+= state
->dw_length
;
659 decode_3dstate_viewport_state_pointers_cc(struct gen_batch_decode_ctx
*ctx
,
662 decode_dynamic_state_pointers(ctx
, "CC_VIEWPORT", p
, 4);
666 decode_3dstate_viewport_state_pointers_sf_clip(struct gen_batch_decode_ctx
*ctx
,
669 decode_dynamic_state_pointers(ctx
, "SF_CLIP_VIEWPORT", p
, 4);
673 decode_3dstate_blend_state_pointers(struct gen_batch_decode_ctx
*ctx
,
676 decode_dynamic_state_pointers(ctx
, "BLEND_STATE", p
, 1);
680 decode_3dstate_cc_state_pointers(struct gen_batch_decode_ctx
*ctx
,
683 decode_dynamic_state_pointers(ctx
, "COLOR_CALC_STATE", p
, 1);
687 decode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx
*ctx
,
690 decode_dynamic_state_pointers(ctx
, "SCISSOR_RECT", p
, 1);
694 decode_load_register_imm(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
)
696 struct gen_group
*reg
= gen_spec_find_register(ctx
->spec
, p
[1]);
699 fprintf(ctx
->fp
, "register %s (0x%x): 0x%x\n",
700 reg
->name
, reg
->register_offset
, p
[2]);
701 ctx_print_group(ctx
, reg
, reg
->register_offset
, &p
[2]);
705 struct custom_decoder
{
706 const char *cmd_name
;
707 void (*decode
)(struct gen_batch_decode_ctx
*ctx
, const uint32_t *p
);
708 } custom_decoders
[] = {
709 { "STATE_BASE_ADDRESS", handle_state_base_address
},
710 { "MEDIA_INTERFACE_DESCRIPTOR_LOAD", handle_media_interface_descriptor_load
},
711 { "3DSTATE_VERTEX_BUFFERS", handle_3dstate_vertex_buffers
},
712 { "3DSTATE_INDEX_BUFFER", handle_3dstate_index_buffer
},
713 { "3DSTATE_VS", decode_single_ksp
},
714 { "3DSTATE_GS", decode_single_ksp
},
715 { "3DSTATE_DS", decode_single_ksp
},
716 { "3DSTATE_HS", decode_single_ksp
},
717 { "3DSTATE_PS", decode_ps_kernels
},
718 { "3DSTATE_CONSTANT_VS", decode_3dstate_constant
},
719 { "3DSTATE_CONSTANT_GS", decode_3dstate_constant
},
720 { "3DSTATE_CONSTANT_PS", decode_3dstate_constant
},
721 { "3DSTATE_CONSTANT_HS", decode_3dstate_constant
},
722 { "3DSTATE_CONSTANT_DS", decode_3dstate_constant
},
724 { "3DSTATE_BINDING_TABLE_POINTERS_VS", decode_3dstate_binding_table_pointers
},
725 { "3DSTATE_BINDING_TABLE_POINTERS_HS", decode_3dstate_binding_table_pointers
},
726 { "3DSTATE_BINDING_TABLE_POINTERS_DS", decode_3dstate_binding_table_pointers
},
727 { "3DSTATE_BINDING_TABLE_POINTERS_GS", decode_3dstate_binding_table_pointers
},
728 { "3DSTATE_BINDING_TABLE_POINTERS_PS", decode_3dstate_binding_table_pointers
},
730 { "3DSTATE_SAMPLER_STATE_POINTERS_VS", decode_3dstate_sampler_state_pointers
},
731 { "3DSTATE_SAMPLER_STATE_POINTERS_HS", decode_3dstate_sampler_state_pointers
},
732 { "3DSTATE_SAMPLER_STATE_POINTERS_DS", decode_3dstate_sampler_state_pointers
},
733 { "3DSTATE_SAMPLER_STATE_POINTERS_GS", decode_3dstate_sampler_state_pointers
},
734 { "3DSTATE_SAMPLER_STATE_POINTERS_PS", decode_3dstate_sampler_state_pointers
},
735 { "3DSTATE_SAMPLER_STATE_POINTERS", decode_3dstate_sampler_state_pointers_gen6
},
737 { "3DSTATE_VIEWPORT_STATE_POINTERS_CC", decode_3dstate_viewport_state_pointers_cc
},
738 { "3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP", decode_3dstate_viewport_state_pointers_sf_clip
},
739 { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers
},
740 { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers
},
741 { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers
},
742 { "MI_LOAD_REGISTER_IMM", decode_load_register_imm
}
745 static inline uint64_t
746 get_address(struct gen_spec
*spec
, const uint32_t *p
)
748 /* Addresses are always guaranteed to be page-aligned and sometimes
749 * hardware packets have extra stuff stuffed in the bottom 12 bits.
751 uint64_t addr
= p
[0] & ~0xfffu
;
753 if (gen_spec_get_gen(spec
) >= gen_make_gen(8,0)) {
754 /* On Broadwell and above, we have 48-bit addresses which consume two
755 * dwords. Some packets require that these get stored in a "canonical
756 * form" which means that bit 47 is sign-extended through the upper
757 * bits. In order to correctly handle those aub dumps, we need to mask
758 * off the top 16 bits.
760 addr
|= ((uint64_t)p
[1] & 0xffff) << 32;
767 gen_print_batch(struct gen_batch_decode_ctx
*ctx
,
768 const uint32_t *batch
, uint32_t batch_size
,
771 const uint32_t *p
, *end
= batch
+ batch_size
;
773 struct gen_group
*inst
;
775 for (p
= batch
; p
< end
; p
+= length
) {
776 inst
= gen_spec_find_instruction(ctx
->spec
, p
);
777 length
= gen_group_get_length(inst
, p
);
778 assert(inst
== NULL
|| length
> 0);
779 length
= MAX2(1, length
);
781 const char *reset_color
= ctx
->flags
& GEN_BATCH_DECODE_IN_COLOR
? NORMAL
: "";
784 if (ctx
->flags
& GEN_BATCH_DECODE_OFFSETS
)
785 offset
= batch_addr
+ ((char *)p
- (char *)batch
);
790 fprintf(ctx
->fp
, "%s0x%08"PRIx64
": unknown instruction %08x%s\n",
791 (ctx
->flags
& GEN_BATCH_DECODE_IN_COLOR
) ? RED_COLOR
: "",
792 offset
, p
[0], reset_color
);
797 const char *inst_name
= gen_group_get_name(inst
);
798 if (ctx
->flags
& GEN_BATCH_DECODE_IN_COLOR
) {
799 reset_color
= NORMAL
;
800 if (ctx
->flags
& GEN_BATCH_DECODE_FULL
) {
801 if (strcmp(inst_name
, "MI_BATCH_BUFFER_START") == 0 ||
802 strcmp(inst_name
, "MI_BATCH_BUFFER_END") == 0)
803 color
= GREEN_HEADER
;
814 fprintf(ctx
->fp
, "%s0x%08"PRIx64
": 0x%08x: %-80s%s\n",
815 color
, offset
, p
[0], inst_name
, reset_color
);
817 if (ctx
->flags
& GEN_BATCH_DECODE_FULL
) {
818 ctx_print_group(ctx
, inst
, offset
, p
);
820 for (int i
= 0; i
< ARRAY_LENGTH(custom_decoders
); i
++) {
821 if (strcmp(inst_name
, custom_decoders
[i
].cmd_name
) == 0) {
822 custom_decoders
[i
].decode(ctx
, p
);
828 if (strcmp(inst_name
, "MI_BATCH_BUFFER_START") == 0) {
829 struct gen_batch_decode_bo next_batch
;
831 struct gen_field_iterator iter
;
832 gen_field_iterator_init(&iter
, inst
, p
, 0, false);
833 while (gen_field_iterator_next(&iter
)) {
834 if (strcmp(iter
.name
, "Batch Buffer Start Address") == 0) {
835 next_batch
= ctx_get_bo(ctx
, iter
.raw_value
);
836 } else if (strcmp(iter
.name
, "Second Level Batch Buffer") == 0) {
837 second_level
= iter
.raw_value
;
841 if (next_batch
.map
== NULL
) {
842 fprintf(ctx
->fp
, "Secondary batch at 0x%08"PRIx64
" unavailable",
847 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts
848 * like a subroutine call. Commands that come afterwards get
849 * processed once the 2nd level batch buffer returns with
850 * MI_BATCH_BUFFER_END.
852 if (next_batch
.map
) {
853 gen_print_batch(ctx
, next_batch
.map
, next_batch
.size
,
857 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts
858 * like a goto. Nothing after it will ever get processed. In
859 * order to prevent the recursion from growing, we just reset the
862 if (next_batch
.map
) {
864 end
= next_batch
.map
+ next_batch
.size
;
868 /* Nothing we can do */
872 } else if (strcmp(inst_name
, "MI_BATCH_BUFFER_END") == 0) {