intel: decoder: limit to the number decoded lines from VBO
[mesa.git] / src / intel / common / gen_batch_decoder.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "common/gen_decoder.h"
25 #include "gen_disasm.h"
26
27 #include <string.h>
28
29 void
30 gen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx,
31 const struct gen_device_info *devinfo,
32 FILE *fp, enum gen_batch_decode_flags flags,
33 const char *xml_path,
34 struct gen_batch_decode_bo (*get_bo)(void *,
35 uint64_t),
36 unsigned (*get_state_size)(void *, uint32_t),
37 void *user_data)
38 {
39 memset(ctx, 0, sizeof(*ctx));
40
41 ctx->get_bo = get_bo;
42 ctx->get_state_size = get_state_size;
43 ctx->user_data = user_data;
44 ctx->fp = fp;
45 ctx->flags = flags;
46 ctx->max_vbo_decoded_lines = -1; /* No limit! */
47
48 if (xml_path == NULL)
49 ctx->spec = gen_spec_load(devinfo);
50 else
51 ctx->spec = gen_spec_load_from_path(devinfo, xml_path);
52 ctx->disasm = gen_disasm_create(devinfo);
53 }
54
55 void
56 gen_batch_decode_ctx_finish(struct gen_batch_decode_ctx *ctx)
57 {
58 gen_spec_destroy(ctx->spec);
59 gen_disasm_destroy(ctx->disasm);
60 }
61
62 #define CSI "\e["
63 #define RED_COLOR CSI "31m"
64 #define BLUE_HEADER CSI "0;44m"
65 #define GREEN_HEADER CSI "1;42m"
66 #define NORMAL CSI "0m"
67
68 #define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0])
69
70 static void
71 ctx_print_group(struct gen_batch_decode_ctx *ctx,
72 struct gen_group *group,
73 uint64_t address, const void *map)
74 {
75 gen_print_group(ctx->fp, group, address, map, 0,
76 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) != 0);
77 }
78
79 static struct gen_batch_decode_bo
80 ctx_get_bo(struct gen_batch_decode_ctx *ctx, uint64_t addr)
81 {
82 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0)) {
83 /* On Broadwell and above, we have 48-bit addresses which consume two
84 * dwords. Some packets require that these get stored in a "canonical
85 * form" which means that bit 47 is sign-extended through the upper
86 * bits. In order to correctly handle those aub dumps, we need to mask
87 * off the top 16 bits.
88 */
89 addr &= (~0ull >> 16);
90 }
91
92 struct gen_batch_decode_bo bo = ctx->get_bo(ctx->user_data, addr);
93
94 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0))
95 bo.addr &= (~0ull >> 16);
96
97 /* We may actually have an offset into the bo */
98 if (bo.map != NULL) {
99 assert(bo.addr <= addr);
100 uint64_t offset = addr - bo.addr;
101 bo.map += offset;
102 bo.addr += offset;
103 bo.size -= offset;
104 }
105
106 return bo;
107 }
108
109 static int
110 update_count(struct gen_batch_decode_ctx *ctx,
111 uint32_t offset_from_dsba,
112 unsigned element_dwords,
113 unsigned guess)
114 {
115 unsigned size = 0;
116
117 if (ctx->get_state_size)
118 size = ctx->get_state_size(ctx->user_data, offset_from_dsba);
119
120 if (size > 0)
121 return size / (sizeof(uint32_t) * element_dwords);
122
123 /* In the absence of any information, just guess arbitrarily. */
124 return guess;
125 }
126
127 static void
128 ctx_disassemble_program(struct gen_batch_decode_ctx *ctx,
129 uint32_t ksp, const char *type)
130 {
131 if (!ctx->instruction_base.map)
132 return;
133
134 printf("\nReferenced %s:\n", type);
135 gen_disasm_disassemble(ctx->disasm,
136 (void *)ctx->instruction_base.map, ksp,
137 ctx->fp);
138 }
139
140 /* Heuristic to determine whether a uint32_t is probably actually a float
141 * (http://stackoverflow.com/a/2953466)
142 */
143
144 static bool
145 probably_float(uint32_t bits)
146 {
147 int exp = ((bits & 0x7f800000U) >> 23) - 127;
148 uint32_t mant = bits & 0x007fffff;
149
150 /* +- 0.0 */
151 if (exp == -127 && mant == 0)
152 return true;
153
154 /* +- 1 billionth to 1 billion */
155 if (-30 <= exp && exp <= 30)
156 return true;
157
158 /* some value with only a few binary digits */
159 if ((mant & 0x0000ffff) == 0)
160 return true;
161
162 return false;
163 }
164
165 static void
166 ctx_print_buffer(struct gen_batch_decode_ctx *ctx,
167 struct gen_batch_decode_bo bo,
168 uint32_t read_length,
169 uint32_t pitch,
170 int max_lines)
171 {
172 const uint32_t *dw_end = bo.map + MIN2(bo.size, read_length);
173
174 int column_count = 0, line_count = -1;
175 for (const uint32_t *dw = bo.map; dw < dw_end; dw++) {
176 if (column_count * 4 == pitch || column_count == 8) {
177 fprintf(ctx->fp, "\n");
178 column_count = 0;
179 line_count++;
180
181 if (max_lines >= 0 && line_count >= max_lines)
182 break;
183 }
184 fprintf(ctx->fp, column_count == 0 ? " " : " ");
185
186 if ((ctx->flags & GEN_BATCH_DECODE_FLOATS) && probably_float(*dw))
187 fprintf(ctx->fp, " %8.2f", *(float *) dw);
188 else
189 fprintf(ctx->fp, " 0x%08x", *dw);
190
191 column_count++;
192 }
193 fprintf(ctx->fp, "\n");
194 }
195
196 static void
197 handle_state_base_address(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
198 {
199 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
200
201 struct gen_field_iterator iter;
202 gen_field_iterator_init(&iter, inst, p, 0, false);
203
204 while (gen_field_iterator_next(&iter)) {
205 if (strcmp(iter.name, "Surface State Base Address") == 0) {
206 ctx->surface_base = ctx_get_bo(ctx, iter.raw_value);
207 } else if (strcmp(iter.name, "Dynamic State Base Address") == 0) {
208 ctx->dynamic_base = ctx_get_bo(ctx, iter.raw_value);
209 } else if (strcmp(iter.name, "Instruction Base Address") == 0) {
210 ctx->instruction_base = ctx_get_bo(ctx, iter.raw_value);
211 }
212 }
213 }
214
215 static void
216 dump_binding_table(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
217 {
218 struct gen_group *strct =
219 gen_spec_find_struct(ctx->spec, "RENDER_SURFACE_STATE");
220 if (strct == NULL) {
221 fprintf(ctx->fp, "did not find RENDER_SURFACE_STATE info\n");
222 return;
223 }
224
225 if (count < 0)
226 count = update_count(ctx, offset, 1, 8);
227
228 if (ctx->surface_base.map == NULL) {
229 fprintf(ctx->fp, " binding table unavailable\n");
230 return;
231 }
232
233 if (offset % 32 != 0 || offset >= UINT16_MAX ||
234 offset >= ctx->surface_base.size) {
235 fprintf(ctx->fp, " invalid binding table pointer\n");
236 return;
237 }
238
239 const uint32_t *pointers = ctx->surface_base.map + offset;
240 for (int i = 0; i < count; i++) {
241 if (pointers[i] == 0)
242 continue;
243
244 if (pointers[i] % 32 != 0 ||
245 (pointers[i] + strct->dw_length * 4) >= ctx->surface_base.size) {
246 fprintf(ctx->fp, "pointer %u: %08x <not valid>\n", i, pointers[i]);
247 continue;
248 }
249
250 fprintf(ctx->fp, "pointer %u: %08x\n", i, pointers[i]);
251 ctx_print_group(ctx, strct, ctx->surface_base.addr + pointers[i],
252 ctx->surface_base.map + pointers[i]);
253 }
254 }
255
256 static void
257 dump_samplers(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
258 {
259 struct gen_group *strct = gen_spec_find_struct(ctx->spec, "SAMPLER_STATE");
260
261 if (count < 0)
262 count = update_count(ctx, offset, strct->dw_length, 4);
263
264 if (ctx->dynamic_base.map == NULL) {
265 fprintf(ctx->fp, " samplers unavailable\n");
266 return;
267 }
268
269 if (offset % 32 != 0 || offset >= ctx->dynamic_base.size) {
270 fprintf(ctx->fp, " invalid sampler state pointer\n");
271 return;
272 }
273
274 uint64_t state_addr = ctx->dynamic_base.addr + offset;
275 const void *state_map = ctx->dynamic_base.map + offset;
276 for (int i = 0; i < count; i++) {
277 fprintf(ctx->fp, "sampler state %d\n", i);
278 ctx_print_group(ctx, strct, state_addr, state_map);
279 state_addr += 16;
280 state_map += 16;
281 }
282 }
283
284 static void
285 handle_media_interface_descriptor_load(struct gen_batch_decode_ctx *ctx,
286 const uint32_t *p)
287 {
288 if (ctx->dynamic_base.map == NULL)
289 return;
290
291 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
292 struct gen_group *desc =
293 gen_spec_find_struct(ctx->spec, "INTERFACE_DESCRIPTOR_DATA");
294
295 struct gen_field_iterator iter;
296 gen_field_iterator_init(&iter, inst, p, 0, false);
297 uint32_t descriptor_offset = 0;
298 int descriptor_count = 0;
299 while (gen_field_iterator_next(&iter)) {
300 if (strcmp(iter.name, "Interface Descriptor Data Start Address") == 0) {
301 descriptor_offset = strtol(iter.value, NULL, 16);
302 } else if (strcmp(iter.name, "Interface Descriptor Total Length") == 0) {
303 descriptor_count =
304 strtol(iter.value, NULL, 16) / (desc->dw_length * 4);
305 }
306 }
307
308 uint64_t desc_addr = ctx->dynamic_base.addr + descriptor_offset;
309 const uint32_t *desc_map = ctx->dynamic_base.map + descriptor_offset;
310 for (int i = 0; i < descriptor_count; i++) {
311 fprintf(ctx->fp, "descriptor %d: %08x\n", i, descriptor_offset);
312
313 ctx_print_group(ctx, desc, desc_addr, desc_map);
314
315 gen_field_iterator_init(&iter, desc, desc_map, 0, false);
316 uint64_t ksp;
317 uint32_t sampler_offset, sampler_count;
318 uint32_t binding_table_offset, binding_entry_count;
319 while (gen_field_iterator_next(&iter)) {
320 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
321 ksp = strtoll(iter.value, NULL, 16);
322 } else if (strcmp(iter.name, "Sampler State Pointer") == 0) {
323 sampler_offset = strtol(iter.value, NULL, 16);
324 } else if (strcmp(iter.name, "Sampler Count") == 0) {
325 sampler_count = strtol(iter.value, NULL, 10);
326 } else if (strcmp(iter.name, "Binding Table Pointer") == 0) {
327 binding_table_offset = strtol(iter.value, NULL, 16);
328 } else if (strcmp(iter.name, "Binding Table Entry Count") == 0) {
329 binding_entry_count = strtol(iter.value, NULL, 10);
330 }
331 }
332
333 ctx_disassemble_program(ctx, ksp, "compute shader");
334 printf("\n");
335
336 dump_samplers(ctx, sampler_offset, sampler_count);
337 dump_binding_table(ctx, binding_table_offset, binding_entry_count);
338
339 desc_map += desc->dw_length;
340 desc_addr += desc->dw_length * 4;
341 }
342 }
343
344 static void
345 handle_3dstate_vertex_buffers(struct gen_batch_decode_ctx *ctx,
346 const uint32_t *p)
347 {
348 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
349 struct gen_group *vbs = gen_spec_find_struct(ctx->spec, "VERTEX_BUFFER_STATE");
350
351 struct gen_batch_decode_bo vb = {};
352 uint32_t vb_size = 0;
353 int index = -1;
354 int pitch = -1;
355 bool ready = false;
356
357 struct gen_field_iterator iter;
358 gen_field_iterator_init(&iter, inst, p, 0, false);
359 while (gen_field_iterator_next(&iter)) {
360 if (iter.struct_desc != vbs)
361 continue;
362
363 struct gen_field_iterator vbs_iter;
364 gen_field_iterator_init(&vbs_iter, vbs, &iter.p[iter.start_bit / 32], 0, false);
365 while (gen_field_iterator_next(&vbs_iter)) {
366 if (strcmp(vbs_iter.name, "Vertex Buffer Index") == 0) {
367 index = vbs_iter.raw_value;
368 } else if (strcmp(vbs_iter.name, "Buffer Pitch") == 0) {
369 pitch = vbs_iter.raw_value;
370 } else if (strcmp(vbs_iter.name, "Buffer Starting Address") == 0) {
371 vb = ctx_get_bo(ctx, vbs_iter.raw_value);
372 } else if (strcmp(vbs_iter.name, "Buffer Size") == 0) {
373 vb_size = vbs_iter.raw_value;
374 ready = true;
375 } else if (strcmp(vbs_iter.name, "End Address") == 0) {
376 if (vb.map && vbs_iter.raw_value >= vb.addr)
377 vb_size = vbs_iter.raw_value - vb.addr;
378 else
379 vb_size = 0;
380 ready = true;
381 }
382
383 if (!ready)
384 continue;
385
386 fprintf(ctx->fp, "vertex buffer %d, size %d\n", index, vb_size);
387
388 if (vb.map == NULL) {
389 fprintf(ctx->fp, " buffer contents unavailable\n");
390 continue;
391 }
392
393 if (vb.map == 0 || vb_size == 0)
394 continue;
395
396 ctx_print_buffer(ctx, vb, vb_size, pitch, ctx->max_vbo_decoded_lines);
397
398 vb.map = NULL;
399 vb_size = 0;
400 index = -1;
401 pitch = -1;
402 ready = false;
403 }
404 }
405 }
406
407 static void
408 handle_3dstate_index_buffer(struct gen_batch_decode_ctx *ctx,
409 const uint32_t *p)
410 {
411 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
412
413 struct gen_batch_decode_bo ib = {};
414 uint32_t ib_size = 0;
415 uint32_t format = 0;
416
417 struct gen_field_iterator iter;
418 gen_field_iterator_init(&iter, inst, p, 0, false);
419 while (gen_field_iterator_next(&iter)) {
420 if (strcmp(iter.name, "Index Format") == 0) {
421 format = iter.raw_value;
422 } else if (strcmp(iter.name, "Buffer Starting Address") == 0) {
423 ib = ctx_get_bo(ctx, iter.raw_value);
424 } else if (strcmp(iter.name, "Buffer Size") == 0) {
425 ib_size = iter.raw_value;
426 }
427 }
428
429 if (ib.map == NULL) {
430 fprintf(ctx->fp, " buffer contents unavailable\n");
431 return;
432 }
433
434 const void *m = ib.map;
435 const void *ib_end = ib.map + MIN2(ib.size, ib_size);
436 for (int i = 0; m < ib_end && i < 10; i++) {
437 switch (format) {
438 case 0:
439 fprintf(ctx->fp, "%3d ", *(uint8_t *)m);
440 m += 1;
441 break;
442 case 1:
443 fprintf(ctx->fp, "%3d ", *(uint16_t *)m);
444 m += 2;
445 break;
446 case 2:
447 fprintf(ctx->fp, "%3d ", *(uint32_t *)m);
448 m += 4;
449 break;
450 }
451 }
452
453 if (m < ib_end)
454 fprintf(ctx->fp, "...");
455 fprintf(ctx->fp, "\n");
456 }
457
458 static void
459 decode_single_ksp(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
460 {
461 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
462
463 uint64_t ksp = 0;
464 bool is_simd8 = false; /* vertex shaders on Gen8+ only */
465 bool is_enabled = true;
466
467 struct gen_field_iterator iter;
468 gen_field_iterator_init(&iter, inst, p, 0, false);
469 while (gen_field_iterator_next(&iter)) {
470 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
471 ksp = iter.raw_value;
472 } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) {
473 is_simd8 = iter.raw_value;
474 } else if (strcmp(iter.name, "Dispatch Mode") == 0) {
475 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
476 } else if (strcmp(iter.name, "Dispatch Enable") == 0) {
477 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
478 } else if (strcmp(iter.name, "Enable") == 0) {
479 is_enabled = iter.raw_value;
480 }
481 }
482
483 const char *type =
484 strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" :
485 strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" :
486 strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" :
487 strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" :
488 strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation evaluation shader" :
489 strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation control shader" :
490 strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") :
491 strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") :
492 NULL;
493
494 if (is_enabled) {
495 ctx_disassemble_program(ctx, ksp, type);
496 printf("\n");
497 }
498 }
499
500 static void
501 decode_ps_kernels(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
502 {
503 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
504
505 uint64_t ksp[3] = {0, 0, 0};
506 bool enabled[3] = {false, false, false};
507
508 struct gen_field_iterator iter;
509 gen_field_iterator_init(&iter, inst, p, 0, false);
510 while (gen_field_iterator_next(&iter)) {
511 if (strncmp(iter.name, "Kernel Start Pointer ",
512 strlen("Kernel Start Pointer ")) == 0) {
513 int idx = iter.name[strlen("Kernel Start Pointer ")] - '0';
514 ksp[idx] = strtol(iter.value, NULL, 16);
515 } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) {
516 enabled[0] = strcmp(iter.value, "true") == 0;
517 } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) {
518 enabled[1] = strcmp(iter.value, "true") == 0;
519 } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) {
520 enabled[2] = strcmp(iter.value, "true") == 0;
521 }
522 }
523
524 /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */
525 if (enabled[0] + enabled[1] + enabled[2] == 1) {
526 if (enabled[1]) {
527 ksp[1] = ksp[0];
528 ksp[0] = 0;
529 } else if (enabled[2]) {
530 ksp[2] = ksp[0];
531 ksp[0] = 0;
532 }
533 } else {
534 uint64_t tmp = ksp[1];
535 ksp[1] = ksp[2];
536 ksp[2] = tmp;
537 }
538
539 if (enabled[0])
540 ctx_disassemble_program(ctx, ksp[0], "SIMD8 fragment shader");
541 if (enabled[1])
542 ctx_disassemble_program(ctx, ksp[1], "SIMD16 fragment shader");
543 if (enabled[2])
544 ctx_disassemble_program(ctx, ksp[2], "SIMD32 fragment shader");
545 fprintf(ctx->fp, "\n");
546 }
547
548 static void
549 decode_3dstate_constant(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
550 {
551 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
552 struct gen_group *body =
553 gen_spec_find_struct(ctx->spec, "3DSTATE_CONSTANT_BODY");
554
555 uint32_t read_length[4];
556 struct gen_batch_decode_bo buffer[4];
557 memset(buffer, 0, sizeof(buffer));
558
559 struct gen_field_iterator outer;
560 gen_field_iterator_init(&outer, inst, p, 0, false);
561 while (gen_field_iterator_next(&outer)) {
562 if (outer.struct_desc != body)
563 continue;
564
565 struct gen_field_iterator iter;
566 gen_field_iterator_init(&iter, body, &outer.p[outer.start_bit / 32],
567 0, false);
568
569 while (gen_field_iterator_next(&iter)) {
570 int idx;
571 if (sscanf(iter.name, "Read Length[%d]", &idx) == 1) {
572 read_length[idx] = iter.raw_value;
573 } else if (sscanf(iter.name, "Buffer[%d]", &idx) == 1) {
574 buffer[idx] = ctx_get_bo(ctx, iter.raw_value);
575 }
576 }
577
578 for (int i = 0; i < 4; i++) {
579 if (read_length[i] == 0 || buffer[i].map == NULL)
580 continue;
581
582 unsigned size = read_length[i] * 32;
583 fprintf(ctx->fp, "constant buffer %d, size %u\n", i, size);
584
585 ctx_print_buffer(ctx, buffer[i], size, 0, -1);
586 }
587 }
588 }
589
590 static void
591 decode_3dstate_binding_table_pointers(struct gen_batch_decode_ctx *ctx,
592 const uint32_t *p)
593 {
594 dump_binding_table(ctx, p[1], -1);
595 }
596
597 static void
598 decode_3dstate_sampler_state_pointers(struct gen_batch_decode_ctx *ctx,
599 const uint32_t *p)
600 {
601 dump_samplers(ctx, p[1], -1);
602 }
603
604 static void
605 decode_3dstate_sampler_state_pointers_gen6(struct gen_batch_decode_ctx *ctx,
606 const uint32_t *p)
607 {
608 dump_samplers(ctx, p[1], -1);
609 dump_samplers(ctx, p[2], -1);
610 dump_samplers(ctx, p[3], -1);
611 }
612
613 static bool
614 str_ends_with(const char *str, const char *end)
615 {
616 int offset = strlen(str) - strlen(end);
617 if (offset < 0)
618 return false;
619
620 return strcmp(str + offset, end) == 0;
621 }
622
623 static void
624 decode_dynamic_state_pointers(struct gen_batch_decode_ctx *ctx,
625 const char *struct_type, const uint32_t *p,
626 int count)
627 {
628 if (ctx->dynamic_base.map == NULL) {
629 fprintf(ctx->fp, " dynamic %s state unavailable\n", struct_type);
630 return;
631 }
632
633 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
634 struct gen_group *state = gen_spec_find_struct(ctx->spec, struct_type);
635
636 uint32_t state_offset;
637
638 struct gen_field_iterator iter;
639 gen_field_iterator_init(&iter, inst, p, 0, false);
640 while (gen_field_iterator_next(&iter)) {
641 if (str_ends_with(iter.name, "Pointer")) {
642 state_offset = iter.raw_value;
643 break;
644 }
645 }
646
647 uint32_t state_addr = ctx->dynamic_base.addr + state_offset;
648 const uint32_t *state_map = ctx->dynamic_base.map + state_offset;
649 for (int i = 0; i < count; i++) {
650 fprintf(ctx->fp, "%s %d\n", struct_type, i);
651 ctx_print_group(ctx, state, state_offset, state_map);
652
653 state_addr += state->dw_length * 4;
654 state_map += state->dw_length;
655 }
656 }
657
658 static void
659 decode_3dstate_viewport_state_pointers_cc(struct gen_batch_decode_ctx *ctx,
660 const uint32_t *p)
661 {
662 decode_dynamic_state_pointers(ctx, "CC_VIEWPORT", p, 4);
663 }
664
665 static void
666 decode_3dstate_viewport_state_pointers_sf_clip(struct gen_batch_decode_ctx *ctx,
667 const uint32_t *p)
668 {
669 decode_dynamic_state_pointers(ctx, "SF_CLIP_VIEWPORT", p, 4);
670 }
671
672 static void
673 decode_3dstate_blend_state_pointers(struct gen_batch_decode_ctx *ctx,
674 const uint32_t *p)
675 {
676 decode_dynamic_state_pointers(ctx, "BLEND_STATE", p, 1);
677 }
678
679 static void
680 decode_3dstate_cc_state_pointers(struct gen_batch_decode_ctx *ctx,
681 const uint32_t *p)
682 {
683 decode_dynamic_state_pointers(ctx, "COLOR_CALC_STATE", p, 1);
684 }
685
686 static void
687 decode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx *ctx,
688 const uint32_t *p)
689 {
690 decode_dynamic_state_pointers(ctx, "SCISSOR_RECT", p, 1);
691 }
692
693 static void
694 decode_load_register_imm(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
695 {
696 struct gen_group *reg = gen_spec_find_register(ctx->spec, p[1]);
697
698 if (reg != NULL) {
699 fprintf(ctx->fp, "register %s (0x%x): 0x%x\n",
700 reg->name, reg->register_offset, p[2]);
701 ctx_print_group(ctx, reg, reg->register_offset, &p[2]);
702 }
703 }
704
705 struct custom_decoder {
706 const char *cmd_name;
707 void (*decode)(struct gen_batch_decode_ctx *ctx, const uint32_t *p);
708 } custom_decoders[] = {
709 { "STATE_BASE_ADDRESS", handle_state_base_address },
710 { "MEDIA_INTERFACE_DESCRIPTOR_LOAD", handle_media_interface_descriptor_load },
711 { "3DSTATE_VERTEX_BUFFERS", handle_3dstate_vertex_buffers },
712 { "3DSTATE_INDEX_BUFFER", handle_3dstate_index_buffer },
713 { "3DSTATE_VS", decode_single_ksp },
714 { "3DSTATE_GS", decode_single_ksp },
715 { "3DSTATE_DS", decode_single_ksp },
716 { "3DSTATE_HS", decode_single_ksp },
717 { "3DSTATE_PS", decode_ps_kernels },
718 { "3DSTATE_CONSTANT_VS", decode_3dstate_constant },
719 { "3DSTATE_CONSTANT_GS", decode_3dstate_constant },
720 { "3DSTATE_CONSTANT_PS", decode_3dstate_constant },
721 { "3DSTATE_CONSTANT_HS", decode_3dstate_constant },
722 { "3DSTATE_CONSTANT_DS", decode_3dstate_constant },
723
724 { "3DSTATE_BINDING_TABLE_POINTERS_VS", decode_3dstate_binding_table_pointers },
725 { "3DSTATE_BINDING_TABLE_POINTERS_HS", decode_3dstate_binding_table_pointers },
726 { "3DSTATE_BINDING_TABLE_POINTERS_DS", decode_3dstate_binding_table_pointers },
727 { "3DSTATE_BINDING_TABLE_POINTERS_GS", decode_3dstate_binding_table_pointers },
728 { "3DSTATE_BINDING_TABLE_POINTERS_PS", decode_3dstate_binding_table_pointers },
729
730 { "3DSTATE_SAMPLER_STATE_POINTERS_VS", decode_3dstate_sampler_state_pointers },
731 { "3DSTATE_SAMPLER_STATE_POINTERS_HS", decode_3dstate_sampler_state_pointers },
732 { "3DSTATE_SAMPLER_STATE_POINTERS_DS", decode_3dstate_sampler_state_pointers },
733 { "3DSTATE_SAMPLER_STATE_POINTERS_GS", decode_3dstate_sampler_state_pointers },
734 { "3DSTATE_SAMPLER_STATE_POINTERS_PS", decode_3dstate_sampler_state_pointers },
735 { "3DSTATE_SAMPLER_STATE_POINTERS", decode_3dstate_sampler_state_pointers_gen6 },
736
737 { "3DSTATE_VIEWPORT_STATE_POINTERS_CC", decode_3dstate_viewport_state_pointers_cc },
738 { "3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP", decode_3dstate_viewport_state_pointers_sf_clip },
739 { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers },
740 { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers },
741 { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers },
742 { "MI_LOAD_REGISTER_IMM", decode_load_register_imm }
743 };
744
745 static inline uint64_t
746 get_address(struct gen_spec *spec, const uint32_t *p)
747 {
748 /* Addresses are always guaranteed to be page-aligned and sometimes
749 * hardware packets have extra stuff stuffed in the bottom 12 bits.
750 */
751 uint64_t addr = p[0] & ~0xfffu;
752
753 if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) {
754 /* On Broadwell and above, we have 48-bit addresses which consume two
755 * dwords. Some packets require that these get stored in a "canonical
756 * form" which means that bit 47 is sign-extended through the upper
757 * bits. In order to correctly handle those aub dumps, we need to mask
758 * off the top 16 bits.
759 */
760 addr |= ((uint64_t)p[1] & 0xffff) << 32;
761 }
762
763 return addr;
764 }
765
766 void
767 gen_print_batch(struct gen_batch_decode_ctx *ctx,
768 const uint32_t *batch, uint32_t batch_size,
769 uint64_t batch_addr)
770 {
771 const uint32_t *p, *end = batch + batch_size;
772 int length;
773 struct gen_group *inst;
774
775 for (p = batch; p < end; p += length) {
776 inst = gen_spec_find_instruction(ctx->spec, p);
777 length = gen_group_get_length(inst, p);
778 assert(inst == NULL || length > 0);
779 length = MAX2(1, length);
780
781 const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
782
783 uint64_t offset;
784 if (ctx->flags & GEN_BATCH_DECODE_OFFSETS)
785 offset = batch_addr + ((char *)p - (char *)batch);
786 else
787 offset = 0;
788
789 if (inst == NULL) {
790 fprintf(ctx->fp, "%s0x%08"PRIx64": unknown instruction %08x%s\n",
791 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
792 offset, p[0], reset_color);
793 continue;
794 }
795
796 const char *color;
797 const char *inst_name = gen_group_get_name(inst);
798 if (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) {
799 reset_color = NORMAL;
800 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
801 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0 ||
802 strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0)
803 color = GREEN_HEADER;
804 else
805 color = BLUE_HEADER;
806 } else {
807 color = NORMAL;
808 }
809 } else {
810 color = "";
811 reset_color = "";
812 }
813
814 fprintf(ctx->fp, "%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
815 color, offset, p[0], inst_name, reset_color);
816
817 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
818 ctx_print_group(ctx, inst, offset, p);
819
820 for (int i = 0; i < ARRAY_LENGTH(custom_decoders); i++) {
821 if (strcmp(inst_name, custom_decoders[i].cmd_name) == 0) {
822 custom_decoders[i].decode(ctx, p);
823 break;
824 }
825 }
826 }
827
828 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0) {
829 struct gen_batch_decode_bo next_batch;
830 bool second_level;
831 struct gen_field_iterator iter;
832 gen_field_iterator_init(&iter, inst, p, 0, false);
833 while (gen_field_iterator_next(&iter)) {
834 if (strcmp(iter.name, "Batch Buffer Start Address") == 0) {
835 next_batch = ctx_get_bo(ctx, iter.raw_value);
836 } else if (strcmp(iter.name, "Second Level Batch Buffer") == 0) {
837 second_level = iter.raw_value;
838 }
839 }
840
841 if (next_batch.map == NULL) {
842 fprintf(ctx->fp, "Secondary batch at 0x%08"PRIx64" unavailable",
843 next_batch.addr);
844 }
845
846 if (second_level) {
847 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts
848 * like a subroutine call. Commands that come afterwards get
849 * processed once the 2nd level batch buffer returns with
850 * MI_BATCH_BUFFER_END.
851 */
852 if (next_batch.map) {
853 gen_print_batch(ctx, next_batch.map, next_batch.size,
854 next_batch.addr);
855 }
856 } else {
857 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts
858 * like a goto. Nothing after it will ever get processed. In
859 * order to prevent the recursion from growing, we just reset the
860 * loop and continue;
861 */
862 if (next_batch.map) {
863 p = next_batch.map;
864 end = next_batch.map + next_batch.size;
865 length = 0;
866 continue;
867 } else {
868 /* Nothing we can do */
869 break;
870 }
871 }
872 } else if (strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0) {
873 break;
874 }
875 }
876 }