intel: batch-decoder: don't asks for constant BO until decoding
[mesa.git] / src / intel / common / gen_batch_decoder.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "common/gen_decoder.h"
25 #include "gen_disasm.h"
26
27 #include <string.h>
28
29 void
30 gen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx,
31 const struct gen_device_info *devinfo,
32 FILE *fp, enum gen_batch_decode_flags flags,
33 const char *xml_path,
34 struct gen_batch_decode_bo (*get_bo)(void *,
35 uint64_t),
36 unsigned (*get_state_size)(void *, uint32_t),
37 void *user_data)
38 {
39 memset(ctx, 0, sizeof(*ctx));
40
41 ctx->get_bo = get_bo;
42 ctx->get_state_size = get_state_size;
43 ctx->user_data = user_data;
44 ctx->fp = fp;
45 ctx->flags = flags;
46 ctx->max_vbo_decoded_lines = -1; /* No limit! */
47
48 if (xml_path == NULL)
49 ctx->spec = gen_spec_load(devinfo);
50 else
51 ctx->spec = gen_spec_load_from_path(devinfo, xml_path);
52 ctx->disasm = gen_disasm_create(devinfo);
53 }
54
55 void
56 gen_batch_decode_ctx_finish(struct gen_batch_decode_ctx *ctx)
57 {
58 gen_spec_destroy(ctx->spec);
59 gen_disasm_destroy(ctx->disasm);
60 }
61
62 #define CSI "\e["
63 #define RED_COLOR CSI "31m"
64 #define BLUE_HEADER CSI "0;44m"
65 #define GREEN_HEADER CSI "1;42m"
66 #define NORMAL CSI "0m"
67
68 #define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0])
69
70 static void
71 ctx_print_group(struct gen_batch_decode_ctx *ctx,
72 struct gen_group *group,
73 uint64_t address, const void *map)
74 {
75 gen_print_group(ctx->fp, group, address, map, 0,
76 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) != 0);
77 }
78
79 static struct gen_batch_decode_bo
80 ctx_get_bo(struct gen_batch_decode_ctx *ctx, uint64_t addr)
81 {
82 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0)) {
83 /* On Broadwell and above, we have 48-bit addresses which consume two
84 * dwords. Some packets require that these get stored in a "canonical
85 * form" which means that bit 47 is sign-extended through the upper
86 * bits. In order to correctly handle those aub dumps, we need to mask
87 * off the top 16 bits.
88 */
89 addr &= (~0ull >> 16);
90 }
91
92 struct gen_batch_decode_bo bo = ctx->get_bo(ctx->user_data, addr);
93
94 if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0))
95 bo.addr &= (~0ull >> 16);
96
97 /* We may actually have an offset into the bo */
98 if (bo.map != NULL) {
99 assert(bo.addr <= addr);
100 uint64_t offset = addr - bo.addr;
101 bo.map += offset;
102 bo.addr += offset;
103 bo.size -= offset;
104 }
105
106 return bo;
107 }
108
109 static int
110 update_count(struct gen_batch_decode_ctx *ctx,
111 uint32_t offset_from_dsba,
112 unsigned element_dwords,
113 unsigned guess)
114 {
115 unsigned size = 0;
116
117 if (ctx->get_state_size)
118 size = ctx->get_state_size(ctx->user_data, offset_from_dsba);
119
120 if (size > 0)
121 return size / (sizeof(uint32_t) * element_dwords);
122
123 /* In the absence of any information, just guess arbitrarily. */
124 return guess;
125 }
126
127 static void
128 ctx_disassemble_program(struct gen_batch_decode_ctx *ctx,
129 uint32_t ksp, const char *type)
130 {
131 if (!ctx->instruction_base.map)
132 return;
133
134 printf("\nReferenced %s:\n", type);
135 gen_disasm_disassemble(ctx->disasm,
136 (void *)ctx->instruction_base.map, ksp,
137 ctx->fp);
138 }
139
140 /* Heuristic to determine whether a uint32_t is probably actually a float
141 * (http://stackoverflow.com/a/2953466)
142 */
143
144 static bool
145 probably_float(uint32_t bits)
146 {
147 int exp = ((bits & 0x7f800000U) >> 23) - 127;
148 uint32_t mant = bits & 0x007fffff;
149
150 /* +- 0.0 */
151 if (exp == -127 && mant == 0)
152 return true;
153
154 /* +- 1 billionth to 1 billion */
155 if (-30 <= exp && exp <= 30)
156 return true;
157
158 /* some value with only a few binary digits */
159 if ((mant & 0x0000ffff) == 0)
160 return true;
161
162 return false;
163 }
164
165 static void
166 ctx_print_buffer(struct gen_batch_decode_ctx *ctx,
167 struct gen_batch_decode_bo bo,
168 uint32_t read_length,
169 uint32_t pitch,
170 int max_lines)
171 {
172 const uint32_t *dw_end = bo.map + MIN2(bo.size, read_length);
173
174 int column_count = 0, line_count = -1;
175 for (const uint32_t *dw = bo.map; dw < dw_end; dw++) {
176 if (column_count * 4 == pitch || column_count == 8) {
177 fprintf(ctx->fp, "\n");
178 column_count = 0;
179 line_count++;
180
181 if (max_lines >= 0 && line_count >= max_lines)
182 break;
183 }
184 fprintf(ctx->fp, column_count == 0 ? " " : " ");
185
186 if ((ctx->flags & GEN_BATCH_DECODE_FLOATS) && probably_float(*dw))
187 fprintf(ctx->fp, " %8.2f", *(float *) dw);
188 else
189 fprintf(ctx->fp, " 0x%08x", *dw);
190
191 column_count++;
192 }
193 fprintf(ctx->fp, "\n");
194 }
195
196 static void
197 handle_state_base_address(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
198 {
199 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
200
201 struct gen_field_iterator iter;
202 gen_field_iterator_init(&iter, inst, p, 0, false);
203
204 while (gen_field_iterator_next(&iter)) {
205 if (strcmp(iter.name, "Surface State Base Address") == 0) {
206 ctx->surface_base = ctx_get_bo(ctx, iter.raw_value);
207 } else if (strcmp(iter.name, "Dynamic State Base Address") == 0) {
208 ctx->dynamic_base = ctx_get_bo(ctx, iter.raw_value);
209 } else if (strcmp(iter.name, "Instruction Base Address") == 0) {
210 ctx->instruction_base = ctx_get_bo(ctx, iter.raw_value);
211 }
212 }
213 }
214
215 static void
216 dump_binding_table(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
217 {
218 struct gen_group *strct =
219 gen_spec_find_struct(ctx->spec, "RENDER_SURFACE_STATE");
220 if (strct == NULL) {
221 fprintf(ctx->fp, "did not find RENDER_SURFACE_STATE info\n");
222 return;
223 }
224
225 if (count < 0)
226 count = update_count(ctx, offset, 1, 8);
227
228 if (ctx->surface_base.map == NULL) {
229 fprintf(ctx->fp, " binding table unavailable\n");
230 return;
231 }
232
233 if (offset % 32 != 0 || offset >= UINT16_MAX ||
234 offset >= ctx->surface_base.size) {
235 fprintf(ctx->fp, " invalid binding table pointer\n");
236 return;
237 }
238
239 struct gen_batch_decode_bo bo = ctx->surface_base;
240 const uint32_t *pointers = ctx->surface_base.map + offset;
241 for (int i = 0; i < count; i++) {
242 if (pointers[i] == 0)
243 continue;
244
245 if (pointers[i] % 32 != 0) {
246 fprintf(ctx->fp, "pointer %u: %08x <not valid>\n", i, pointers[i]);
247 continue;
248 }
249
250 uint64_t addr = ctx->surface_base.addr + pointers[i];
251 uint32_t size = strct->dw_length * 4;
252
253 if (addr < bo.addr || addr + size >= bo.addr + bo.size)
254 bo = ctx->get_bo(ctx->user_data, addr);
255
256 if (addr < bo.addr || addr + size >= bo.addr + bo.size) {
257 fprintf(ctx->fp, "pointer %u: %08x <not valid>\n", i, pointers[i]);
258 continue;
259 }
260
261 fprintf(ctx->fp, "pointer %u: %08x\n", i, pointers[i]);
262 ctx_print_group(ctx, strct, addr, bo.map + (addr - bo.addr));
263 }
264 }
265
266 static void
267 dump_samplers(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count)
268 {
269 struct gen_group *strct = gen_spec_find_struct(ctx->spec, "SAMPLER_STATE");
270
271 if (count < 0)
272 count = update_count(ctx, offset, strct->dw_length, 4);
273
274 if (ctx->dynamic_base.map == NULL) {
275 fprintf(ctx->fp, " samplers unavailable\n");
276 return;
277 }
278
279 if (offset % 32 != 0 || offset >= ctx->dynamic_base.size) {
280 fprintf(ctx->fp, " invalid sampler state pointer\n");
281 return;
282 }
283
284 uint64_t state_addr = ctx->dynamic_base.addr + offset;
285 const void *state_map = ctx->dynamic_base.map + offset;
286 for (int i = 0; i < count; i++) {
287 fprintf(ctx->fp, "sampler state %d\n", i);
288 ctx_print_group(ctx, strct, state_addr, state_map);
289 state_addr += 16;
290 state_map += 16;
291 }
292 }
293
294 static void
295 handle_media_interface_descriptor_load(struct gen_batch_decode_ctx *ctx,
296 const uint32_t *p)
297 {
298 if (ctx->dynamic_base.map == NULL)
299 return;
300
301 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
302 struct gen_group *desc =
303 gen_spec_find_struct(ctx->spec, "INTERFACE_DESCRIPTOR_DATA");
304
305 struct gen_field_iterator iter;
306 gen_field_iterator_init(&iter, inst, p, 0, false);
307 uint32_t descriptor_offset = 0;
308 int descriptor_count = 0;
309 while (gen_field_iterator_next(&iter)) {
310 if (strcmp(iter.name, "Interface Descriptor Data Start Address") == 0) {
311 descriptor_offset = strtol(iter.value, NULL, 16);
312 } else if (strcmp(iter.name, "Interface Descriptor Total Length") == 0) {
313 descriptor_count =
314 strtol(iter.value, NULL, 16) / (desc->dw_length * 4);
315 }
316 }
317
318 uint64_t desc_addr = ctx->dynamic_base.addr + descriptor_offset;
319 const uint32_t *desc_map = ctx->dynamic_base.map + descriptor_offset;
320 for (int i = 0; i < descriptor_count; i++) {
321 fprintf(ctx->fp, "descriptor %d: %08x\n", i, descriptor_offset);
322
323 ctx_print_group(ctx, desc, desc_addr, desc_map);
324
325 gen_field_iterator_init(&iter, desc, desc_map, 0, false);
326 uint64_t ksp;
327 uint32_t sampler_offset, sampler_count;
328 uint32_t binding_table_offset, binding_entry_count;
329 while (gen_field_iterator_next(&iter)) {
330 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
331 ksp = strtoll(iter.value, NULL, 16);
332 } else if (strcmp(iter.name, "Sampler State Pointer") == 0) {
333 sampler_offset = strtol(iter.value, NULL, 16);
334 } else if (strcmp(iter.name, "Sampler Count") == 0) {
335 sampler_count = strtol(iter.value, NULL, 10);
336 } else if (strcmp(iter.name, "Binding Table Pointer") == 0) {
337 binding_table_offset = strtol(iter.value, NULL, 16);
338 } else if (strcmp(iter.name, "Binding Table Entry Count") == 0) {
339 binding_entry_count = strtol(iter.value, NULL, 10);
340 }
341 }
342
343 ctx_disassemble_program(ctx, ksp, "compute shader");
344 printf("\n");
345
346 dump_samplers(ctx, sampler_offset, sampler_count);
347 dump_binding_table(ctx, binding_table_offset, binding_entry_count);
348
349 desc_map += desc->dw_length;
350 desc_addr += desc->dw_length * 4;
351 }
352 }
353
354 static void
355 handle_3dstate_vertex_buffers(struct gen_batch_decode_ctx *ctx,
356 const uint32_t *p)
357 {
358 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
359 struct gen_group *vbs = gen_spec_find_struct(ctx->spec, "VERTEX_BUFFER_STATE");
360
361 struct gen_batch_decode_bo vb = {};
362 uint32_t vb_size = 0;
363 int index = -1;
364 int pitch = -1;
365 bool ready = false;
366
367 struct gen_field_iterator iter;
368 gen_field_iterator_init(&iter, inst, p, 0, false);
369 while (gen_field_iterator_next(&iter)) {
370 if (iter.struct_desc != vbs)
371 continue;
372
373 struct gen_field_iterator vbs_iter;
374 gen_field_iterator_init(&vbs_iter, vbs, &iter.p[iter.start_bit / 32], 0, false);
375 while (gen_field_iterator_next(&vbs_iter)) {
376 if (strcmp(vbs_iter.name, "Vertex Buffer Index") == 0) {
377 index = vbs_iter.raw_value;
378 } else if (strcmp(vbs_iter.name, "Buffer Pitch") == 0) {
379 pitch = vbs_iter.raw_value;
380 } else if (strcmp(vbs_iter.name, "Buffer Starting Address") == 0) {
381 vb = ctx_get_bo(ctx, vbs_iter.raw_value);
382 } else if (strcmp(vbs_iter.name, "Buffer Size") == 0) {
383 vb_size = vbs_iter.raw_value;
384 ready = true;
385 } else if (strcmp(vbs_iter.name, "End Address") == 0) {
386 if (vb.map && vbs_iter.raw_value >= vb.addr)
387 vb_size = vbs_iter.raw_value - vb.addr;
388 else
389 vb_size = 0;
390 ready = true;
391 }
392
393 if (!ready)
394 continue;
395
396 fprintf(ctx->fp, "vertex buffer %d, size %d\n", index, vb_size);
397
398 if (vb.map == NULL) {
399 fprintf(ctx->fp, " buffer contents unavailable\n");
400 continue;
401 }
402
403 if (vb.map == 0 || vb_size == 0)
404 continue;
405
406 ctx_print_buffer(ctx, vb, vb_size, pitch, ctx->max_vbo_decoded_lines);
407
408 vb.map = NULL;
409 vb_size = 0;
410 index = -1;
411 pitch = -1;
412 ready = false;
413 }
414 }
415 }
416
417 static void
418 handle_3dstate_index_buffer(struct gen_batch_decode_ctx *ctx,
419 const uint32_t *p)
420 {
421 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
422
423 struct gen_batch_decode_bo ib = {};
424 uint32_t ib_size = 0;
425 uint32_t format = 0;
426
427 struct gen_field_iterator iter;
428 gen_field_iterator_init(&iter, inst, p, 0, false);
429 while (gen_field_iterator_next(&iter)) {
430 if (strcmp(iter.name, "Index Format") == 0) {
431 format = iter.raw_value;
432 } else if (strcmp(iter.name, "Buffer Starting Address") == 0) {
433 ib = ctx_get_bo(ctx, iter.raw_value);
434 } else if (strcmp(iter.name, "Buffer Size") == 0) {
435 ib_size = iter.raw_value;
436 }
437 }
438
439 if (ib.map == NULL) {
440 fprintf(ctx->fp, " buffer contents unavailable\n");
441 return;
442 }
443
444 const void *m = ib.map;
445 const void *ib_end = ib.map + MIN2(ib.size, ib_size);
446 for (int i = 0; m < ib_end && i < 10; i++) {
447 switch (format) {
448 case 0:
449 fprintf(ctx->fp, "%3d ", *(uint8_t *)m);
450 m += 1;
451 break;
452 case 1:
453 fprintf(ctx->fp, "%3d ", *(uint16_t *)m);
454 m += 2;
455 break;
456 case 2:
457 fprintf(ctx->fp, "%3d ", *(uint32_t *)m);
458 m += 4;
459 break;
460 }
461 }
462
463 if (m < ib_end)
464 fprintf(ctx->fp, "...");
465 fprintf(ctx->fp, "\n");
466 }
467
468 static void
469 decode_single_ksp(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
470 {
471 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
472
473 uint64_t ksp = 0;
474 bool is_simd8 = false; /* vertex shaders on Gen8+ only */
475 bool is_enabled = true;
476
477 struct gen_field_iterator iter;
478 gen_field_iterator_init(&iter, inst, p, 0, false);
479 while (gen_field_iterator_next(&iter)) {
480 if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
481 ksp = iter.raw_value;
482 } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) {
483 is_simd8 = iter.raw_value;
484 } else if (strcmp(iter.name, "Dispatch Mode") == 0) {
485 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
486 } else if (strcmp(iter.name, "Dispatch Enable") == 0) {
487 is_simd8 = strcmp(iter.value, "SIMD8") == 0;
488 } else if (strcmp(iter.name, "Enable") == 0) {
489 is_enabled = iter.raw_value;
490 }
491 }
492
493 const char *type =
494 strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" :
495 strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" :
496 strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" :
497 strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" :
498 strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation evaluation shader" :
499 strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation control shader" :
500 strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") :
501 strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") :
502 NULL;
503
504 if (is_enabled) {
505 ctx_disassemble_program(ctx, ksp, type);
506 printf("\n");
507 }
508 }
509
510 static void
511 decode_ps_kernels(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
512 {
513 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
514
515 uint64_t ksp[3] = {0, 0, 0};
516 bool enabled[3] = {false, false, false};
517
518 struct gen_field_iterator iter;
519 gen_field_iterator_init(&iter, inst, p, 0, false);
520 while (gen_field_iterator_next(&iter)) {
521 if (strncmp(iter.name, "Kernel Start Pointer ",
522 strlen("Kernel Start Pointer ")) == 0) {
523 int idx = iter.name[strlen("Kernel Start Pointer ")] - '0';
524 ksp[idx] = strtol(iter.value, NULL, 16);
525 } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) {
526 enabled[0] = strcmp(iter.value, "true") == 0;
527 } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) {
528 enabled[1] = strcmp(iter.value, "true") == 0;
529 } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) {
530 enabled[2] = strcmp(iter.value, "true") == 0;
531 }
532 }
533
534 /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */
535 if (enabled[0] + enabled[1] + enabled[2] == 1) {
536 if (enabled[1]) {
537 ksp[1] = ksp[0];
538 ksp[0] = 0;
539 } else if (enabled[2]) {
540 ksp[2] = ksp[0];
541 ksp[0] = 0;
542 }
543 } else {
544 uint64_t tmp = ksp[1];
545 ksp[1] = ksp[2];
546 ksp[2] = tmp;
547 }
548
549 if (enabled[0])
550 ctx_disassemble_program(ctx, ksp[0], "SIMD8 fragment shader");
551 if (enabled[1])
552 ctx_disassemble_program(ctx, ksp[1], "SIMD16 fragment shader");
553 if (enabled[2])
554 ctx_disassemble_program(ctx, ksp[2], "SIMD32 fragment shader");
555 fprintf(ctx->fp, "\n");
556 }
557
558 static void
559 decode_3dstate_constant(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
560 {
561 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
562 struct gen_group *body =
563 gen_spec_find_struct(ctx->spec, "3DSTATE_CONSTANT_BODY");
564
565 uint32_t read_length[4] = {0};
566 uint64_t read_addr[4];
567
568 struct gen_field_iterator outer;
569 gen_field_iterator_init(&outer, inst, p, 0, false);
570 while (gen_field_iterator_next(&outer)) {
571 if (outer.struct_desc != body)
572 continue;
573
574 struct gen_field_iterator iter;
575 gen_field_iterator_init(&iter, body, &outer.p[outer.start_bit / 32],
576 0, false);
577
578 while (gen_field_iterator_next(&iter)) {
579 int idx;
580 if (sscanf(iter.name, "Read Length[%d]", &idx) == 1) {
581 read_length[idx] = iter.raw_value;
582 } else if (sscanf(iter.name, "Buffer[%d]", &idx) == 1) {
583 read_addr[idx] = iter.raw_value;
584 }
585 }
586
587 for (int i = 0; i < 4; i++) {
588 if (read_length[i] == 0)
589 continue;
590
591 struct gen_batch_decode_bo buffer = ctx_get_bo(ctx, read_addr[i]);
592 if (!buffer.map) {
593 fprintf(ctx->fp, "constant buffer %d unavailable\n", i);
594 continue;
595 }
596
597 unsigned size = read_length[i] * 32;
598 fprintf(ctx->fp, "constant buffer %d, size %u\n", i, size);
599
600 ctx_print_buffer(ctx, buffer, size, 0, -1);
601 }
602 }
603 }
604
605 static void
606 decode_3dstate_binding_table_pointers(struct gen_batch_decode_ctx *ctx,
607 const uint32_t *p)
608 {
609 dump_binding_table(ctx, p[1], -1);
610 }
611
612 static void
613 decode_3dstate_sampler_state_pointers(struct gen_batch_decode_ctx *ctx,
614 const uint32_t *p)
615 {
616 dump_samplers(ctx, p[1], -1);
617 }
618
619 static void
620 decode_3dstate_sampler_state_pointers_gen6(struct gen_batch_decode_ctx *ctx,
621 const uint32_t *p)
622 {
623 dump_samplers(ctx, p[1], -1);
624 dump_samplers(ctx, p[2], -1);
625 dump_samplers(ctx, p[3], -1);
626 }
627
628 static bool
629 str_ends_with(const char *str, const char *end)
630 {
631 int offset = strlen(str) - strlen(end);
632 if (offset < 0)
633 return false;
634
635 return strcmp(str + offset, end) == 0;
636 }
637
638 static void
639 decode_dynamic_state_pointers(struct gen_batch_decode_ctx *ctx,
640 const char *struct_type, const uint32_t *p,
641 int count)
642 {
643 if (ctx->dynamic_base.map == NULL) {
644 fprintf(ctx->fp, " dynamic %s state unavailable\n", struct_type);
645 return;
646 }
647
648 struct gen_group *inst = gen_spec_find_instruction(ctx->spec, p);
649 struct gen_group *state = gen_spec_find_struct(ctx->spec, struct_type);
650
651 uint32_t state_offset;
652
653 struct gen_field_iterator iter;
654 gen_field_iterator_init(&iter, inst, p, 0, false);
655 while (gen_field_iterator_next(&iter)) {
656 if (str_ends_with(iter.name, "Pointer")) {
657 state_offset = iter.raw_value;
658 break;
659 }
660 }
661
662 uint32_t state_addr = ctx->dynamic_base.addr + state_offset;
663 const uint32_t *state_map = ctx->dynamic_base.map + state_offset;
664 for (int i = 0; i < count; i++) {
665 fprintf(ctx->fp, "%s %d\n", struct_type, i);
666 ctx_print_group(ctx, state, state_offset, state_map);
667
668 state_addr += state->dw_length * 4;
669 state_map += state->dw_length;
670 }
671 }
672
673 static void
674 decode_3dstate_viewport_state_pointers_cc(struct gen_batch_decode_ctx *ctx,
675 const uint32_t *p)
676 {
677 decode_dynamic_state_pointers(ctx, "CC_VIEWPORT", p, 4);
678 }
679
680 static void
681 decode_3dstate_viewport_state_pointers_sf_clip(struct gen_batch_decode_ctx *ctx,
682 const uint32_t *p)
683 {
684 decode_dynamic_state_pointers(ctx, "SF_CLIP_VIEWPORT", p, 4);
685 }
686
687 static void
688 decode_3dstate_blend_state_pointers(struct gen_batch_decode_ctx *ctx,
689 const uint32_t *p)
690 {
691 decode_dynamic_state_pointers(ctx, "BLEND_STATE", p, 1);
692 }
693
694 static void
695 decode_3dstate_cc_state_pointers(struct gen_batch_decode_ctx *ctx,
696 const uint32_t *p)
697 {
698 decode_dynamic_state_pointers(ctx, "COLOR_CALC_STATE", p, 1);
699 }
700
701 static void
702 decode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx *ctx,
703 const uint32_t *p)
704 {
705 decode_dynamic_state_pointers(ctx, "SCISSOR_RECT", p, 1);
706 }
707
708 static void
709 decode_load_register_imm(struct gen_batch_decode_ctx *ctx, const uint32_t *p)
710 {
711 struct gen_group *reg = gen_spec_find_register(ctx->spec, p[1]);
712
713 if (reg != NULL) {
714 fprintf(ctx->fp, "register %s (0x%x): 0x%x\n",
715 reg->name, reg->register_offset, p[2]);
716 ctx_print_group(ctx, reg, reg->register_offset, &p[2]);
717 }
718 }
719
720 struct custom_decoder {
721 const char *cmd_name;
722 void (*decode)(struct gen_batch_decode_ctx *ctx, const uint32_t *p);
723 } custom_decoders[] = {
724 { "STATE_BASE_ADDRESS", handle_state_base_address },
725 { "MEDIA_INTERFACE_DESCRIPTOR_LOAD", handle_media_interface_descriptor_load },
726 { "3DSTATE_VERTEX_BUFFERS", handle_3dstate_vertex_buffers },
727 { "3DSTATE_INDEX_BUFFER", handle_3dstate_index_buffer },
728 { "3DSTATE_VS", decode_single_ksp },
729 { "3DSTATE_GS", decode_single_ksp },
730 { "3DSTATE_DS", decode_single_ksp },
731 { "3DSTATE_HS", decode_single_ksp },
732 { "3DSTATE_PS", decode_ps_kernels },
733 { "3DSTATE_CONSTANT_VS", decode_3dstate_constant },
734 { "3DSTATE_CONSTANT_GS", decode_3dstate_constant },
735 { "3DSTATE_CONSTANT_PS", decode_3dstate_constant },
736 { "3DSTATE_CONSTANT_HS", decode_3dstate_constant },
737 { "3DSTATE_CONSTANT_DS", decode_3dstate_constant },
738
739 { "3DSTATE_BINDING_TABLE_POINTERS_VS", decode_3dstate_binding_table_pointers },
740 { "3DSTATE_BINDING_TABLE_POINTERS_HS", decode_3dstate_binding_table_pointers },
741 { "3DSTATE_BINDING_TABLE_POINTERS_DS", decode_3dstate_binding_table_pointers },
742 { "3DSTATE_BINDING_TABLE_POINTERS_GS", decode_3dstate_binding_table_pointers },
743 { "3DSTATE_BINDING_TABLE_POINTERS_PS", decode_3dstate_binding_table_pointers },
744
745 { "3DSTATE_SAMPLER_STATE_POINTERS_VS", decode_3dstate_sampler_state_pointers },
746 { "3DSTATE_SAMPLER_STATE_POINTERS_HS", decode_3dstate_sampler_state_pointers },
747 { "3DSTATE_SAMPLER_STATE_POINTERS_DS", decode_3dstate_sampler_state_pointers },
748 { "3DSTATE_SAMPLER_STATE_POINTERS_GS", decode_3dstate_sampler_state_pointers },
749 { "3DSTATE_SAMPLER_STATE_POINTERS_PS", decode_3dstate_sampler_state_pointers },
750 { "3DSTATE_SAMPLER_STATE_POINTERS", decode_3dstate_sampler_state_pointers_gen6 },
751
752 { "3DSTATE_VIEWPORT_STATE_POINTERS_CC", decode_3dstate_viewport_state_pointers_cc },
753 { "3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP", decode_3dstate_viewport_state_pointers_sf_clip },
754 { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers },
755 { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers },
756 { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers },
757 { "MI_LOAD_REGISTER_IMM", decode_load_register_imm }
758 };
759
760 static inline uint64_t
761 get_address(struct gen_spec *spec, const uint32_t *p)
762 {
763 /* Addresses are always guaranteed to be page-aligned and sometimes
764 * hardware packets have extra stuff stuffed in the bottom 12 bits.
765 */
766 uint64_t addr = p[0] & ~0xfffu;
767
768 if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) {
769 /* On Broadwell and above, we have 48-bit addresses which consume two
770 * dwords. Some packets require that these get stored in a "canonical
771 * form" which means that bit 47 is sign-extended through the upper
772 * bits. In order to correctly handle those aub dumps, we need to mask
773 * off the top 16 bits.
774 */
775 addr |= ((uint64_t)p[1] & 0xffff) << 32;
776 }
777
778 return addr;
779 }
780
781 void
782 gen_print_batch(struct gen_batch_decode_ctx *ctx,
783 const uint32_t *batch, uint32_t batch_size,
784 uint64_t batch_addr)
785 {
786 const uint32_t *p, *end = batch + batch_size;
787 int length;
788 struct gen_group *inst;
789
790 for (p = batch; p < end; p += length) {
791 inst = gen_spec_find_instruction(ctx->spec, p);
792 length = gen_group_get_length(inst, p);
793 assert(inst == NULL || length > 0);
794 length = MAX2(1, length);
795
796 const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
797
798 uint64_t offset;
799 if (ctx->flags & GEN_BATCH_DECODE_OFFSETS)
800 offset = batch_addr + ((char *)p - (char *)batch);
801 else
802 offset = 0;
803
804 if (inst == NULL) {
805 fprintf(ctx->fp, "%s0x%08"PRIx64": unknown instruction %08x%s\n",
806 (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
807 offset, p[0], reset_color);
808 continue;
809 }
810
811 const char *color;
812 const char *inst_name = gen_group_get_name(inst);
813 if (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) {
814 reset_color = NORMAL;
815 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
816 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0 ||
817 strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0)
818 color = GREEN_HEADER;
819 else
820 color = BLUE_HEADER;
821 } else {
822 color = NORMAL;
823 }
824 } else {
825 color = "";
826 reset_color = "";
827 }
828
829 fprintf(ctx->fp, "%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
830 color, offset, p[0], inst_name, reset_color);
831
832 if (ctx->flags & GEN_BATCH_DECODE_FULL) {
833 ctx_print_group(ctx, inst, offset, p);
834
835 for (int i = 0; i < ARRAY_LENGTH(custom_decoders); i++) {
836 if (strcmp(inst_name, custom_decoders[i].cmd_name) == 0) {
837 custom_decoders[i].decode(ctx, p);
838 break;
839 }
840 }
841 }
842
843 if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0) {
844 struct gen_batch_decode_bo next_batch;
845 bool second_level;
846 struct gen_field_iterator iter;
847 gen_field_iterator_init(&iter, inst, p, 0, false);
848 while (gen_field_iterator_next(&iter)) {
849 if (strcmp(iter.name, "Batch Buffer Start Address") == 0) {
850 next_batch = ctx_get_bo(ctx, iter.raw_value);
851 } else if (strcmp(iter.name, "Second Level Batch Buffer") == 0) {
852 second_level = iter.raw_value;
853 }
854 }
855
856 if (next_batch.map == NULL) {
857 fprintf(ctx->fp, "Secondary batch at 0x%08"PRIx64" unavailable",
858 next_batch.addr);
859 }
860
861 if (second_level) {
862 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts
863 * like a subroutine call. Commands that come afterwards get
864 * processed once the 2nd level batch buffer returns with
865 * MI_BATCH_BUFFER_END.
866 */
867 if (next_batch.map) {
868 gen_print_batch(ctx, next_batch.map, next_batch.size,
869 next_batch.addr);
870 }
871 } else {
872 /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts
873 * like a goto. Nothing after it will ever get processed. In
874 * order to prevent the recursion from growing, we just reset the
875 * loop and continue;
876 */
877 if (next_batch.map) {
878 p = next_batch.map;
879 end = next_batch.map + next_batch.size;
880 length = 0;
881 continue;
882 } else {
883 /* Nothing we can do */
884 break;
885 }
886 }
887 } else if (strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0) {
888 break;
889 }
890 }
891 }