src/intel/common/gen_device_info.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include "gen_device_info.h"
  27 #include "compiler/shader_enums.h"
  28
  29 static const struct gen_device_info gen_device_info_i965 = {
  30    .gen = 4,
  31    .has_negative_rhw_bug = true,
  32    .num_slices = 1,
  33    .max_vs_threads = 16,
  34    .max_gs_threads = 2,
  35    .max_wm_threads = 8 * 4,
  36    .urb = {
  37       .size = 256,
  38    },
  39    .timebase_scale = 80,
  40 };
  41
  42 static const struct gen_device_info gen_device_info_g4x = {
  43    .gen = 4,
  44    .has_pln = true,
  45    .has_compr4 = true,
  46    .has_surface_tile_offset = true,
  47    .is_g4x = true,
  48    .num_slices = 1,
  49    .max_vs_threads = 32,
  50    .max_gs_threads = 2,
  51    .max_wm_threads = 10 * 5,
  52    .urb = {
  53       .size = 384,
  54    },
  55    .timebase_scale = 80,
  56 };
  57
  58 static const struct gen_device_info gen_device_info_ilk = {
  59    .gen = 5,
  60    .has_pln = true,
  61    .has_compr4 = true,
  62    .has_surface_tile_offset = true,
  63    .num_slices = 1,
  64    .max_vs_threads = 72,
  65    .max_gs_threads = 32,
  66    .max_wm_threads = 12 * 6,
  67    .urb = {
  68       .size = 1024,
  69    },
  70    .timebase_scale = 80,
  71 };
  72
  73 static const struct gen_device_info gen_device_info_snb_gt1 = {
  74    .gen = 6,
  75    .gt = 1,
  76    .has_hiz_and_separate_stencil = true,
  77    .has_llc = true,
  78    .has_pln = true,
  79    .has_surface_tile_offset = true,
  80    .needs_unlit_centroid_workaround = true,
  81    .num_slices = 1,
  82    .max_vs_threads = 24,
  83    .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
  84    .max_wm_threads = 40,
  85    .urb = {
  86       .size = 32,
  87       .min_entries = {
  88          [MESA_SHADER_VERTEX]   = 24,
  89       },
  90       .max_entries = {
  91          [MESA_SHADER_VERTEX]   = 256,
  92          [MESA_SHADER_GEOMETRY] = 256,
  93       },
  94    },
  95    .timebase_scale = 80,
  96 };
  97
  98 static const struct gen_device_info gen_device_info_snb_gt2 = {
  99    .gen = 6,
 100    .gt = 2,
 101    .has_hiz_and_separate_stencil = true,
 102    .has_llc = true,
 103    .has_pln = true,
 104    .has_surface_tile_offset = true,
 105    .needs_unlit_centroid_workaround = true,
 106    .num_slices = 1,
 107    .max_vs_threads = 60,
 108    .max_gs_threads = 60,
 109    .max_wm_threads = 80,
 110    .urb = {
 111       .size = 64,
 112       .min_entries = {
 113          [MESA_SHADER_VERTEX]   = 24,
 114       },
 115       .max_entries = {
 116          [MESA_SHADER_VERTEX]   = 256,
 117          [MESA_SHADER_GEOMETRY] = 256,
 118       },
 119    },
 120    .timebase_scale = 80,
 121 };
 122
 123 #define GEN7_FEATURES                               \
 124    .gen = 7,                                        \
 125    .has_hiz_and_separate_stencil = true,            \
 126    .must_use_separate_stencil = true,               \
 127    .has_llc = true,                                 \
 128    .has_pln = true,                                 \
 129    .has_surface_tile_offset = true,                 \
 130    .timebase_scale = 80
 131
 132 static const struct gen_device_info gen_device_info_ivb_gt1 = {
 133    GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
 134    .num_slices = 1,
 135    .max_vs_threads = 36,
 136    .max_tcs_threads = 36,
 137    .max_tes_threads = 36,
 138    .max_gs_threads = 36,
 139    .max_wm_threads = 48,
 140    .max_cs_threads = 36,
 141    .urb = {
 142       .size = 128,
 143       .min_entries = {
 144          [MESA_SHADER_VERTEX]    = 32,
 145          [MESA_SHADER_TESS_EVAL] = 10,
 146       },
 147       .max_entries = {
 148          [MESA_SHADER_VERTEX]    = 512,
 149          [MESA_SHADER_TESS_CTRL] = 32,
 150          [MESA_SHADER_TESS_EVAL] = 288,
 151          [MESA_SHADER_GEOMETRY]  = 192,
 152       },
 153    },
 154 };
 155
 156 static const struct gen_device_info gen_device_info_ivb_gt2 = {
 157    GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
 158    .num_slices = 1,
 159    .max_vs_threads = 128,
 160    .max_tcs_threads = 128,
 161    .max_tes_threads = 128,
 162    .max_gs_threads = 128,
 163    .max_wm_threads = 172,
 164    .max_cs_threads = 64,
 165    .urb = {
 166       .size = 256,
 167       .min_entries = {
 168          [MESA_SHADER_VERTEX]    = 32,
 169          [MESA_SHADER_TESS_EVAL] = 10,
 170       },
 171       .max_entries = {
 172          [MESA_SHADER_VERTEX]    = 704,
 173          [MESA_SHADER_TESS_CTRL] = 64,
 174          [MESA_SHADER_TESS_EVAL] = 448,
 175          [MESA_SHADER_GEOMETRY]  = 320,
 176       },
 177    },
 178 };
 179
 180 static const struct gen_device_info gen_device_info_byt = {
 181    GEN7_FEATURES, .is_baytrail = true, .gt = 1,
 182    .num_slices = 1,
 183    .has_llc = false,
 184    .max_vs_threads = 36,
 185    .max_tcs_threads = 36,
 186    .max_tes_threads = 36,
 187    .max_gs_threads = 36,
 188    .max_wm_threads = 48,
 189    .max_cs_threads = 32,
 190    .urb = {
 191       .size = 128,
 192       .min_entries = {
 193          [MESA_SHADER_VERTEX]    = 32,
 194          [MESA_SHADER_TESS_EVAL] = 10,
 195       },
 196       .max_entries = {
 197          [MESA_SHADER_VERTEX]    = 512,
 198          [MESA_SHADER_TESS_CTRL] = 32,
 199          [MESA_SHADER_TESS_EVAL] = 288,
 200          [MESA_SHADER_GEOMETRY]  = 192,
 201       },
 202    },
 203 };
 204
 205 #define HSW_FEATURES             \
 206    GEN7_FEATURES,                \
 207    .is_haswell = true,           \
 208    .supports_simd16_3src = true, \
 209    .has_resource_streamer = true
 210
 211 static const struct gen_device_info gen_device_info_hsw_gt1 = {
 212    HSW_FEATURES, .gt = 1,
 213    .num_slices = 1,
 214    .max_vs_threads = 70,
 215    .max_tcs_threads = 70,
 216    .max_tes_threads = 70,
 217    .max_gs_threads = 70,
 218    .max_wm_threads = 102,
 219    .max_cs_threads = 70,
 220    .urb = {
 221       .size = 128,
 222       .min_entries = {
 223          [MESA_SHADER_VERTEX]    = 32,
 224          [MESA_SHADER_TESS_EVAL] = 10,
 225       },
 226       .max_entries = {
 227          [MESA_SHADER_VERTEX]    = 640,
 228          [MESA_SHADER_TESS_CTRL] = 64,
 229          [MESA_SHADER_TESS_EVAL] = 384,
 230          [MESA_SHADER_GEOMETRY]  = 256,
 231       },
 232    },
 233 };
 234
 235 static const struct gen_device_info gen_device_info_hsw_gt2 = {
 236    HSW_FEATURES, .gt = 2,
 237    .num_slices = 1,
 238    .max_vs_threads = 280,
 239    .max_tcs_threads = 256,
 240    .max_tes_threads = 280,
 241    .max_gs_threads = 256,
 242    .max_wm_threads = 204,
 243    .max_cs_threads = 70,
 244    .urb = {
 245       .size = 256,
 246       .min_entries = {
 247          [MESA_SHADER_VERTEX]    = 64,
 248          [MESA_SHADER_TESS_EVAL] = 10,
 249       },
 250       .max_entries = {
 251          [MESA_SHADER_VERTEX]    = 1664,
 252          [MESA_SHADER_TESS_CTRL] = 128,
 253          [MESA_SHADER_TESS_EVAL] = 960,
 254          [MESA_SHADER_GEOMETRY]  = 640,
 255       },
 256    },
 257 };
 258
 259 static const struct gen_device_info gen_device_info_hsw_gt3 = {
 260    HSW_FEATURES, .gt = 3,
 261    .num_slices = 2,
 262    .max_vs_threads = 280,
 263    .max_tcs_threads = 256,
 264    .max_tes_threads = 280,
 265    .max_gs_threads = 256,
 266    .max_wm_threads = 408,
 267    .max_cs_threads = 70,
 268    .urb = {
 269       .size = 512,
 270       .min_entries = {
 271          [MESA_SHADER_VERTEX]    = 64,
 272          [MESA_SHADER_TESS_EVAL] = 10,
 273       },
 274       .max_entries = {
 275          [MESA_SHADER_VERTEX]    = 1664,
 276          [MESA_SHADER_TESS_CTRL] = 128,
 277          [MESA_SHADER_TESS_EVAL] = 960,
 278          [MESA_SHADER_GEOMETRY]  = 640,
 279       },
 280    },
 281 };
 282
 283 #define GEN8_FEATURES                               \
 284    .gen = 8,                                        \
 285    .has_hiz_and_separate_stencil = true,            \
 286    .has_resource_streamer = true,                   \
 287    .must_use_separate_stencil = true,               \
 288    .has_llc = true,                                 \
 289    .has_pln = true,                                 \
 290    .supports_simd16_3src = true,                    \
 291    .has_surface_tile_offset = true,                 \
 292    .max_vs_threads = 504,                           \
 293    .max_tcs_threads = 504,                          \
 294    .max_tes_threads = 504,                          \
 295    .max_gs_threads = 504,                           \
 296    .max_wm_threads = 384,                           \
 297    .timebase_scale = 80
 298
 299 static const struct gen_device_info gen_device_info_bdw_gt1 = {
 300    GEN8_FEATURES, .gt = 1,
 301    .num_slices = 1,
 302    .max_cs_threads = 42,
 303    .urb = {
 304       .size = 192,
 305       .min_entries = {
 306          [MESA_SHADER_VERTEX]    = 64,
 307          [MESA_SHADER_TESS_EVAL] = 34,
 308       },
 309       .max_entries = {
 310          [MESA_SHADER_VERTEX]    = 2560,
 311          [MESA_SHADER_TESS_CTRL] = 504,
 312          [MESA_SHADER_TESS_EVAL] = 1536,
 313          [MESA_SHADER_GEOMETRY]  = 960,
 314       },
 315    }
 316 };
 317
 318 static const struct gen_device_info gen_device_info_bdw_gt2 = {
 319    GEN8_FEATURES, .gt = 2,
 320    .num_slices = 1,
 321    .max_cs_threads = 56,
 322    .urb = {
 323       .size = 384,
 324       .min_entries = {
 325          [MESA_SHADER_VERTEX]    = 64,
 326          [MESA_SHADER_TESS_EVAL] = 34,
 327       },
 328       .max_entries = {
 329          [MESA_SHADER_VERTEX]    = 2560,
 330          [MESA_SHADER_TESS_CTRL] = 504,
 331          [MESA_SHADER_TESS_EVAL] = 1536,
 332          [MESA_SHADER_GEOMETRY]  = 960,
 333       },
 334    }
 335 };
 336
 337 static const struct gen_device_info gen_device_info_bdw_gt3 = {
 338    GEN8_FEATURES, .gt = 3,
 339    .num_slices = 2,
 340    .max_cs_threads = 56,
 341    .urb = {
 342       .size = 384,
 343       .min_entries = {
 344          [MESA_SHADER_VERTEX]    = 64,
 345          [MESA_SHADER_TESS_EVAL] = 34,
 346       },
 347       .max_entries = {
 348          [MESA_SHADER_VERTEX]    = 2560,
 349          [MESA_SHADER_TESS_CTRL] = 504,
 350          [MESA_SHADER_TESS_EVAL] = 1536,
 351          [MESA_SHADER_GEOMETRY]  = 960,
 352       },
 353    }
 354 };
 355
 356 static const struct gen_device_info gen_device_info_chv = {
 357    GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
 358    .has_llc = false,
 359    .num_slices = 1,
 360    .max_vs_threads = 80,
 361    .max_tcs_threads = 80,
 362    .max_tes_threads = 80,
 363    .max_gs_threads = 80,
 364    .max_wm_threads = 128,
 365    .max_cs_threads = 6 * 7,
 366    .urb = {
 367       .size = 192,
 368       .min_entries = {
 369          [MESA_SHADER_VERTEX]    = 34,
 370          [MESA_SHADER_TESS_EVAL] = 34,
 371       },
 372       .max_entries = {
 373          [MESA_SHADER_VERTEX]    = 640,
 374          [MESA_SHADER_TESS_CTRL] = 80,
 375          [MESA_SHADER_TESS_EVAL] = 384,
 376          [MESA_SHADER_GEOMETRY]  = 256,
 377       },
 378    }
 379 };
 380
 381 #define GEN9_FEATURES                               \
 382    .gen = 9,                                        \
 383    .has_hiz_and_separate_stencil = true,            \
 384    .has_resource_streamer = true,                   \
 385    .must_use_separate_stencil = true,               \
 386    .has_llc = true,                                 \
 387    .has_pln = true,                                 \
 388    .supports_simd16_3src = true,                    \
 389    .has_surface_tile_offset = true,                 \
 390    .max_vs_threads = 336,                           \
 391    .max_gs_threads = 336,                           \
 392    .max_tcs_threads = 336,                          \
 393    .max_tes_threads = 336,                          \
 394    .max_cs_threads = 56,                            \
 395    .timebase_scale = 1000000000.0 / 12000000.0,     \
 396    .urb = {                                         \
 397       .size = 384,                                  \
 398       .min_entries = {                              \
 399          [MESA_SHADER_VERTEX]    = 64,              \
 400          [MESA_SHADER_TESS_EVAL] = 34,              \
 401       },                                            \
 402       .max_entries = {                              \
 403          [MESA_SHADER_VERTEX]    = 1856,            \
 404          [MESA_SHADER_TESS_CTRL] = 672,             \
 405          [MESA_SHADER_TESS_EVAL] = 1120,            \
 406          [MESA_SHADER_GEOMETRY]  = 640,             \
 407       },                                            \
 408    }
 409
 410 #define GEN9_LP_FEATURES                           \
 411    GEN9_FEATURES,                                  \
 412    .is_broxton = 1,                                \
 413    .gt = 1,                                        \
 414    .has_llc = false,                               \
 415    .num_slices = 1,                                \
 416    .max_vs_threads = 112,                          \
 417    .max_tcs_threads = 112,                         \
 418    .max_tes_threads = 112,                         \
 419    .max_gs_threads = 112,                          \
 420    .max_cs_threads = 6 * 6,                        \
 421    .timebase_scale = 1000000000.0 / 19200123.0,    \
 422    .urb = {                                        \
 423       .size = 192,                                 \
 424       .min_entries = {                             \
 425          [MESA_SHADER_VERTEX]    = 34,             \
 426          [MESA_SHADER_TESS_EVAL] = 34,             \
 427       },                                           \
 428       .max_entries = {                             \
 429          [MESA_SHADER_VERTEX]    = 704,            \
 430          [MESA_SHADER_TESS_CTRL] = 256,            \
 431          [MESA_SHADER_TESS_EVAL] = 416,            \
 432          [MESA_SHADER_GEOMETRY]  = 256,            \
 433       },                                           \
 434    }
 435
 436 #define GEN9_LP_FEATURES_2X6                       \
 437    GEN9_LP_FEATURES,                               \
 438    .max_vs_threads = 56,                           \
 439    .max_tcs_threads = 56,                          \
 440    .max_tes_threads = 56,                          \
 441    .max_gs_threads = 56,                           \
 442    .max_cs_threads = 6 * 6,                        \
 443    .urb = {                                        \
 444       .size = 128,                                 \
 445       .min_entries = {                             \
 446          [MESA_SHADER_VERTEX]    = 34,             \
 447          [MESA_SHADER_TESS_EVAL] = 34,             \
 448       },                                           \
 449       .max_entries = {                             \
 450          [MESA_SHADER_VERTEX]    = 352,            \
 451          [MESA_SHADER_TESS_CTRL] = 128,            \
 452          [MESA_SHADER_TESS_EVAL] = 208,            \
 453          [MESA_SHADER_GEOMETRY]  = 128,            \
 454       },                                           \
 455    }
 456
 457 static const struct gen_device_info gen_device_info_skl_gt1 = {
 458    GEN9_FEATURES, .gt = 1,
 459    .num_slices = 1,
 460    .urb.size = 192,
 461 };
 462
 463 static const struct gen_device_info gen_device_info_skl_gt2 = {
 464    GEN9_FEATURES, .gt = 2,
 465    .num_slices = 1,
 466 };
 467
 468 static const struct gen_device_info gen_device_info_skl_gt3 = {
 469    GEN9_FEATURES, .gt = 3,
 470    .num_slices = 2,
 471 };
 472
 473 static const struct gen_device_info gen_device_info_skl_gt4 = {
 474    GEN9_FEATURES, .gt = 4,
 475    .num_slices = 3,
 476    /* From the "L3 Allocation and Programming" documentation:
 477     *
 478     * "URB is limited to 1008KB due to programming restrictions.  This is not a
 479     * restriction of the L3 implementation, but of the FF and other clients.
 480     * Therefore, in a GT4 implementation it is possible for the programmed
 481     * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 482     * only 1008KB of this will be used."
 483     */
 484    .urb.size = 1008 / 3,
 485 };
 486
 487 static const struct gen_device_info gen_device_info_bxt = {
 488    GEN9_LP_FEATURES
 489 };
 490
 491 static const struct gen_device_info gen_device_info_bxt_2x6 = {
 492    GEN9_LP_FEATURES_2X6
 493 };
 494 /*
 495  * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
 496  * There's no KBL entry. Using the default SKL (GEN9) GS entries value.
 497  */
 498
 499 static const struct gen_device_info gen_device_info_kbl_gt1 = {
 500    GEN9_FEATURES,
 501    .is_kabylake = true,
 502    .gt = 1,
 503
 504    .max_cs_threads = 7 * 6,
 505    .urb.size = 192,
 506    .num_slices = 1,
 507 };
 508
 509 static const struct gen_device_info gen_device_info_kbl_gt1_5 = {
 510    GEN9_FEATURES,
 511    .is_kabylake = true,
 512    .gt = 1,
 513
 514    .max_cs_threads = 7 * 6,
 515    .num_slices = 1,
 516 };
 517
 518 static const struct gen_device_info gen_device_info_kbl_gt2 = {
 519    GEN9_FEATURES,
 520    .is_kabylake = true,
 521    .gt = 2,
 522
 523    .num_slices = 1,
 524 };
 525
 526 static const struct gen_device_info gen_device_info_kbl_gt3 = {
 527    GEN9_FEATURES,
 528    .is_kabylake = true,
 529    .gt = 3,
 530
 531    .num_slices = 2,
 532 };
 533
 534 static const struct gen_device_info gen_device_info_kbl_gt4 = {
 535    GEN9_FEATURES,
 536    .is_kabylake = true,
 537    .gt = 4,
 538
 539    /*
 540     * From the "L3 Allocation and Programming" documentation:
 541     *
 542     * "URB is limited to 1008KB due to programming restrictions.  This
 543     *  is not a restriction of the L3 implementation, but of the FF and
 544     *  other clients.  Therefore, in a GT4 implementation it is
 545     *  possible for the programmed allocation of the L3 data array to
 546     *  provide 3*384KB=1152KB for URB, but only 1008KB of this
 547     *  will be used."
 548     */
 549    .urb.size = 1008 / 3,
 550    .num_slices = 3,
 551 };
 552
 553 static const struct gen_device_info gen_device_info_glk = {
 554    GEN9_LP_FEATURES
 555 };
 556
 557 static const struct gen_device_info gen_device_info_glk_2x6 = {
 558    GEN9_LP_FEATURES_2X6
 559 };
 560
 561 bool
 562 gen_get_device_info(int devid, struct gen_device_info *devinfo)
 563 {
 564    switch (devid) {
 565 #undef CHIPSET
 566 #define CHIPSET(id, family, name) \
 567       case id: *devinfo = gen_device_info_##family; break;
 568 #include "pci_ids/i965_pci_ids.h"
 569    default:
 570       fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid);
 571       return false;
 572    }
 573
 574    /* From the Skylake PRM, 3DSTATE_PS::Scratch Space Base Pointer:
 575     *
 576     * "Scratch Space per slice is computed based on 4 sub-slices.  SW must
 577     *  allocate scratch space enough so that each slice has 4 slices allowed."
 578     *
 579     * The equivalent internal documentation says that this programming note
 580     * applies to all Gen9+ platforms.
 581     *
 582     * The hardware typically calculates the scratch space pointer by taking
 583     * the base address, and adding per-thread-scratch-space * thread ID.
 584     * Extra padding can be necessary depending how the thread IDs are
 585     * calculated for a particular shader stage.
 586     */
 587    if (devinfo->gen >= 9) {
 588       devinfo->max_wm_threads = 64 /* threads-per-PSD */
 589                               * devinfo->num_slices
 590                               * 4; /* effective subslices per slice */
 591    }
 592
 593    return true;
 594 }
 595
 596 const char *
 597 gen_get_device_name(int devid)
 598 {
 599    switch (devid) {
 600 #undef CHIPSET
 601 #define CHIPSET(id, family, name) case id: return name;
 602 #include "pci_ids/i965_pci_ids.h"
 603    default:
 604       return NULL;
 605    }
 606 }