src/intel/common/gen_gem.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_GEM_H
  25 #define GEN_GEM_H
  26
  27 static inline uint64_t
  28 gen_canonical_address(uint64_t v)
  29 {
  30    /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
  31     *
  32     *    "This field specifies the address of the memory location where the
  33     *    register value specified in the DWord above will read from. The
  34     *    address specifies the DWord location of the data. Range =
  35     *    GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
  36     *    [63:48] are ignored by the HW and assumed to be in correct
  37     *    canonical form [63:48] == [47]."
  38     */
  39    const int shift = 63 - 47;
  40    return (int64_t)(v << shift) >> shift;
  41 }
  42
  43 /**
  44  * This returns a 48-bit address with the high 16 bits zeroed.
  45  *
  46  * It's the opposite of gen_canonicalize_address.
  47  */
  48 static inline uint64_t
  49 gen_48b_address(uint64_t v)
  50 {
  51    const int shift = 63 - 47;
  52    return (uint64_t)(v << shift) >> shift;
  53 }
  54
  55 #endif /* GEN_GEM_H */