src/intel/common/gen_l3_config.c

   1 /*
   2  * Copyright (c) 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdlib.h>
  25 #include <math.h>
  26
  27 #include "util/macros.h"
  28 #include "main/macros.h"
  29
  30 #include "gen_l3_config.h"
  31
  32 struct gen_l3_list {
  33    const struct gen_l3_config *configs;
  34    int length;
  35 };
  36
  37 #define DECLARE_L3_LIST(hw) \
  38    struct gen_l3_list hw##_l3_list = \
  39    { .configs = hw##_l3_configs, .length = ARRAY_SIZE(hw##_l3_configs) }
  40
  41 /**
  42  * IVB/HSW validated L3 configurations.  The first entry will be used as
  43  * default by gen7_restore_default_l3_config(), otherwise the ordering is
  44  * unimportant.
  45  */
  46 static const struct gen_l3_config ivb_l3_configs[] = {
  47    /* SLM URB ALL DC  RO  IS   C   T */
  48    {{  0, 32,  0,  0, 32,  0,  0,  0 }},
  49    {{  0, 32,  0, 16, 16,  0,  0,  0 }},
  50    {{  0, 32,  0,  4,  0,  8,  4, 16 }},
  51    {{  0, 28,  0,  8,  0,  8,  4, 16 }},
  52    {{  0, 28,  0, 16,  0,  8,  4,  8 }},
  53    {{  0, 28,  0,  8,  0, 16,  4,  8 }},
  54    {{  0, 28,  0,  0,  0, 16,  4, 16 }},
  55    {{  0, 32,  0,  0,  0, 16,  0, 16 }},
  56    {{  0, 28,  0,  4, 32,  0,  0,  0 }},
  57    {{ 16, 16,  0, 16, 16,  0,  0,  0 }},
  58    {{ 16, 16,  0,  8,  0,  8,  8,  8 }},
  59    {{ 16, 16,  0,  4,  0,  8,  4, 16 }},
  60    {{ 16, 16,  0,  4,  0, 16,  4,  8 }},
  61    {{ 16, 16,  0,  0, 32,  0,  0,  0 }},
  62 };
  63 DECLARE_L3_LIST(ivb);
  64
  65 /**
  66  * VLV validated L3 configurations.  \sa ivb_l3_configs.
  67  */
  68 static const struct gen_l3_config vlv_l3_configs[] = {
  69    /* SLM URB ALL DC  RO  IS   C   T */
  70    {{  0, 64,  0,  0, 32,  0,  0,  0 }},
  71    {{  0, 80,  0,  0, 16,  0,  0,  0 }},
  72    {{  0, 80,  0,  8,  8,  0,  0,  0 }},
  73    {{  0, 64,  0, 16, 16,  0,  0,  0 }},
  74    {{  0, 60,  0,  4, 32,  0,  0,  0 }},
  75    {{ 32, 32,  0, 16, 16,  0,  0,  0 }},
  76    {{ 32, 40,  0,  8, 16,  0,  0,  0 }},
  77    {{ 32, 40,  0, 16,  8,  0,  0,  0 }},
  78 };
  79 DECLARE_L3_LIST(vlv);
  80
  81 /**
  82  * BDW validated L3 configurations.  \sa ivb_l3_configs.
  83  */
  84 static const struct gen_l3_config bdw_l3_configs[] = {
  85    /* SLM URB ALL DC  RO  IS   C   T */
  86    {{  0, 48, 48,  0,  0,  0,  0,  0 }},
  87    {{  0, 48,  0, 16, 32,  0,  0,  0 }},
  88    {{  0, 32,  0, 16, 48,  0,  0,  0 }},
  89    {{  0, 32,  0,  0, 64,  0,  0,  0 }},
  90    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
  91    {{ 24, 16, 48,  0,  0,  0,  0,  0 }},
  92    {{ 24, 16,  0, 16, 32,  0,  0,  0 }},
  93    {{ 24, 16,  0, 32, 16,  0,  0,  0 }},
  94 };
  95 DECLARE_L3_LIST(bdw);
  96
  97 /**
  98  * CHV/SKL validated L3 configurations.  \sa ivb_l3_configs.
  99  */
 100 static const struct gen_l3_config chv_l3_configs[] = {
 101    /* SLM URB ALL DC  RO  IS   C   T */
 102    {{  0, 48, 48,  0,  0,  0,  0,  0 }},
 103    {{  0, 48,  0, 16, 32,  0,  0,  0 }},
 104    {{  0, 32,  0, 16, 48,  0,  0,  0 }},
 105    {{  0, 32,  0,  0, 64,  0,  0,  0 }},
 106    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
 107    {{ 32, 16, 48,  0,  0,  0,  0,  0 }},
 108    {{ 32, 16,  0, 16, 32,  0,  0,  0 }},
 109    {{ 32, 16,  0, 32, 16,  0,  0,  0 }},
 110 };
 111 DECLARE_L3_LIST(chv);
 112
 113 /**
 114  * BXT 2x6 validated L3 configurations.  \sa ivb_l3_configs.
 115  */
 116 static const struct gen_l3_config bxt_2x6_l3_configs[] = {
 117    /* SLM URB ALL DC  RO  IS   C   T */
 118    {{  0, 32, 48,  0,  0,  0,  0,  0 }},
 119    {{  0, 32,  0,  8, 40,  0,  0,  0 }},
 120    {{  0, 32,  0, 32, 16,  0,  0,  0 }},
 121    {{ 16, 16, 48,  0,  0,  0,  0,  0 }},
 122    {{ 16, 16,  0, 40,  8,  0,  0,  0 }},
 123    {{ 16, 16,  0, 16, 32,  0,  0,  0 }},
 124 };
 125 DECLARE_L3_LIST(bxt_2x6);
 126
 127 /**
 128  * CNL validated L3 configurations.  \sa ivb_l3_configs.
 129  */
 130 static const struct gen_l3_config cnl_l3_configs[] = {
 131    /* SLM URB ALL DC  RO  IS   C   T */
 132    {{  0, 64, 64,  0,  0,  0,  0,  0 }},
 133    {{  0, 64,  0, 16, 48,  0,  0,  0 }},
 134    {{  0, 48,  0, 16, 64,  0,  0,  0 }},
 135    {{  0, 32,  0,  0, 96,  0,  0,  0 }},
 136    {{  0, 32, 96,  0,  0,  0,  0,  0 }},
 137    {{  0, 32,  0, 16, 80,  0,  0,  0 }},
 138    {{ 32, 16, 80,  0,  0,  0,  0,  0 }},
 139    {{ 32, 16,  0, 64, 16,  0,  0,  0 }},
 140    {{ 32,  0, 96,  0,  0,  0,  0,  0 }},
 141 };
 142 DECLARE_L3_LIST(cnl);
 143
 144 /**
 145  * ICL validated L3 configurations.  \sa icl_l3_configs.
 146  * Zeroth entry in below table has been commented out intentionally
 147  * due to known issues with this configuration. Many other entries
 148  * suggested by h/w specification aren't added here because they
 149  * do under allocation of L3 cache with below partitioning.
 150  */
 151 static const struct gen_l3_config icl_l3_configs[] = {
 152    /* SLM URB ALL DC  RO  IS   C   T */
 153    /*{{  0, 16, 80,  0,  0,  0,  0,  0 }},*/
 154    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
 155 };
 156 DECLARE_L3_LIST(icl);
 157
 158 /**
 159  * TGL validated L3 configurations.  \sa tgl_l3_configs.
 160  */
 161 static const struct gen_l3_config tgl_l3_configs[] = {
 162    /* SLM URB ALL DC  RO  IS   C   T */
 163    {{  0, 32,  88,  0,  0,  0,  0,  0 }},
 164    {{  0, 16, 104,  0,  0,  0,  0,  0 }},
 165 };
 166 DECLARE_L3_LIST(tgl);
 167
 168 /**
 169  * Return a zero-terminated array of validated L3 configurations for the
 170  * specified device.
 171  */
 172 static const struct gen_l3_list *
 173 get_l3_list(const struct gen_device_info *devinfo)
 174 {
 175    switch (devinfo->gen) {
 176    case 7:
 177       return (devinfo->is_baytrail ? &vlv_l3_list : &ivb_l3_list);
 178
 179    case 8:
 180       return (devinfo->is_cherryview ? &chv_l3_list : &bdw_l3_list);
 181
 182    case 9:
 183       if (devinfo->l3_banks == 1)
 184          return &bxt_2x6_l3_list;
 185       return &chv_l3_list;
 186
 187    case 10:
 188       return &cnl_l3_list;
 189
 190    case 11:
 191       return &icl_l3_list;
 192
 193    case 12:
 194       return &tgl_l3_list;
 195
 196    default:
 197       unreachable("Not implemented");
 198    }
 199 }
 200
 201 /**
 202  * L1-normalize a vector of L3 partition weights.
 203  */
 204 static struct gen_l3_weights
 205 norm_l3_weights(struct gen_l3_weights w)
 206 {
 207    float sz = 0;
 208
 209    for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 210       sz += w.w[i];
 211
 212    for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 213       w.w[i] /= sz;
 214
 215    return w;
 216 }
 217
 218 /**
 219  * Get the relative partition weights of the specified L3 configuration.
 220  */
 221 struct gen_l3_weights
 222 gen_get_l3_config_weights(const struct gen_l3_config *cfg)
 223 {
 224    if (cfg) {
 225       struct gen_l3_weights w;
 226
 227       for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 228          w.w[i] = cfg->n[i];
 229
 230       return norm_l3_weights(w);
 231    } else {
 232       const struct gen_l3_weights w = { { 0 } };
 233       return w;
 234    }
 235 }
 236
 237 /**
 238  * Distance between two L3 configurations represented as vectors of weights.
 239  * Usually just the L1 metric except when the two configurations are
 240  * considered incompatible in which case the distance will be infinite.  Note
 241  * that the compatibility condition is asymmetric -- They will be considered
 242  * incompatible whenever the reference configuration \p w0 requires SLM, DC,
 243  * or URB but \p w1 doesn't provide it.
 244  */
 245 float
 246 gen_diff_l3_weights(struct gen_l3_weights w0, struct gen_l3_weights w1)
 247 {
 248    if ((w0.w[GEN_L3P_SLM] && !w1.w[GEN_L3P_SLM]) ||
 249        (w0.w[GEN_L3P_DC] && !w1.w[GEN_L3P_DC] && !w1.w[GEN_L3P_ALL]) ||
 250        (w0.w[GEN_L3P_URB] && !w1.w[GEN_L3P_URB])) {
 251       return HUGE_VALF;
 252
 253    } else {
 254       float dw = 0;
 255
 256       for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 257          dw += fabsf(w0.w[i] - w1.w[i]);
 258
 259       return dw;
 260    }
 261 }
 262
 263 /**
 264  * Return a reasonable default L3 configuration for the specified device based
 265  * on whether SLM and DC are required.  In the non-SLM non-DC case the result
 266  * is intended to approximately resemble the hardware defaults.
 267  */
 268 struct gen_l3_weights
 269 gen_get_default_l3_weights(const struct gen_device_info *devinfo,
 270                            bool needs_dc, bool needs_slm)
 271 {
 272    struct gen_l3_weights w = {{ 0 }};
 273
 274    w.w[GEN_L3P_SLM] = devinfo->gen < 11 && needs_slm;
 275    w.w[GEN_L3P_URB] = 1.0;
 276
 277    if (devinfo->gen >= 8) {
 278       w.w[GEN_L3P_ALL] = 1.0;
 279    } else {
 280       w.w[GEN_L3P_DC] = needs_dc ? 0.1 : 0;
 281       w.w[GEN_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
 282    }
 283
 284    return norm_l3_weights(w);
 285 }
 286
 287 /**
 288  * Get the default L3 configuration
 289  */
 290 const struct gen_l3_config *
 291 gen_get_default_l3_config(const struct gen_device_info *devinfo)
 292 {
 293    /* For efficiency assume that the first entry of the array matches the
 294     * default configuration.
 295     */
 296    const struct gen_l3_list *const list = get_l3_list(devinfo);
 297    const struct gen_l3_config *const cfg = &list->configs[0];
 298    assert(cfg == gen_get_l3_config(devinfo,
 299                     gen_get_default_l3_weights(devinfo, false, false)));
 300    return cfg;
 301 }
 302
 303 /**
 304  * Return the closest validated L3 configuration for the specified device and
 305  * weight vector.
 306  */
 307 const struct gen_l3_config *
 308 gen_get_l3_config(const struct gen_device_info *devinfo,
 309                   struct gen_l3_weights w0)
 310 {
 311    const struct gen_l3_list *const list = get_l3_list(devinfo);
 312    const struct gen_l3_config *const cfgs = list->configs;
 313    const struct gen_l3_config *cfg_best = NULL;
 314    float dw_best = HUGE_VALF;
 315
 316    for (int i = 0; i < list->length; i++) {
 317       const struct gen_l3_config *cfg = &cfgs[i];
 318       const float dw = gen_diff_l3_weights(w0, gen_get_l3_config_weights(cfg));
 319
 320       if (dw < dw_best) {
 321          cfg_best = cfg;
 322          dw_best = dw;
 323       }
 324    }
 325
 326    return cfg_best;
 327 }
 328
 329 /**
 330  * Return the size of an L3 way in KB.
 331  */
 332 static unsigned
 333 get_l3_way_size(const struct gen_device_info *devinfo)
 334 {
 335    const unsigned way_size_per_bank =
 336       (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen >= 11 ?
 337       4 : 2;
 338
 339    assert(devinfo->l3_banks);
 340    return way_size_per_bank * devinfo->l3_banks;
 341 }
 342
 343 /**
 344  * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
 345  * gen_device_info::urb::size.
 346  */
 347 static unsigned
 348 get_urb_size_scale(const struct gen_device_info *devinfo)
 349 {
 350    return (devinfo->gen >= 8 ? devinfo->num_slices : 1);
 351 }
 352
 353 unsigned
 354 gen_get_l3_config_urb_size(const struct gen_device_info *devinfo,
 355                            const struct gen_l3_config *cfg)
 356 {
 357    /* From the SKL "L3 Allocation and Programming" documentation:
 358     *
 359     * "URB is limited to 1008KB due to programming restrictions.  This is not
 360     * a restriction of the L3 implementation, but of the FF and other clients.
 361     * Therefore, in a GT4 implementation it is possible for the programmed
 362     * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 363     * only 1008KB of this will be used."
 364     */
 365    const unsigned max = (devinfo->gen == 9 ? 1008 : ~0);
 366    return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) /
 367           get_urb_size_scale(devinfo);
 368 }
 369
 370 /**
 371  * Print out the specified L3 configuration.
 372  */
 373 void
 374 gen_dump_l3_config(const struct gen_l3_config *cfg, FILE *fp)
 375 {
 376    fprintf(stderr, "SLM=%d URB=%d ALL=%d DC=%d RO=%d IS=%d C=%d T=%d\n",
 377            cfg->n[GEN_L3P_SLM], cfg->n[GEN_L3P_URB], cfg->n[GEN_L3P_ALL],
 378            cfg->n[GEN_L3P_DC], cfg->n[GEN_L3P_RO],
 379            cfg->n[GEN_L3P_IS], cfg->n[GEN_L3P_C], cfg->n[GEN_L3P_T]);
 380 }