src/intel/common/gen_l3_config.c

   1 /*
   2  * Copyright (c) 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdlib.h>
  25 #include <math.h>
  26
  27 #include "util/macros.h"
  28 #include "main/macros.h"
  29
  30 #include "gen_l3_config.h"
  31
  32 /**
  33  * IVB/HSW validated L3 configurations.  The first entry will be used as
  34  * default by gen7_restore_default_l3_config(), otherwise the ordering is
  35  * unimportant.
  36  */
  37 static const struct gen_l3_config ivb_l3_configs[] = {
  38    /* SLM URB ALL DC  RO  IS   C   T */
  39    {{  0, 32,  0,  0, 32,  0,  0,  0 }},
  40    {{  0, 32,  0, 16, 16,  0,  0,  0 }},
  41    {{  0, 32,  0,  4,  0,  8,  4, 16 }},
  42    {{  0, 28,  0,  8,  0,  8,  4, 16 }},
  43    {{  0, 28,  0, 16,  0,  8,  4,  8 }},
  44    {{  0, 28,  0,  8,  0, 16,  4,  8 }},
  45    {{  0, 28,  0,  0,  0, 16,  4, 16 }},
  46    {{  0, 32,  0,  0,  0, 16,  0, 16 }},
  47    {{  0, 28,  0,  4, 32,  0,  0,  0 }},
  48    {{ 16, 16,  0, 16, 16,  0,  0,  0 }},
  49    {{ 16, 16,  0,  8,  0,  8,  8,  8 }},
  50    {{ 16, 16,  0,  4,  0,  8,  4, 16 }},
  51    {{ 16, 16,  0,  4,  0, 16,  4,  8 }},
  52    {{ 16, 16,  0,  0, 32,  0,  0,  0 }},
  53    {{ 0 }}
  54 };
  55
  56 /**
  57  * VLV validated L3 configurations.  \sa ivb_l3_configs.
  58  */
  59 static const struct gen_l3_config vlv_l3_configs[] = {
  60    /* SLM URB ALL DC  RO  IS   C   T */
  61    {{  0, 64,  0,  0, 32,  0,  0,  0 }},
  62    {{  0, 80,  0,  0, 16,  0,  0,  0 }},
  63    {{  0, 80,  0,  8,  8,  0,  0,  0 }},
  64    {{  0, 64,  0, 16, 16,  0,  0,  0 }},
  65    {{  0, 60,  0,  4, 32,  0,  0,  0 }},
  66    {{ 32, 32,  0, 16, 16,  0,  0,  0 }},
  67    {{ 32, 40,  0,  8, 16,  0,  0,  0 }},
  68    {{ 32, 40,  0, 16,  8,  0,  0,  0 }},
  69    {{ 0 }}
  70 };
  71
  72 /**
  73  * BDW validated L3 configurations.  \sa ivb_l3_configs.
  74  */
  75 static const struct gen_l3_config bdw_l3_configs[] = {
  76    /* SLM URB ALL DC  RO  IS   C   T */
  77    {{  0, 48, 48,  0,  0,  0,  0,  0 }},
  78    {{  0, 48,  0, 16, 32,  0,  0,  0 }},
  79    {{  0, 32,  0, 16, 48,  0,  0,  0 }},
  80    {{  0, 32,  0,  0, 64,  0,  0,  0 }},
  81    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
  82    {{ 24, 16, 48,  0,  0,  0,  0,  0 }},
  83    {{ 24, 16,  0, 16, 32,  0,  0,  0 }},
  84    {{ 24, 16,  0, 32, 16,  0,  0,  0 }},
  85    {{ 0 }}
  86 };
  87
  88 /**
  89  * CHV/SKL validated L3 configurations.  \sa ivb_l3_configs.
  90  */
  91 static const struct gen_l3_config chv_l3_configs[] = {
  92    /* SLM URB ALL DC  RO  IS   C   T */
  93    {{  0, 48, 48,  0,  0,  0,  0,  0 }},
  94    {{  0, 48,  0, 16, 32,  0,  0,  0 }},
  95    {{  0, 32,  0, 16, 48,  0,  0,  0 }},
  96    {{  0, 32,  0,  0, 64,  0,  0,  0 }},
  97    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
  98    {{ 32, 16, 48,  0,  0,  0,  0,  0 }},
  99    {{ 32, 16,  0, 16, 32,  0,  0,  0 }},
 100    {{ 32, 16,  0, 32, 16,  0,  0,  0 }},
 101    {{ 0 }}
 102 };
 103
 104 /**
 105  * BXT 2x6 validated L3 configurations.  \sa ivb_l3_configs.
 106  */
 107 static const struct gen_l3_config bxt_2x6_l3_configs[] = {
 108    /* SLM URB ALL DC  RO  IS   C   T */
 109    {{  0, 32, 48,  0,  0,  0,  0,  0 }},
 110    {{  0, 32,  0,  8, 40,  0,  0,  0 }},
 111    {{  0, 32,  0, 32, 16,  0,  0,  0 }},
 112    {{ 16, 16, 48,  0,  0,  0,  0,  0 }},
 113    {{ 16, 16,  0, 40,  8,  0,  0,  0 }},
 114    {{ 16, 16,  0, 16, 32,  0,  0,  0 }},
 115    {{ 0 }}
 116 };
 117
 118 /**
 119  * CNL validated L3 configurations.  \sa ivb_l3_configs.
 120  */
 121 static const struct gen_l3_config cnl_l3_configs[] = {
 122    /* SLM URB ALL DC  RO  IS   C   T */
 123    {{  0, 64, 64,  0,  0,  0,  0,  0 }},
 124    {{  0, 64,  0, 16, 48,  0,  0,  0 }},
 125    {{  0, 48,  0, 16, 64,  0,  0,  0 }},
 126    {{  0, 32,  0,  0, 96,  0,  0,  0 }},
 127    {{  0, 32, 96,  0,  0,  0,  0,  0 }},
 128    {{  0, 32,  0, 16, 80,  0,  0,  0 }},
 129    {{ 32, 16, 80,  0,  0,  0,  0,  0 }},
 130    {{ 32, 16,  0, 64, 16,  0,  0,  0 }},
 131    {{ 32,  0, 96,  0,  0,  0,  0,  0 }},
 132    {{ 0 }}
 133 };
 134
 135 /**
 136  * ICL validated L3 configurations.  \sa icl_l3_configs.
 137  * Zeroth entry in below table has been commented out intentionally
 138  * due to known issues with this configuration. Many other entries
 139  * suggested by h/w specification aren't added here because they
 140  * do under allocation of L3 cache with below partitioning.
 141  */
 142 static const struct gen_l3_config icl_l3_configs[] = {
 143    /* SLM URB ALL DC  RO  IS   C   T */
 144    /*{{  0, 16, 80,  0,  0,  0,  0,  0 }},*/
 145    {{  0, 32, 64,  0,  0,  0,  0,  0 }},
 146    {{  0 }}
 147 };
 148
 149 /**
 150  * TGL validated L3 configurations.  \sa tgl_l3_configs.
 151  */
 152 static const struct gen_l3_config tgl_l3_configs[] = {
 153    /* SLM URB ALL DC  RO  IS   C   T */
 154    {{  0, 32,  88,  0,  0,  0,  0,  0 }},
 155    {{  0, 16, 104,  0,  0,  0,  0,  0 }},
 156    {{  0 }}
 157 };
 158
 159 /**
 160  * Return a zero-terminated array of validated L3 configurations for the
 161  * specified device.
 162  */
 163 static const struct gen_l3_config *
 164 get_l3_configs(const struct gen_device_info *devinfo)
 165 {
 166    switch (devinfo->gen) {
 167    case 7:
 168       return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs);
 169
 170    case 8:
 171       return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs);
 172
 173    case 9:
 174       if (devinfo->l3_banks == 1)
 175          return bxt_2x6_l3_configs;
 176       return chv_l3_configs;
 177
 178    case 10:
 179       return cnl_l3_configs;
 180
 181    case 11:
 182       return icl_l3_configs;
 183
 184    case 12:
 185       return tgl_l3_configs;
 186
 187    default:
 188       unreachable("Not implemented");
 189    }
 190 }
 191
 192 /**
 193  * L1-normalize a vector of L3 partition weights.
 194  */
 195 static struct gen_l3_weights
 196 norm_l3_weights(struct gen_l3_weights w)
 197 {
 198    float sz = 0;
 199
 200    for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 201       sz += w.w[i];
 202
 203    for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 204       w.w[i] /= sz;
 205
 206    return w;
 207 }
 208
 209 /**
 210  * Get the relative partition weights of the specified L3 configuration.
 211  */
 212 struct gen_l3_weights
 213 gen_get_l3_config_weights(const struct gen_l3_config *cfg)
 214 {
 215    if (cfg) {
 216       struct gen_l3_weights w;
 217
 218       for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 219          w.w[i] = cfg->n[i];
 220
 221       return norm_l3_weights(w);
 222    } else {
 223       const struct gen_l3_weights w = { { 0 } };
 224       return w;
 225    }
 226 }
 227
 228 /**
 229  * Distance between two L3 configurations represented as vectors of weights.
 230  * Usually just the L1 metric except when the two configurations are
 231  * considered incompatible in which case the distance will be infinite.  Note
 232  * that the compatibility condition is asymmetric -- They will be considered
 233  * incompatible whenever the reference configuration \p w0 requires SLM, DC,
 234  * or URB but \p w1 doesn't provide it.
 235  */
 236 float
 237 gen_diff_l3_weights(struct gen_l3_weights w0, struct gen_l3_weights w1)
 238 {
 239    if ((w0.w[GEN_L3P_SLM] && !w1.w[GEN_L3P_SLM]) ||
 240        (w0.w[GEN_L3P_DC] && !w1.w[GEN_L3P_DC] && !w1.w[GEN_L3P_ALL]) ||
 241        (w0.w[GEN_L3P_URB] && !w1.w[GEN_L3P_URB])) {
 242       return HUGE_VALF;
 243
 244    } else {
 245       float dw = 0;
 246
 247       for (unsigned i = 0; i < GEN_NUM_L3P; i++)
 248          dw += fabs(w0.w[i] - w1.w[i]);
 249
 250       return dw;
 251    }
 252 }
 253
 254 /**
 255  * Return a reasonable default L3 configuration for the specified device based
 256  * on whether SLM and DC are required.  In the non-SLM non-DC case the result
 257  * is intended to approximately resemble the hardware defaults.
 258  */
 259 struct gen_l3_weights
 260 gen_get_default_l3_weights(const struct gen_device_info *devinfo,
 261                            bool needs_dc, bool needs_slm)
 262 {
 263    struct gen_l3_weights w = {{ 0 }};
 264
 265    w.w[GEN_L3P_SLM] = devinfo->gen < 11 && needs_slm;
 266    w.w[GEN_L3P_URB] = 1.0;
 267
 268    if (devinfo->gen >= 8) {
 269       w.w[GEN_L3P_ALL] = 1.0;
 270    } else {
 271       w.w[GEN_L3P_DC] = needs_dc ? 0.1 : 0;
 272       w.w[GEN_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
 273    }
 274
 275    return norm_l3_weights(w);
 276 }
 277
 278 /**
 279  * Get the default L3 configuration
 280  */
 281 const struct gen_l3_config *
 282 gen_get_default_l3_config(const struct gen_device_info *devinfo)
 283 {
 284    /* For efficiency assume that the first entry of the array matches the
 285     * default configuration.
 286     */
 287    const struct gen_l3_config *const cfg = get_l3_configs(devinfo);
 288    assert(cfg == gen_get_l3_config(devinfo,
 289                     gen_get_default_l3_weights(devinfo, false, false)));
 290    return cfg;
 291 }
 292
 293 /**
 294  * Return the closest validated L3 configuration for the specified device and
 295  * weight vector.
 296  */
 297 const struct gen_l3_config *
 298 gen_get_l3_config(const struct gen_device_info *devinfo,
 299                   struct gen_l3_weights w0)
 300 {
 301    const struct gen_l3_config *const cfgs = get_l3_configs(devinfo);
 302    const struct gen_l3_config *cfg_best = NULL;
 303    float dw_best = HUGE_VALF;
 304
 305    for (const struct gen_l3_config *cfg = cfgs; cfg->n[GEN_L3P_URB]; cfg++) {
 306       const float dw = gen_diff_l3_weights(w0, gen_get_l3_config_weights(cfg));
 307
 308       if (dw < dw_best) {
 309          cfg_best = cfg;
 310          dw_best = dw;
 311       }
 312    }
 313
 314    return cfg_best;
 315 }
 316
 317 /**
 318  * Return the size of an L3 way in KB.
 319  */
 320 static unsigned
 321 get_l3_way_size(const struct gen_device_info *devinfo)
 322 {
 323    const unsigned way_size_per_bank =
 324       (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen == 11 ?
 325       4 : 2;
 326
 327    assert(devinfo->l3_banks);
 328    return way_size_per_bank * devinfo->l3_banks;
 329 }
 330
 331 /**
 332  * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
 333  * gen_device_info::urb::size.
 334  */
 335 static unsigned
 336 get_urb_size_scale(const struct gen_device_info *devinfo)
 337 {
 338    return (devinfo->gen >= 8 ? devinfo->num_slices : 1);
 339 }
 340
 341 unsigned
 342 gen_get_l3_config_urb_size(const struct gen_device_info *devinfo,
 343                            const struct gen_l3_config *cfg)
 344 {
 345    /* From the SKL "L3 Allocation and Programming" documentation:
 346     *
 347     * "URB is limited to 1008KB due to programming restrictions.  This is not
 348     * a restriction of the L3 implementation, but of the FF and other clients.
 349     * Therefore, in a GT4 implementation it is possible for the programmed
 350     * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 351     * only 1008KB of this will be used."
 352     */
 353    const unsigned max = (devinfo->gen == 9 ? 1008 : ~0);
 354    return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) /
 355           get_urb_size_scale(devinfo);
 356 }
 357
 358 /**
 359  * Print out the specified L3 configuration.
 360  */
 361 void
 362 gen_dump_l3_config(const struct gen_l3_config *cfg, FILE *fp)
 363 {
 364    fprintf(stderr, "SLM=%d URB=%d ALL=%d DC=%d RO=%d IS=%d C=%d T=%d\n",
 365            cfg->n[GEN_L3P_SLM], cfg->n[GEN_L3P_URB], cfg->n[GEN_L3P_ALL],
 366            cfg->n[GEN_L3P_DC], cfg->n[GEN_L3P_RO],
 367            cfg->n[GEN_L3P_IS], cfg->n[GEN_L3P_C], cfg->n[GEN_L3P_T]);
 368 }