2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
35 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
40 return opcode
== BRW_OPCODE_IF
||
41 opcode
== BRW_OPCODE_ELSE
||
42 opcode
== BRW_OPCODE_ENDIF
||
43 opcode
== BRW_OPCODE_WHILE
||
44 opcode
== BRW_OPCODE_BREAK
||
45 opcode
== BRW_OPCODE_CONTINUE
||
46 opcode
== BRW_OPCODE_HALT
;
50 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
55 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
56 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
57 opcode
== BRW_OPCODE_BREAK
||
58 opcode
== BRW_OPCODE_CONTINUE
||
59 opcode
== BRW_OPCODE_HALT
;
63 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
68 return opcode
== BRW_OPCODE_IF
||
69 opcode
== BRW_OPCODE_ELSE
;
70 /* opcode == BRW_OPCODE_GOTO; */
74 is_logic_instruction(unsigned opcode
)
76 return opcode
== BRW_OPCODE_AND
||
77 opcode
== BRW_OPCODE_NOT
||
78 opcode
== BRW_OPCODE_OR
||
79 opcode
== BRW_OPCODE_XOR
;
82 const char *const conditional_modifier
[16] = {
83 [BRW_CONDITIONAL_NONE
] = "",
84 [BRW_CONDITIONAL_Z
] = ".z",
85 [BRW_CONDITIONAL_NZ
] = ".nz",
86 [BRW_CONDITIONAL_G
] = ".g",
87 [BRW_CONDITIONAL_GE
] = ".ge",
88 [BRW_CONDITIONAL_L
] = ".l",
89 [BRW_CONDITIONAL_LE
] = ".le",
90 [BRW_CONDITIONAL_R
] = ".r",
91 [BRW_CONDITIONAL_O
] = ".o",
92 [BRW_CONDITIONAL_U
] = ".u",
95 static const char *const m_negate
[2] = {
100 static const char *const _abs
[2] = {
105 static const char *const m_bitnot
[2] = { "", "~" };
107 static const char *const vert_stride
[16] = {
118 static const char *const width
[8] = {
126 static const char *const horiz_stride
[4] = {
133 static const char *const chan_sel
[4] = {
140 static const char *const debug_ctrl
[2] = {
145 static const char *const saturate
[2] = {
150 static const char *const cmpt_ctrl
[2] = {
155 static const char *const accwr
[2] = {
160 static const char *const branch_ctrl
[2] = {
165 static const char *const wectrl
[2] = {
170 static const char *const exec_size
[8] = {
179 static const char *const pred_inv
[2] = {
184 const char *const pred_ctrl_align16
[16] = {
194 static const char *const pred_ctrl_align1
[16] = {
195 [BRW_PREDICATE_NORMAL
] = "",
196 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
197 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
198 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
199 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
200 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
201 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
202 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
203 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
204 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
205 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
206 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
207 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
210 static const char *const thread_ctrl
[4] = {
211 [BRW_THREAD_NORMAL
] = "",
212 [BRW_THREAD_ATOMIC
] = "atomic",
213 [BRW_THREAD_SWITCH
] = "switch",
216 static const char *const compr_ctrl
[4] = {
223 static const char *const dep_ctrl
[4] = {
227 [3] = "NoDDClr,NoDDChk",
230 static const char *const mask_ctrl
[4] = {
235 static const char *const access_mode
[2] = {
240 static const char * const reg_encoding
[] = {
241 [BRW_HW_REG_TYPE_UD
] = "UD",
242 [BRW_HW_REG_TYPE_D
] = "D",
243 [BRW_HW_REG_TYPE_UW
] = "UW",
244 [BRW_HW_REG_TYPE_W
] = "W",
245 [BRW_HW_REG_NON_IMM_TYPE_UB
] = "UB",
246 [BRW_HW_REG_NON_IMM_TYPE_B
] = "B",
247 [GEN7_HW_REG_NON_IMM_TYPE_DF
] = "DF",
248 [BRW_HW_REG_TYPE_F
] = "F",
249 [GEN8_HW_REG_TYPE_UQ
] = "UQ",
250 [GEN8_HW_REG_TYPE_Q
] = "Q",
251 [GEN8_HW_REG_NON_IMM_TYPE_HF
] = "HF",
254 static const char *const three_source_reg_encoding
[] = {
255 [BRW_3SRC_TYPE_F
] = "F",
256 [BRW_3SRC_TYPE_D
] = "D",
257 [BRW_3SRC_TYPE_UD
] = "UD",
258 [BRW_3SRC_TYPE_DF
] = "DF",
261 static const char *const reg_file
[4] = {
268 static const char *const writemask
[16] = {
287 static const char *const end_of_thread
[2] = {
292 /* SFIDs on Gen4-5 */
293 static const char *const gen4_sfid
[16] = {
294 [BRW_SFID_NULL
] = "null",
295 [BRW_SFID_MATH
] = "math",
296 [BRW_SFID_SAMPLER
] = "sampler",
297 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
298 [BRW_SFID_DATAPORT_READ
] = "read",
299 [BRW_SFID_DATAPORT_WRITE
] = "write",
300 [BRW_SFID_URB
] = "urb",
301 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
302 [BRW_SFID_VME
] = "vme",
305 static const char *const gen6_sfid
[16] = {
306 [BRW_SFID_NULL
] = "null",
307 [BRW_SFID_MATH
] = "math",
308 [BRW_SFID_SAMPLER
] = "sampler",
309 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
310 [BRW_SFID_URB
] = "urb",
311 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
312 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "sampler",
313 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
314 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
315 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
316 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
317 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
318 [HSW_SFID_CRE
] = "cre",
321 static const char *const gen7_gateway_subfuncid
[8] = {
322 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
323 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
324 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
325 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
326 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
327 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
328 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
331 static const char *const gen4_dp_read_port_msg_type
[4] = {
332 [0b00] = "OWord Block Read",
333 [0b01] = "OWord Dual Block Read",
334 [0b10] = "Media Block Read",
335 [0b11] = "DWord Scattered Read",
338 static const char *const g45_dp_read_port_msg_type
[8] = {
339 [0b000] = "OWord Block Read",
340 [0b010] = "OWord Dual Block Read",
341 [0b100] = "Media Block Read",
342 [0b110] = "DWord Scattered Read",
343 [0b001] = "Render Target UNORM Read",
344 [0b011] = "AVC Loop Filter Read",
347 static const char *const dp_write_port_msg_type
[8] = {
348 [0b000] = "OWord block write",
349 [0b001] = "OWord dual block write",
350 [0b010] = "media block write",
351 [0b011] = "DWord scattered write",
352 [0b100] = "RT write",
353 [0b101] = "streamed VB write",
354 [0b110] = "RT UNORM write", /* G45+ */
355 [0b111] = "flush render cache",
358 static const char *const dp_rc_msg_type_gen6
[16] = {
359 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
360 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
361 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
362 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
363 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
364 "OWORD unaligned block read",
365 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
366 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
368 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
369 "OWORD dual block write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
371 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
372 "DWORD scattered write",
373 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
374 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
375 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
378 static const char *const dp_rc_msg_type_gen7
[16] = {
379 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
380 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
381 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
382 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
383 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
384 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
385 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
388 static const char *const dp_rc_msg_type_gen9
[16] = {
389 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
390 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
393 static const char *const *
394 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
396 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
397 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
398 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
399 dp_write_port_msg_type
);
402 static const char *const m_rt_write_subtype
[] = {
404 [0b001] = "SIMD16/RepData",
405 [0b010] = "SIMD8/DualSrcLow",
406 [0b011] = "SIMD8/DualSrcHigh",
408 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
409 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
412 static const char *const dp_dc0_msg_type_gen7
[16] = {
413 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
414 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
415 "DC unaligned OWORD block read",
416 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
417 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
418 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
419 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
420 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
421 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
422 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
423 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
424 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
425 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
426 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
429 static const char *const dp_dc1_msg_type_hsw
[16] = {
430 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
431 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
432 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
433 "DC untyped 4x2 atomic op",
434 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
435 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
436 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
437 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
438 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
439 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
440 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
441 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
442 "DC 4x2 atomic counter op",
443 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
446 static const char *const aop
[16] = {
447 [BRW_AOP_AND
] = "and",
449 [BRW_AOP_XOR
] = "xor",
450 [BRW_AOP_MOV
] = "mov",
451 [BRW_AOP_INC
] = "inc",
452 [BRW_AOP_DEC
] = "dec",
453 [BRW_AOP_ADD
] = "add",
454 [BRW_AOP_SUB
] = "sub",
455 [BRW_AOP_REVSUB
] = "revsub",
456 [BRW_AOP_IMAX
] = "imax",
457 [BRW_AOP_IMIN
] = "imin",
458 [BRW_AOP_UMAX
] = "umax",
459 [BRW_AOP_UMIN
] = "umin",
460 [BRW_AOP_CMPWR
] = "cmpwr",
461 [BRW_AOP_PREDEC
] = "predec",
464 static const char * const pixel_interpolator_msg_types
[4] = {
465 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
466 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
467 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
468 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
471 static const char *const math_function
[16] = {
472 [BRW_MATH_FUNCTION_INV
] = "inv",
473 [BRW_MATH_FUNCTION_LOG
] = "log",
474 [BRW_MATH_FUNCTION_EXP
] = "exp",
475 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
476 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
477 [BRW_MATH_FUNCTION_SIN
] = "sin",
478 [BRW_MATH_FUNCTION_COS
] = "cos",
479 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
480 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
481 [BRW_MATH_FUNCTION_POW
] = "pow",
482 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
483 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
484 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
485 [GEN8_MATH_FUNCTION_INVM
] = "invm",
486 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
489 static const char *const math_saturate
[2] = {
494 static const char *const math_signed
[2] = {
499 static const char *const math_scalar
[2] = {
504 static const char *const math_precision
[2] = {
506 [1] = "partial_precision"
509 static const char *const gen5_urb_opcode
[] = {
514 static const char *const gen7_urb_opcode
[] = {
515 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
516 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
517 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
518 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
519 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
520 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
521 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
522 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
523 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
524 /* [9-15] - reserved */
527 static const char *const urb_swizzle
[4] = {
528 [BRW_URB_SWIZZLE_NONE
] = "",
529 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
530 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
533 static const char *const urb_allocate
[2] = {
538 static const char *const urb_used
[2] = {
543 static const char *const urb_complete
[2] = {
548 static const char *const gen5_sampler_msg_type
[] = {
549 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
550 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
551 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
552 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
553 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
554 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
555 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
556 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
557 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
558 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
559 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
560 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
561 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
562 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
563 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
564 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
565 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
566 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
567 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
568 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
569 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
570 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
571 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
574 static const char *const gen5_sampler_simd_mode
[4] = {
575 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
576 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
577 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
578 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
581 static const char *const sampler_target_format
[4] = {
591 string(FILE *file
, const char *string
)
594 column
+= strlen(string
);
599 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
602 format(FILE *f
, const char *format
, ...)
606 va_start(args
, format
);
608 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
632 control(FILE *file
, const char *name
, const char *const ctrl
[],
633 unsigned id
, int *space
)
636 fprintf(file
, "*** invalid %s value %d ", name
, id
);
642 string(file
, ctrl
[id
]);
650 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
653 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
655 format(file
, "*** invalid opcode value %d ", id
);
658 string(file
, desc
->name
);
663 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
667 /* Clear the Compr4 instruction compression bit. */
668 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
669 _reg_nr
&= ~BRW_MRF_COMPR4
;
671 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
672 switch (_reg_nr
& 0xf0) {
674 string(file
, "null");
676 case BRW_ARF_ADDRESS
:
677 format(file
, "a%d", _reg_nr
& 0x0f);
679 case BRW_ARF_ACCUMULATOR
:
680 format(file
, "acc%d", _reg_nr
& 0x0f);
683 format(file
, "f%d", _reg_nr
& 0x0f);
686 format(file
, "mask%d", _reg_nr
& 0x0f);
688 case BRW_ARF_MASK_STACK
:
689 format(file
, "msd%d", _reg_nr
& 0x0f);
692 format(file
, "sr%d", _reg_nr
& 0x0f);
694 case BRW_ARF_CONTROL
:
695 format(file
, "cr%d", _reg_nr
& 0x0f);
697 case BRW_ARF_NOTIFICATION_COUNT
:
698 format(file
, "n%d", _reg_nr
& 0x0f);
705 format(file
, "tdr0");
707 case BRW_ARF_TIMESTAMP
:
708 format(file
, "tm%d", _reg_nr
& 0x0f);
711 format(file
, "ARF%d", _reg_nr
);
715 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
716 format(file
, "%d", _reg_nr
);
722 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
724 unsigned elem_size
= brw_element_size(devinfo
, inst
, dst
);
727 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
728 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
729 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
730 brw_inst_dst_da_reg_nr(devinfo
, inst
));
733 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
734 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
737 err
|= control(file
, "horiz stride", horiz_stride
,
738 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
740 err
|= control(file
, "dest reg encoding", reg_encoding
,
741 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
743 string(file
, "g[a0");
744 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
745 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
747 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
748 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
750 err
|= control(file
, "horiz stride", horiz_stride
,
751 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
753 err
|= control(file
, "dest reg encoding", reg_encoding
,
754 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
757 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
758 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
759 brw_inst_dst_da_reg_nr(devinfo
, inst
));
762 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
763 format(file
, ".%u", 16 / elem_size
);
765 err
|= control(file
, "writemask", writemask
,
766 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
767 err
|= control(file
, "dest reg encoding", reg_encoding
,
768 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
771 string(file
, "Indirect align16 address mode not supported");
779 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
784 if (devinfo
->gen
== 6 && brw_inst_3src_dst_reg_file(devinfo
, inst
))
785 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
787 reg_file
= BRW_GENERAL_REGISTER_FILE
;
789 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
792 if (brw_inst_3src_dst_subreg_nr(devinfo
, inst
))
793 format(file
, ".%"PRIu64
, brw_inst_3src_dst_subreg_nr(devinfo
, inst
));
795 err
|= control(file
, "writemask", writemask
,
796 brw_inst_3src_dst_writemask(devinfo
, inst
), NULL
);
797 err
|= control(file
, "dest reg encoding", three_source_reg_encoding
,
798 brw_inst_3src_dst_type(devinfo
, inst
), NULL
);
804 src_align1_region(FILE *file
,
805 unsigned _vert_stride
, unsigned _width
,
806 unsigned _horiz_stride
)
810 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
812 err
|= control(file
, "width", width
, _width
, NULL
);
814 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
821 const struct gen_device_info
*devinfo
,
823 unsigned type
, unsigned _reg_file
,
824 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
825 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
830 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
831 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
833 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
835 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
837 err
|= reg(file
, _reg_file
, reg_num
);
841 unsigned elem_size
= brw_hw_reg_type_to_size(devinfo
, type
, _reg_file
);
842 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
844 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
845 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
851 const struct gen_device_info
*devinfo
,
856 unsigned _addr_subreg_nr
,
859 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
863 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
864 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
866 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
868 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
870 string(file
, "g[a0");
872 format(file
, ".%d", _addr_subreg_nr
);
874 format(file
, " %d", _addr_imm
);
876 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
877 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
882 src_swizzle(FILE *file
, unsigned swiz
)
884 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
885 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
886 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
887 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
890 if (x
== y
&& x
== z
&& x
== w
) {
892 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
893 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
895 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
896 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
897 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
898 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
905 const struct gen_device_info
*devinfo
,
909 unsigned _vert_stride
,
914 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
918 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
919 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
921 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
923 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
925 err
|= reg(file
, _reg_file
, _reg_nr
);
930 brw_hw_reg_type_to_size(devinfo
, _reg_type
, _reg_file
);
932 /* bit4 for subreg number byte addressing. Make this same meaning as
933 in da1 case, so output looks consistent. */
934 format(file
, ".%d", 16 / elem_size
);
937 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
939 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
940 err
|= control(file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
945 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
948 unsigned src0_subreg_nr
= brw_inst_3src_src0_subreg_nr(devinfo
, inst
);
950 err
|= control(file
, "negate", m_negate
,
951 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
952 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
954 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
955 brw_inst_3src_src0_reg_nr(devinfo
, inst
));
958 if (src0_subreg_nr
|| brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
959 format(file
, ".%d", src0_subreg_nr
);
960 if (brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
961 string(file
, "<0,1,0>");
963 string(file
, "<4,4,1>");
964 err
|= src_swizzle(file
, brw_inst_3src_src0_swizzle(devinfo
, inst
));
966 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
967 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
972 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
975 unsigned src1_subreg_nr
= brw_inst_3src_src1_subreg_nr(devinfo
, inst
);
977 err
|= control(file
, "negate", m_negate
,
978 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
979 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
981 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
982 brw_inst_3src_src1_reg_nr(devinfo
, inst
));
985 if (src1_subreg_nr
|| brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
986 format(file
, ".%d", src1_subreg_nr
);
987 if (brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
988 string(file
, "<0,1,0>");
990 string(file
, "<4,4,1>");
991 err
|= src_swizzle(file
, brw_inst_3src_src1_swizzle(devinfo
, inst
));
993 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
994 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1000 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1003 unsigned src2_subreg_nr
= brw_inst_3src_src2_subreg_nr(devinfo
, inst
);
1005 err
|= control(file
, "negate", m_negate
,
1006 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1007 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1009 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
1010 brw_inst_3src_src2_reg_nr(devinfo
, inst
));
1013 if (src2_subreg_nr
|| brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1014 format(file
, ".%d", src2_subreg_nr
);
1015 if (brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1016 string(file
, "<0,1,0>");
1018 string(file
, "<4,4,1>");
1019 err
|= src_swizzle(file
, brw_inst_3src_src2_swizzle(devinfo
, inst
));
1021 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1022 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1027 imm(FILE *file
, const struct gen_device_info
*devinfo
, unsigned type
, const brw_inst
*inst
)
1030 case BRW_HW_REG_TYPE_UD
:
1031 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1033 case BRW_HW_REG_TYPE_D
:
1034 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1036 case BRW_HW_REG_TYPE_UW
:
1037 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1039 case BRW_HW_REG_TYPE_W
:
1040 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1042 case BRW_HW_REG_IMM_TYPE_UV
:
1043 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1045 case BRW_HW_REG_IMM_TYPE_VF
:
1046 format(file
, "[%-gF, %-gF, %-gF, %-gF]VF",
1047 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1048 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1049 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1050 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1052 case BRW_HW_REG_IMM_TYPE_V
:
1053 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1055 case BRW_HW_REG_TYPE_F
:
1056 format(file
, "%-gF", brw_inst_imm_f(devinfo
, inst
));
1058 case GEN8_HW_REG_IMM_TYPE_DF
:
1059 format(file
, "%-gDF", brw_inst_imm_df(devinfo
, inst
));
1061 case GEN8_HW_REG_IMM_TYPE_HF
:
1062 string(file
, "Half Float IMM");
1069 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1071 if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1072 return imm(file
, devinfo
, brw_inst_src0_reg_type(devinfo
, inst
), inst
);
1073 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1074 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1075 return src_da1(file
,
1077 brw_inst_opcode(devinfo
, inst
),
1078 brw_inst_src0_reg_type(devinfo
, inst
),
1079 brw_inst_src0_reg_file(devinfo
, inst
),
1080 brw_inst_src0_vstride(devinfo
, inst
),
1081 brw_inst_src0_width(devinfo
, inst
),
1082 brw_inst_src0_hstride(devinfo
, inst
),
1083 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1084 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1085 brw_inst_src0_abs(devinfo
, inst
),
1086 brw_inst_src0_negate(devinfo
, inst
));
1088 return src_ia1(file
,
1090 brw_inst_opcode(devinfo
, inst
),
1091 brw_inst_src0_reg_type(devinfo
, inst
),
1092 brw_inst_src0_reg_file(devinfo
, inst
),
1093 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1094 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1095 brw_inst_src0_negate(devinfo
, inst
),
1096 brw_inst_src0_abs(devinfo
, inst
),
1097 brw_inst_src0_hstride(devinfo
, inst
),
1098 brw_inst_src0_width(devinfo
, inst
),
1099 brw_inst_src0_vstride(devinfo
, inst
));
1102 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1103 return src_da16(file
,
1105 brw_inst_opcode(devinfo
, inst
),
1106 brw_inst_src0_reg_type(devinfo
, inst
),
1107 brw_inst_src0_reg_file(devinfo
, inst
),
1108 brw_inst_src0_vstride(devinfo
, inst
),
1109 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1110 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1111 brw_inst_src0_abs(devinfo
, inst
),
1112 brw_inst_src0_negate(devinfo
, inst
),
1113 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1114 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1115 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1116 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1118 string(file
, "Indirect align16 address mode not supported");
1125 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1127 if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1128 return imm(file
, devinfo
, brw_inst_src1_reg_type(devinfo
, inst
), inst
);
1129 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1130 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1131 return src_da1(file
,
1133 brw_inst_opcode(devinfo
, inst
),
1134 brw_inst_src1_reg_type(devinfo
, inst
),
1135 brw_inst_src1_reg_file(devinfo
, inst
),
1136 brw_inst_src1_vstride(devinfo
, inst
),
1137 brw_inst_src1_width(devinfo
, inst
),
1138 brw_inst_src1_hstride(devinfo
, inst
),
1139 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1140 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1141 brw_inst_src1_abs(devinfo
, inst
),
1142 brw_inst_src1_negate(devinfo
, inst
));
1144 return src_ia1(file
,
1146 brw_inst_opcode(devinfo
, inst
),
1147 brw_inst_src1_reg_type(devinfo
, inst
),
1148 brw_inst_src1_reg_file(devinfo
, inst
),
1149 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1150 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1151 brw_inst_src1_negate(devinfo
, inst
),
1152 brw_inst_src1_abs(devinfo
, inst
),
1153 brw_inst_src1_hstride(devinfo
, inst
),
1154 brw_inst_src1_width(devinfo
, inst
),
1155 brw_inst_src1_vstride(devinfo
, inst
));
1158 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1159 return src_da16(file
,
1161 brw_inst_opcode(devinfo
, inst
),
1162 brw_inst_src1_reg_type(devinfo
, inst
),
1163 brw_inst_src1_reg_file(devinfo
, inst
),
1164 brw_inst_src1_vstride(devinfo
, inst
),
1165 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1166 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1167 brw_inst_src1_abs(devinfo
, inst
),
1168 brw_inst_src1_negate(devinfo
, inst
),
1169 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1170 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1171 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1172 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1174 string(file
, "Indirect align16 address mode not supported");
1181 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1183 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1184 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1185 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1186 brw_inst_nib_control(devinfo
, inst
);
1188 if (exec_size
< 8 || nib_ctl
) {
1189 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1190 } else if (exec_size
== 8) {
1193 string(file
, " 1Q");
1196 string(file
, " 2Q");
1199 string(file
, " 3Q");
1202 string(file
, " 4Q");
1205 } else if (exec_size
== 16) {
1207 string(file
, " 1H");
1209 string(file
, " 2H");
1215 static __attribute__((__unused__
)) int
1216 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1217 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1220 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1221 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1222 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1227 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1228 const brw_inst
*inst
, bool is_compacted
)
1233 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1234 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1236 if (brw_inst_pred_control(devinfo
, inst
)) {
1238 err
|= control(file
, "predicate inverse", pred_inv
,
1239 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1240 format(file
, "f%"PRIu64
, devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1241 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1242 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1243 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1244 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1245 brw_inst_pred_control(devinfo
, inst
), NULL
);
1247 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1248 brw_inst_pred_control(devinfo
, inst
), NULL
);
1253 err
|= print_opcode(file
, devinfo
, opcode
);
1254 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1257 err
|= control(file
, "debug control", debug_ctrl
,
1258 brw_inst_debug_control(devinfo
, inst
), NULL
);
1260 if (opcode
== BRW_OPCODE_MATH
) {
1262 err
|= control(file
, "function", math_function
,
1263 brw_inst_math_function(devinfo
, inst
), NULL
);
1264 } else if (opcode
!= BRW_OPCODE_SEND
&& opcode
!= BRW_OPCODE_SENDC
) {
1265 err
|= control(file
, "conditional modifier", conditional_modifier
,
1266 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1268 /* If we're using the conditional modifier, print which flags reg is
1269 * used for it. Note that on gen6+, the embedded-condition SEL and
1270 * control flow doesn't update flags.
1272 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1273 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1274 opcode
!= BRW_OPCODE_IF
&&
1275 opcode
!= BRW_OPCODE_WHILE
))) {
1276 format(file
, ".f%"PRIu64
,
1277 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1278 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1279 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1283 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1285 err
|= control(file
, "execution size", exec_size
,
1286 brw_inst_exec_size(devinfo
, inst
), NULL
);
1290 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1291 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1293 if (has_uip(devinfo
, opcode
)) {
1294 /* Instructions that have UIP also have JIP. */
1296 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1298 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1299 } else if (has_jip(devinfo
, opcode
)) {
1301 if (devinfo
->gen
>= 7) {
1302 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1304 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1306 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1307 opcode
== BRW_OPCODE_CONTINUE
||
1308 opcode
== BRW_OPCODE_ELSE
)) {
1310 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1312 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1313 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1314 opcode
== BRW_OPCODE_IFF
||
1315 opcode
== BRW_OPCODE_HALT
)) {
1317 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1318 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1320 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1321 } else if (opcode
== BRW_OPCODE_JMPI
) {
1323 err
|= src1(file
, devinfo
, inst
);
1324 } else if (desc
&& desc
->nsrc
== 3) {
1326 err
|= dest_3src(file
, devinfo
, inst
);
1329 err
|= src0_3src(file
, devinfo
, inst
);
1332 err
|= src1_3src(file
, devinfo
, inst
);
1335 err
|= src2_3src(file
, devinfo
, inst
);
1337 if (desc
->ndst
> 0) {
1339 err
|= dest(file
, devinfo
, inst
);
1342 if (desc
->nsrc
> 0) {
1344 err
|= src0(file
, devinfo
, inst
);
1347 if (desc
->nsrc
> 1) {
1349 err
|= src1(file
, devinfo
, inst
);
1353 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
) {
1354 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1356 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1357 /* show the indirect descriptor source */
1359 err
|= src1(file
, devinfo
, inst
);
1367 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1371 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1372 format(file
, " indirect");
1376 err
|= control(file
, "math function", math_function
,
1377 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1378 err
|= control(file
, "math saturate", math_saturate
,
1379 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1380 err
|= control(file
, "math signed", math_signed
,
1381 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1382 err
|= control(file
, "math scalar", math_scalar
,
1383 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1384 err
|= control(file
, "math precision", math_precision
,
1385 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1387 case BRW_SFID_SAMPLER
:
1388 if (devinfo
->gen
>= 5) {
1389 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1390 brw_inst_sampler_msg_type(devinfo
, inst
), &space
);
1391 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1392 brw_inst_sampler_simd_mode(devinfo
, inst
), &space
);
1393 format(file
, " Surface = %"PRIu64
" Sampler = %"PRIu64
,
1394 brw_inst_binding_table_index(devinfo
, inst
),
1395 brw_inst_sampler(devinfo
, inst
));
1397 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", ",
1398 brw_inst_binding_table_index(devinfo
, inst
),
1399 brw_inst_sampler(devinfo
, inst
),
1400 brw_inst_sampler_msg_type(devinfo
, inst
));
1401 if (!devinfo
->is_g4x
) {
1402 err
|= control(file
, "sampler target format",
1403 sampler_target_format
,
1404 brw_inst_sampler_return_format(devinfo
, inst
), NULL
);
1409 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1410 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1411 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1412 if (devinfo
->gen
>= 6) {
1413 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", %"PRIu64
")",
1414 brw_inst_binding_table_index(devinfo
, inst
),
1415 brw_inst_dp_msg_control(devinfo
, inst
),
1416 brw_inst_dp_msg_type(devinfo
, inst
),
1417 devinfo
->gen
>= 7 ? 0 : brw_inst_dp_write_commit(devinfo
, inst
));
1419 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1420 err
|= control(file
, "DP read message type",
1421 is_965
? gen4_dp_read_port_msg_type
:
1422 g45_dp_read_port_msg_type
,
1423 brw_inst_dp_read_msg_type(devinfo
, inst
),
1426 format(file
, " MsgCtrl = 0x%"PRIx64
,
1427 brw_inst_dp_read_msg_control(devinfo
, inst
));
1429 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1433 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1434 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1435 unsigned msg_type
= brw_inst_dp_write_msg_type(devinfo
, inst
);
1437 err
|= control(file
, "DP rc message type",
1438 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1440 bool is_rt_write
= msg_type
==
1441 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1442 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1445 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1446 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1447 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1448 string(file
, " Hi");
1449 if (brw_inst_rt_last(devinfo
, inst
))
1450 string(file
, " LastRT");
1451 if (devinfo
->gen
< 7 && brw_inst_dp_write_commit(devinfo
, inst
))
1452 string(file
, " WriteCommit");
1454 format(file
, " MsgCtrl = 0x%"PRIx64
,
1455 brw_inst_dp_write_msg_control(devinfo
, inst
));
1458 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1462 case BRW_SFID_URB
: {
1463 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1465 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1469 err
|= control(file
, "urb opcode",
1470 devinfo
->gen
>= 7 ? gen7_urb_opcode
1474 if (devinfo
->gen
>= 7 &&
1475 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1476 string(file
, " per-slot");
1479 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1480 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1481 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1482 string(file
, " masked");
1484 err
|= control(file
, "urb swizzle", urb_swizzle
,
1485 brw_inst_urb_swizzle_control(devinfo
, inst
),
1489 if (devinfo
->gen
< 7) {
1490 err
|= control(file
, "urb allocate", urb_allocate
,
1491 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1492 err
|= control(file
, "urb used", urb_used
,
1493 brw_inst_urb_used(devinfo
, inst
), &space
);
1495 if (devinfo
->gen
< 8) {
1496 err
|= control(file
, "urb complete", urb_complete
,
1497 brw_inst_urb_complete(devinfo
, inst
), &space
);
1501 case BRW_SFID_THREAD_SPAWNER
:
1504 case BRW_SFID_MESSAGE_GATEWAY
:
1505 format(file
, " (%s)",
1506 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1509 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1510 if (devinfo
->gen
>= 7) {
1513 err
|= control(file
, "DP DC0 message type",
1514 dp_dc0_msg_type_gen7
,
1515 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1517 format(file
, ", %"PRIu64
", ", brw_inst_binding_table_index(devinfo
, inst
));
1519 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1520 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1521 control(file
, "atomic op", aop
,
1522 brw_inst_imm_ud(devinfo
, inst
) >> 8 & 0xf, &space
);
1525 format(file
, "%"PRIu64
, brw_inst_dp_msg_control(devinfo
, inst
));
1532 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1533 if (devinfo
->gen
>= 7) {
1536 unsigned msg_ctrl
= brw_inst_dp_msg_control(devinfo
, inst
);
1538 err
|= control(file
, "DP DC1 message type",
1539 dp_dc1_msg_type_hsw
,
1540 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1542 format(file
, ", Surface = %"PRIu64
", ",
1543 brw_inst_binding_table_index(devinfo
, inst
));
1545 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1546 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1547 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1548 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1549 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1551 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1552 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1553 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1554 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1556 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1557 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1558 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1559 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
: {
1560 static const char *simd_modes
[] = { "4x2", "16", "8" };
1561 format(file
, "SIMD%s, Mask = 0x%x",
1562 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1566 format(file
, "0x%x", msg_ctrl
);
1574 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1575 if (devinfo
->gen
>= 7) {
1576 format(file
, " (%s, %s, 0x%02"PRIx64
")",
1577 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1578 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1579 brw_inst_pi_message_data(devinfo
, inst
));
1585 format(file
, "unsupported shared function ID %d", sfid
);
1591 format(file
, "mlen %"PRIu64
, brw_inst_mlen(devinfo
, inst
));
1592 format(file
, " rlen %"PRIu64
, brw_inst_rlen(devinfo
, inst
));
1596 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1599 err
|= control(file
, "access mode", access_mode
,
1600 brw_inst_access_mode(devinfo
, inst
), &space
);
1601 if (devinfo
->gen
>= 6) {
1602 err
|= control(file
, "write enable control", wectrl
,
1603 brw_inst_mask_control(devinfo
, inst
), &space
);
1605 err
|= control(file
, "mask control", mask_ctrl
,
1606 brw_inst_mask_control(devinfo
, inst
), &space
);
1608 err
|= control(file
, "dependency control", dep_ctrl
,
1609 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
1610 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
1612 if (devinfo
->gen
>= 6)
1613 err
|= qtr_ctrl(file
, devinfo
, inst
);
1615 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
1616 desc
&& desc
->ndst
> 0 &&
1617 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
1618 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
1619 format(file
, " compr4");
1621 err
|= control(file
, "compression control", compr_ctrl
,
1622 brw_inst_qtr_control(devinfo
, inst
), &space
);
1626 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
1627 err
|= control(file
, "thread control", thread_ctrl
,
1628 brw_inst_thread_control(devinfo
, inst
), &space
);
1629 if (has_branch_ctrl(devinfo
, opcode
)) {
1630 err
|= control(file
, "branch ctrl", branch_ctrl
,
1631 brw_inst_branch_control(devinfo
, inst
), &space
);
1632 } else if (devinfo
->gen
>= 6) {
1633 err
|= control(file
, "acc write control", accwr
,
1634 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
1636 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
)
1637 err
|= control(file
, "end of thread", end_of_thread
,
1638 brw_inst_eot(devinfo
, inst
), &space
);