2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
35 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
40 return opcode
== BRW_OPCODE_IF
||
41 opcode
== BRW_OPCODE_ELSE
||
42 opcode
== BRW_OPCODE_ENDIF
||
43 opcode
== BRW_OPCODE_WHILE
||
44 opcode
== BRW_OPCODE_BREAK
||
45 opcode
== BRW_OPCODE_CONTINUE
||
46 opcode
== BRW_OPCODE_HALT
;
50 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
55 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
56 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
57 opcode
== BRW_OPCODE_BREAK
||
58 opcode
== BRW_OPCODE_CONTINUE
||
59 opcode
== BRW_OPCODE_HALT
;
63 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
68 return opcode
== BRW_OPCODE_IF
||
69 opcode
== BRW_OPCODE_ELSE
;
70 /* opcode == BRW_OPCODE_GOTO; */
74 is_logic_instruction(unsigned opcode
)
76 return opcode
== BRW_OPCODE_AND
||
77 opcode
== BRW_OPCODE_NOT
||
78 opcode
== BRW_OPCODE_OR
||
79 opcode
== BRW_OPCODE_XOR
;
82 const char *const conditional_modifier
[16] = {
83 [BRW_CONDITIONAL_NONE
] = "",
84 [BRW_CONDITIONAL_Z
] = ".z",
85 [BRW_CONDITIONAL_NZ
] = ".nz",
86 [BRW_CONDITIONAL_G
] = ".g",
87 [BRW_CONDITIONAL_GE
] = ".ge",
88 [BRW_CONDITIONAL_L
] = ".l",
89 [BRW_CONDITIONAL_LE
] = ".le",
90 [BRW_CONDITIONAL_R
] = ".r",
91 [BRW_CONDITIONAL_O
] = ".o",
92 [BRW_CONDITIONAL_U
] = ".u",
95 static const char *const m_negate
[2] = {
100 static const char *const _abs
[2] = {
105 static const char *const m_bitnot
[2] = { "", "~" };
107 static const char *const vert_stride
[16] = {
118 static const char *const width
[8] = {
126 static const char *const horiz_stride
[4] = {
133 static const char *const chan_sel
[4] = {
140 static const char *const debug_ctrl
[2] = {
145 static const char *const saturate
[2] = {
150 static const char *const cmpt_ctrl
[2] = {
155 static const char *const accwr
[2] = {
160 static const char *const branch_ctrl
[2] = {
165 static const char *const wectrl
[2] = {
170 static const char *const exec_size
[8] = {
179 static const char *const pred_inv
[2] = {
184 const char *const pred_ctrl_align16
[16] = {
194 static const char *const pred_ctrl_align1
[16] = {
195 [BRW_PREDICATE_NORMAL
] = "",
196 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
197 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
198 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
199 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
200 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
201 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
202 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
203 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
204 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
205 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
206 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
207 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
210 static const char *const thread_ctrl
[4] = {
211 [BRW_THREAD_NORMAL
] = "",
212 [BRW_THREAD_ATOMIC
] = "atomic",
213 [BRW_THREAD_SWITCH
] = "switch",
216 static const char *const compr_ctrl
[4] = {
223 static const char *const dep_ctrl
[4] = {
227 [3] = "NoDDClr,NoDDChk",
230 static const char *const mask_ctrl
[4] = {
235 static const char *const access_mode
[2] = {
240 static const char *const three_source_reg_encoding
[] = {
241 [BRW_3SRC_TYPE_F
] = "F",
242 [BRW_3SRC_TYPE_D
] = "D",
243 [BRW_3SRC_TYPE_UD
] = "UD",
244 [BRW_3SRC_TYPE_DF
] = "DF",
247 static const char *const reg_file
[4] = {
254 static const char *const writemask
[16] = {
273 static const char *const end_of_thread
[2] = {
278 /* SFIDs on Gen4-5 */
279 static const char *const gen4_sfid
[16] = {
280 [BRW_SFID_NULL
] = "null",
281 [BRW_SFID_MATH
] = "math",
282 [BRW_SFID_SAMPLER
] = "sampler",
283 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
284 [BRW_SFID_DATAPORT_READ
] = "read",
285 [BRW_SFID_DATAPORT_WRITE
] = "write",
286 [BRW_SFID_URB
] = "urb",
287 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
288 [BRW_SFID_VME
] = "vme",
291 static const char *const gen6_sfid
[16] = {
292 [BRW_SFID_NULL
] = "null",
293 [BRW_SFID_MATH
] = "math",
294 [BRW_SFID_SAMPLER
] = "sampler",
295 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
296 [BRW_SFID_URB
] = "urb",
297 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
298 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "sampler",
299 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
300 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
301 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
302 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
303 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
304 [HSW_SFID_CRE
] = "cre",
307 static const char *const gen7_gateway_subfuncid
[8] = {
308 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
309 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
310 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
311 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
312 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
313 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
314 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
317 static const char *const gen4_dp_read_port_msg_type
[4] = {
318 [0b00] = "OWord Block Read",
319 [0b01] = "OWord Dual Block Read",
320 [0b10] = "Media Block Read",
321 [0b11] = "DWord Scattered Read",
324 static const char *const g45_dp_read_port_msg_type
[8] = {
325 [0b000] = "OWord Block Read",
326 [0b010] = "OWord Dual Block Read",
327 [0b100] = "Media Block Read",
328 [0b110] = "DWord Scattered Read",
329 [0b001] = "Render Target UNORM Read",
330 [0b011] = "AVC Loop Filter Read",
333 static const char *const dp_write_port_msg_type
[8] = {
334 [0b000] = "OWord block write",
335 [0b001] = "OWord dual block write",
336 [0b010] = "media block write",
337 [0b011] = "DWord scattered write",
338 [0b100] = "RT write",
339 [0b101] = "streamed VB write",
340 [0b110] = "RT UNORM write", /* G45+ */
341 [0b111] = "flush render cache",
344 static const char *const dp_rc_msg_type_gen6
[16] = {
345 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
346 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
347 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
348 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
349 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
350 "OWORD unaligned block read",
351 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
352 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
353 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
354 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
355 "OWORD dual block write",
356 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
357 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
358 "DWORD scattered write",
359 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
360 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
361 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
364 static const char *const dp_rc_msg_type_gen7
[16] = {
365 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
366 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
367 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
368 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
369 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
370 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
371 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
374 static const char *const dp_rc_msg_type_gen9
[16] = {
375 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
376 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
379 static const char *const *
380 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
382 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
383 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
384 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
385 dp_write_port_msg_type
);
388 static const char *const m_rt_write_subtype
[] = {
390 [0b001] = "SIMD16/RepData",
391 [0b010] = "SIMD8/DualSrcLow",
392 [0b011] = "SIMD8/DualSrcHigh",
394 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
395 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
398 static const char *const dp_dc0_msg_type_gen7
[16] = {
399 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
400 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
401 "DC unaligned OWORD block read",
402 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
403 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
404 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
405 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
406 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
407 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
408 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
409 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
410 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
411 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
412 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
415 static const char *const dp_dc1_msg_type_hsw
[16] = {
416 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
417 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
418 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
419 "DC untyped 4x2 atomic op",
420 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
421 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
422 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
423 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
424 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
425 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
426 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
427 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
428 "DC 4x2 atomic counter op",
429 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
432 static const char *const aop
[16] = {
433 [BRW_AOP_AND
] = "and",
435 [BRW_AOP_XOR
] = "xor",
436 [BRW_AOP_MOV
] = "mov",
437 [BRW_AOP_INC
] = "inc",
438 [BRW_AOP_DEC
] = "dec",
439 [BRW_AOP_ADD
] = "add",
440 [BRW_AOP_SUB
] = "sub",
441 [BRW_AOP_REVSUB
] = "revsub",
442 [BRW_AOP_IMAX
] = "imax",
443 [BRW_AOP_IMIN
] = "imin",
444 [BRW_AOP_UMAX
] = "umax",
445 [BRW_AOP_UMIN
] = "umin",
446 [BRW_AOP_CMPWR
] = "cmpwr",
447 [BRW_AOP_PREDEC
] = "predec",
450 static const char * const pixel_interpolator_msg_types
[4] = {
451 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
452 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
453 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
454 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
457 static const char *const math_function
[16] = {
458 [BRW_MATH_FUNCTION_INV
] = "inv",
459 [BRW_MATH_FUNCTION_LOG
] = "log",
460 [BRW_MATH_FUNCTION_EXP
] = "exp",
461 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
462 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
463 [BRW_MATH_FUNCTION_SIN
] = "sin",
464 [BRW_MATH_FUNCTION_COS
] = "cos",
465 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
466 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
467 [BRW_MATH_FUNCTION_POW
] = "pow",
468 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
469 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
470 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
471 [GEN8_MATH_FUNCTION_INVM
] = "invm",
472 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
475 static const char *const math_saturate
[2] = {
480 static const char *const math_signed
[2] = {
485 static const char *const math_scalar
[2] = {
490 static const char *const math_precision
[2] = {
492 [1] = "partial_precision"
495 static const char *const gen5_urb_opcode
[] = {
500 static const char *const gen7_urb_opcode
[] = {
501 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
502 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
503 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
504 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
505 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
506 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
507 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
508 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
509 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
510 /* [9-15] - reserved */
513 static const char *const urb_swizzle
[4] = {
514 [BRW_URB_SWIZZLE_NONE
] = "",
515 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
516 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
519 static const char *const urb_allocate
[2] = {
524 static const char *const urb_used
[2] = {
529 static const char *const urb_complete
[2] = {
534 static const char *const gen5_sampler_msg_type
[] = {
535 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
536 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
537 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
538 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
539 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
540 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
541 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
542 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
543 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
544 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
545 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
546 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
547 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
548 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
549 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
550 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
551 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
552 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
553 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
554 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
555 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
556 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
557 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
560 static const char *const gen5_sampler_simd_mode
[4] = {
561 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
562 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
563 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
564 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
567 static const char *const sampler_target_format
[4] = {
577 string(FILE *file
, const char *string
)
580 column
+= strlen(string
);
585 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
588 format(FILE *f
, const char *format
, ...)
592 va_start(args
, format
);
594 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
618 control(FILE *file
, const char *name
, const char *const ctrl
[],
619 unsigned id
, int *space
)
622 fprintf(file
, "*** invalid %s value %d ", name
, id
);
628 string(file
, ctrl
[id
]);
636 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
639 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
641 format(file
, "*** invalid opcode value %d ", id
);
644 string(file
, desc
->name
);
649 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
653 /* Clear the Compr4 instruction compression bit. */
654 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
655 _reg_nr
&= ~BRW_MRF_COMPR4
;
657 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
658 switch (_reg_nr
& 0xf0) {
660 string(file
, "null");
662 case BRW_ARF_ADDRESS
:
663 format(file
, "a%d", _reg_nr
& 0x0f);
665 case BRW_ARF_ACCUMULATOR
:
666 format(file
, "acc%d", _reg_nr
& 0x0f);
669 format(file
, "f%d", _reg_nr
& 0x0f);
672 format(file
, "mask%d", _reg_nr
& 0x0f);
674 case BRW_ARF_MASK_STACK
:
675 format(file
, "msd%d", _reg_nr
& 0x0f);
678 format(file
, "sr%d", _reg_nr
& 0x0f);
680 case BRW_ARF_CONTROL
:
681 format(file
, "cr%d", _reg_nr
& 0x0f);
683 case BRW_ARF_NOTIFICATION_COUNT
:
684 format(file
, "n%d", _reg_nr
& 0x0f);
691 format(file
, "tdr0");
693 case BRW_ARF_TIMESTAMP
:
694 format(file
, "tm%d", _reg_nr
& 0x0f);
697 format(file
, "ARF%d", _reg_nr
);
701 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
702 format(file
, "%d", _reg_nr
);
708 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
710 enum brw_reg_type type
= brw_inst_dst_type(devinfo
, inst
);
711 unsigned elem_size
= brw_reg_type_to_size(type
);
714 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
715 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
716 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
717 brw_inst_dst_da_reg_nr(devinfo
, inst
));
720 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
721 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
724 err
|= control(file
, "horiz stride", horiz_stride
,
725 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
727 string(file
, brw_reg_type_to_letters(type
));
729 string(file
, "g[a0");
730 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
731 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
733 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
734 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
736 err
|= control(file
, "horiz stride", horiz_stride
,
737 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
739 string(file
, brw_reg_type_to_letters(type
));
742 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
743 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
744 brw_inst_dst_da_reg_nr(devinfo
, inst
));
747 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
748 format(file
, ".%u", 16 / elem_size
);
750 err
|= control(file
, "writemask", writemask
,
751 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
752 string(file
, brw_reg_type_to_letters(type
));
755 string(file
, "Indirect align16 address mode not supported");
763 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
768 if (devinfo
->gen
== 6 && brw_inst_3src_dst_reg_file(devinfo
, inst
))
769 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
771 reg_file
= BRW_GENERAL_REGISTER_FILE
;
773 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
776 if (brw_inst_3src_dst_subreg_nr(devinfo
, inst
))
777 format(file
, ".%"PRIu64
, brw_inst_3src_dst_subreg_nr(devinfo
, inst
));
779 err
|= control(file
, "writemask", writemask
,
780 brw_inst_3src_dst_writemask(devinfo
, inst
), NULL
);
781 err
|= control(file
, "dest reg encoding", three_source_reg_encoding
,
782 brw_inst_3src_dst_type(devinfo
, inst
), NULL
);
788 src_align1_region(FILE *file
,
789 unsigned _vert_stride
, unsigned _width
,
790 unsigned _horiz_stride
)
794 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
796 err
|= control(file
, "width", width
, _width
, NULL
);
798 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
805 const struct gen_device_info
*devinfo
,
807 enum brw_reg_type type
, unsigned _reg_file
,
808 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
809 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
814 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
815 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
817 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
819 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
821 err
|= reg(file
, _reg_file
, reg_num
);
825 unsigned elem_size
= brw_reg_type_to_size(type
);
826 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
828 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
829 string(file
, brw_reg_type_to_letters(type
));
835 const struct gen_device_info
*devinfo
,
837 enum brw_reg_type type
,
840 unsigned _addr_subreg_nr
,
843 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
847 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
848 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
850 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
852 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
854 string(file
, "g[a0");
856 format(file
, ".%d", _addr_subreg_nr
);
858 format(file
, " %d", _addr_imm
);
860 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
861 string(file
, brw_reg_type_to_letters(type
));
866 src_swizzle(FILE *file
, unsigned swiz
)
868 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
869 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
870 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
871 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
874 if (x
== y
&& x
== z
&& x
== w
) {
876 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
877 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
879 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
880 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
881 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
882 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
889 const struct gen_device_info
*devinfo
,
891 enum brw_reg_type type
,
893 unsigned _vert_stride
,
898 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
902 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
903 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
905 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
907 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
909 err
|= reg(file
, _reg_file
, _reg_nr
);
913 unsigned elem_size
= brw_reg_type_to_size(type
);
915 /* bit4 for subreg number byte addressing. Make this same meaning as
916 in da1 case, so output looks consistent. */
917 format(file
, ".%d", 16 / elem_size
);
920 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
922 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
923 string(file
, brw_reg_type_to_letters(type
));
928 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
931 unsigned src0_subreg_nr
= brw_inst_3src_src0_subreg_nr(devinfo
, inst
);
933 err
|= control(file
, "negate", m_negate
,
934 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
935 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
937 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
938 brw_inst_3src_src0_reg_nr(devinfo
, inst
));
941 if (src0_subreg_nr
|| brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
942 format(file
, ".%d", src0_subreg_nr
);
943 if (brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
944 string(file
, "<0,1,0>");
946 string(file
, "<4,4,1>");
947 err
|= src_swizzle(file
, brw_inst_3src_src0_swizzle(devinfo
, inst
));
949 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
950 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
955 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
958 unsigned src1_subreg_nr
= brw_inst_3src_src1_subreg_nr(devinfo
, inst
);
960 err
|= control(file
, "negate", m_negate
,
961 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
962 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
964 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
965 brw_inst_3src_src1_reg_nr(devinfo
, inst
));
968 if (src1_subreg_nr
|| brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
969 format(file
, ".%d", src1_subreg_nr
);
970 if (brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
971 string(file
, "<0,1,0>");
973 string(file
, "<4,4,1>");
974 err
|= src_swizzle(file
, brw_inst_3src_src1_swizzle(devinfo
, inst
));
976 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
977 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
983 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
986 unsigned src2_subreg_nr
= brw_inst_3src_src2_subreg_nr(devinfo
, inst
);
988 err
|= control(file
, "negate", m_negate
,
989 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
990 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
992 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
993 brw_inst_3src_src2_reg_nr(devinfo
, inst
));
996 if (src2_subreg_nr
|| brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
997 format(file
, ".%d", src2_subreg_nr
);
998 if (brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
999 string(file
, "<0,1,0>");
1001 string(file
, "<4,4,1>");
1002 err
|= src_swizzle(file
, brw_inst_3src_src2_swizzle(devinfo
, inst
));
1004 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1005 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1010 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum brw_reg_type type
,
1011 const brw_inst
*inst
)
1014 case BRW_REGISTER_TYPE_UQ
:
1015 format(file
, "0x%16lxUD", brw_inst_imm_uq(devinfo
, inst
));
1017 case BRW_REGISTER_TYPE_Q
:
1018 format(file
, "%ldD", brw_inst_imm_uq(devinfo
, inst
));
1020 case BRW_REGISTER_TYPE_UD
:
1021 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1023 case BRW_REGISTER_TYPE_D
:
1024 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1026 case BRW_REGISTER_TYPE_UW
:
1027 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1029 case BRW_REGISTER_TYPE_W
:
1030 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1032 case BRW_REGISTER_TYPE_UV
:
1033 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1035 case BRW_REGISTER_TYPE_VF
:
1036 format(file
, "[%-gF, %-gF, %-gF, %-gF]VF",
1037 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1038 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1039 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1040 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1042 case BRW_REGISTER_TYPE_V
:
1043 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1045 case BRW_REGISTER_TYPE_F
:
1046 format(file
, "%-gF", brw_inst_imm_f(devinfo
, inst
));
1048 case BRW_REGISTER_TYPE_DF
:
1049 format(file
, "%-gDF", brw_inst_imm_df(devinfo
, inst
));
1051 case BRW_REGISTER_TYPE_HF
:
1052 string(file
, "Half Float IMM");
1054 case BRW_REGISTER_TYPE_UB
:
1055 case BRW_REGISTER_TYPE_B
:
1056 format(file
, "*** invalid immediate type %d ", type
);
1062 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1064 if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1065 return imm(file
, devinfo
, brw_inst_src0_type(devinfo
, inst
), inst
);
1066 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1067 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1068 return src_da1(file
,
1070 brw_inst_opcode(devinfo
, inst
),
1071 brw_inst_src0_type(devinfo
, inst
),
1072 brw_inst_src0_reg_file(devinfo
, inst
),
1073 brw_inst_src0_vstride(devinfo
, inst
),
1074 brw_inst_src0_width(devinfo
, inst
),
1075 brw_inst_src0_hstride(devinfo
, inst
),
1076 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1077 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1078 brw_inst_src0_abs(devinfo
, inst
),
1079 brw_inst_src0_negate(devinfo
, inst
));
1081 return src_ia1(file
,
1083 brw_inst_opcode(devinfo
, inst
),
1084 brw_inst_src0_type(devinfo
, inst
),
1085 brw_inst_src0_reg_file(devinfo
, inst
),
1086 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1087 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1088 brw_inst_src0_negate(devinfo
, inst
),
1089 brw_inst_src0_abs(devinfo
, inst
),
1090 brw_inst_src0_hstride(devinfo
, inst
),
1091 brw_inst_src0_width(devinfo
, inst
),
1092 brw_inst_src0_vstride(devinfo
, inst
));
1095 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1096 return src_da16(file
,
1098 brw_inst_opcode(devinfo
, inst
),
1099 brw_inst_src0_type(devinfo
, inst
),
1100 brw_inst_src0_reg_file(devinfo
, inst
),
1101 brw_inst_src0_vstride(devinfo
, inst
),
1102 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1103 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1104 brw_inst_src0_abs(devinfo
, inst
),
1105 brw_inst_src0_negate(devinfo
, inst
),
1106 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1107 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1108 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1109 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1111 string(file
, "Indirect align16 address mode not supported");
1118 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1120 if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1121 return imm(file
, devinfo
, brw_inst_src1_type(devinfo
, inst
), inst
);
1122 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1123 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1124 return src_da1(file
,
1126 brw_inst_opcode(devinfo
, inst
),
1127 brw_inst_src1_type(devinfo
, inst
),
1128 brw_inst_src1_reg_file(devinfo
, inst
),
1129 brw_inst_src1_vstride(devinfo
, inst
),
1130 brw_inst_src1_width(devinfo
, inst
),
1131 brw_inst_src1_hstride(devinfo
, inst
),
1132 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1133 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1134 brw_inst_src1_abs(devinfo
, inst
),
1135 brw_inst_src1_negate(devinfo
, inst
));
1137 return src_ia1(file
,
1139 brw_inst_opcode(devinfo
, inst
),
1140 brw_inst_src1_type(devinfo
, inst
),
1141 brw_inst_src1_reg_file(devinfo
, inst
),
1142 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1143 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1144 brw_inst_src1_negate(devinfo
, inst
),
1145 brw_inst_src1_abs(devinfo
, inst
),
1146 brw_inst_src1_hstride(devinfo
, inst
),
1147 brw_inst_src1_width(devinfo
, inst
),
1148 brw_inst_src1_vstride(devinfo
, inst
));
1151 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1152 return src_da16(file
,
1154 brw_inst_opcode(devinfo
, inst
),
1155 brw_inst_src1_type(devinfo
, inst
),
1156 brw_inst_src1_reg_file(devinfo
, inst
),
1157 brw_inst_src1_vstride(devinfo
, inst
),
1158 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1159 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1160 brw_inst_src1_abs(devinfo
, inst
),
1161 brw_inst_src1_negate(devinfo
, inst
),
1162 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1163 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1164 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1165 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1167 string(file
, "Indirect align16 address mode not supported");
1174 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1176 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1177 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1178 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1179 brw_inst_nib_control(devinfo
, inst
);
1181 if (exec_size
< 8 || nib_ctl
) {
1182 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1183 } else if (exec_size
== 8) {
1186 string(file
, " 1Q");
1189 string(file
, " 2Q");
1192 string(file
, " 3Q");
1195 string(file
, " 4Q");
1198 } else if (exec_size
== 16) {
1200 string(file
, " 1H");
1202 string(file
, " 2H");
1208 static __attribute__((__unused__
)) int
1209 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1210 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1213 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1214 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1215 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1220 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1221 const brw_inst
*inst
, bool is_compacted
)
1226 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1227 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1229 if (brw_inst_pred_control(devinfo
, inst
)) {
1231 err
|= control(file
, "predicate inverse", pred_inv
,
1232 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1233 format(file
, "f%"PRIu64
, devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1234 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1235 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1236 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1237 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1238 brw_inst_pred_control(devinfo
, inst
), NULL
);
1240 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1241 brw_inst_pred_control(devinfo
, inst
), NULL
);
1246 err
|= print_opcode(file
, devinfo
, opcode
);
1247 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1250 err
|= control(file
, "debug control", debug_ctrl
,
1251 brw_inst_debug_control(devinfo
, inst
), NULL
);
1253 if (opcode
== BRW_OPCODE_MATH
) {
1255 err
|= control(file
, "function", math_function
,
1256 brw_inst_math_function(devinfo
, inst
), NULL
);
1257 } else if (opcode
!= BRW_OPCODE_SEND
&& opcode
!= BRW_OPCODE_SENDC
) {
1258 err
|= control(file
, "conditional modifier", conditional_modifier
,
1259 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1261 /* If we're using the conditional modifier, print which flags reg is
1262 * used for it. Note that on gen6+, the embedded-condition SEL and
1263 * control flow doesn't update flags.
1265 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1266 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1267 opcode
!= BRW_OPCODE_IF
&&
1268 opcode
!= BRW_OPCODE_WHILE
))) {
1269 format(file
, ".f%"PRIu64
,
1270 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1271 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1272 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1276 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1278 err
|= control(file
, "execution size", exec_size
,
1279 brw_inst_exec_size(devinfo
, inst
), NULL
);
1283 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1284 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1286 if (has_uip(devinfo
, opcode
)) {
1287 /* Instructions that have UIP also have JIP. */
1289 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1291 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1292 } else if (has_jip(devinfo
, opcode
)) {
1294 if (devinfo
->gen
>= 7) {
1295 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1297 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1299 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1300 opcode
== BRW_OPCODE_CONTINUE
||
1301 opcode
== BRW_OPCODE_ELSE
)) {
1303 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1305 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1306 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1307 opcode
== BRW_OPCODE_IFF
||
1308 opcode
== BRW_OPCODE_HALT
)) {
1310 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1311 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1313 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1314 } else if (opcode
== BRW_OPCODE_JMPI
) {
1316 err
|= src1(file
, devinfo
, inst
);
1317 } else if (desc
&& desc
->nsrc
== 3) {
1319 err
|= dest_3src(file
, devinfo
, inst
);
1322 err
|= src0_3src(file
, devinfo
, inst
);
1325 err
|= src1_3src(file
, devinfo
, inst
);
1328 err
|= src2_3src(file
, devinfo
, inst
);
1330 if (desc
->ndst
> 0) {
1332 err
|= dest(file
, devinfo
, inst
);
1335 if (desc
->nsrc
> 0) {
1337 err
|= src0(file
, devinfo
, inst
);
1340 if (desc
->nsrc
> 1) {
1342 err
|= src1(file
, devinfo
, inst
);
1346 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
) {
1347 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1349 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1350 /* show the indirect descriptor source */
1352 err
|= src1(file
, devinfo
, inst
);
1360 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1364 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1365 format(file
, " indirect");
1369 err
|= control(file
, "math function", math_function
,
1370 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1371 err
|= control(file
, "math saturate", math_saturate
,
1372 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1373 err
|= control(file
, "math signed", math_signed
,
1374 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1375 err
|= control(file
, "math scalar", math_scalar
,
1376 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1377 err
|= control(file
, "math precision", math_precision
,
1378 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1380 case BRW_SFID_SAMPLER
:
1381 if (devinfo
->gen
>= 5) {
1382 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1383 brw_inst_sampler_msg_type(devinfo
, inst
), &space
);
1384 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1385 brw_inst_sampler_simd_mode(devinfo
, inst
), &space
);
1386 format(file
, " Surface = %"PRIu64
" Sampler = %"PRIu64
,
1387 brw_inst_binding_table_index(devinfo
, inst
),
1388 brw_inst_sampler(devinfo
, inst
));
1390 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", ",
1391 brw_inst_binding_table_index(devinfo
, inst
),
1392 brw_inst_sampler(devinfo
, inst
),
1393 brw_inst_sampler_msg_type(devinfo
, inst
));
1394 if (!devinfo
->is_g4x
) {
1395 err
|= control(file
, "sampler target format",
1396 sampler_target_format
,
1397 brw_inst_sampler_return_format(devinfo
, inst
), NULL
);
1402 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1403 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1404 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1405 if (devinfo
->gen
>= 6) {
1406 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", %"PRIu64
")",
1407 brw_inst_binding_table_index(devinfo
, inst
),
1408 brw_inst_dp_msg_control(devinfo
, inst
),
1409 brw_inst_dp_msg_type(devinfo
, inst
),
1410 devinfo
->gen
>= 7 ? 0 : brw_inst_dp_write_commit(devinfo
, inst
));
1412 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1413 err
|= control(file
, "DP read message type",
1414 is_965
? gen4_dp_read_port_msg_type
:
1415 g45_dp_read_port_msg_type
,
1416 brw_inst_dp_read_msg_type(devinfo
, inst
),
1419 format(file
, " MsgCtrl = 0x%"PRIx64
,
1420 brw_inst_dp_read_msg_control(devinfo
, inst
));
1422 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1426 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1427 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1428 unsigned msg_type
= brw_inst_dp_write_msg_type(devinfo
, inst
);
1430 err
|= control(file
, "DP rc message type",
1431 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1433 bool is_rt_write
= msg_type
==
1434 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1435 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1438 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1439 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1440 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1441 string(file
, " Hi");
1442 if (brw_inst_rt_last(devinfo
, inst
))
1443 string(file
, " LastRT");
1444 if (devinfo
->gen
< 7 && brw_inst_dp_write_commit(devinfo
, inst
))
1445 string(file
, " WriteCommit");
1447 format(file
, " MsgCtrl = 0x%"PRIx64
,
1448 brw_inst_dp_write_msg_control(devinfo
, inst
));
1451 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1455 case BRW_SFID_URB
: {
1456 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1458 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1462 err
|= control(file
, "urb opcode",
1463 devinfo
->gen
>= 7 ? gen7_urb_opcode
1467 if (devinfo
->gen
>= 7 &&
1468 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1469 string(file
, " per-slot");
1472 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1473 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1474 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1475 string(file
, " masked");
1477 err
|= control(file
, "urb swizzle", urb_swizzle
,
1478 brw_inst_urb_swizzle_control(devinfo
, inst
),
1482 if (devinfo
->gen
< 7) {
1483 err
|= control(file
, "urb allocate", urb_allocate
,
1484 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1485 err
|= control(file
, "urb used", urb_used
,
1486 brw_inst_urb_used(devinfo
, inst
), &space
);
1488 if (devinfo
->gen
< 8) {
1489 err
|= control(file
, "urb complete", urb_complete
,
1490 brw_inst_urb_complete(devinfo
, inst
), &space
);
1494 case BRW_SFID_THREAD_SPAWNER
:
1497 case BRW_SFID_MESSAGE_GATEWAY
:
1498 format(file
, " (%s)",
1499 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1502 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1503 if (devinfo
->gen
>= 7) {
1506 err
|= control(file
, "DP DC0 message type",
1507 dp_dc0_msg_type_gen7
,
1508 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1510 format(file
, ", %"PRIu64
", ", brw_inst_binding_table_index(devinfo
, inst
));
1512 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1513 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1514 control(file
, "atomic op", aop
,
1515 brw_inst_imm_ud(devinfo
, inst
) >> 8 & 0xf, &space
);
1518 format(file
, "%"PRIu64
, brw_inst_dp_msg_control(devinfo
, inst
));
1525 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1526 if (devinfo
->gen
>= 7) {
1529 unsigned msg_ctrl
= brw_inst_dp_msg_control(devinfo
, inst
);
1531 err
|= control(file
, "DP DC1 message type",
1532 dp_dc1_msg_type_hsw
,
1533 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1535 format(file
, ", Surface = %"PRIu64
", ",
1536 brw_inst_binding_table_index(devinfo
, inst
));
1538 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1539 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1540 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1541 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1542 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1544 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1545 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1546 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1547 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1549 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1550 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1551 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1552 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
: {
1553 static const char *simd_modes
[] = { "4x2", "16", "8" };
1554 format(file
, "SIMD%s, Mask = 0x%x",
1555 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1559 format(file
, "0x%x", msg_ctrl
);
1567 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1568 if (devinfo
->gen
>= 7) {
1569 format(file
, " (%s, %s, 0x%02"PRIx64
")",
1570 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1571 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1572 brw_inst_pi_message_data(devinfo
, inst
));
1578 format(file
, "unsupported shared function ID %d", sfid
);
1584 format(file
, "mlen %"PRIu64
, brw_inst_mlen(devinfo
, inst
));
1585 format(file
, " rlen %"PRIu64
, brw_inst_rlen(devinfo
, inst
));
1589 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1592 err
|= control(file
, "access mode", access_mode
,
1593 brw_inst_access_mode(devinfo
, inst
), &space
);
1594 if (devinfo
->gen
>= 6) {
1595 err
|= control(file
, "write enable control", wectrl
,
1596 brw_inst_mask_control(devinfo
, inst
), &space
);
1598 err
|= control(file
, "mask control", mask_ctrl
,
1599 brw_inst_mask_control(devinfo
, inst
), &space
);
1601 err
|= control(file
, "dependency control", dep_ctrl
,
1602 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
1603 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
1605 if (devinfo
->gen
>= 6)
1606 err
|= qtr_ctrl(file
, devinfo
, inst
);
1608 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
1609 desc
&& desc
->ndst
> 0 &&
1610 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
1611 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
1612 format(file
, " compr4");
1614 err
|= control(file
, "compression control", compr_ctrl
,
1615 brw_inst_qtr_control(devinfo
, inst
), &space
);
1619 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
1620 err
|= control(file
, "thread control", thread_ctrl
,
1621 brw_inst_thread_control(devinfo
, inst
), &space
);
1622 if (has_branch_ctrl(devinfo
, opcode
)) {
1623 err
|= control(file
, "branch ctrl", branch_ctrl
,
1624 brw_inst_branch_control(devinfo
, inst
), &space
);
1625 } else if (devinfo
->gen
>= 6) {
1626 err
|= control(file
, "acc write control", accwr
,
1627 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
1629 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
)
1630 err
|= control(file
, "end of thread", end_of_thread
,
1631 brw_inst_eot(devinfo
, inst
), &space
);