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intel/fs: Implement load/store_global with A64 untyped messages
[mesa.git] / src / intel / compiler / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdarg.h>
26
27 #include "brw_eu_defines.h"
28 #include "brw_inst.h"
29 #include "brw_shader.h"
30 #include "brw_reg.h"
31 #include "brw_inst.h"
32 #include "brw_eu.h"
33 #include "util/half_float.h"
34
35 static bool
36 has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
37 {
38 if (devinfo->gen < 6)
39 return false;
40
41 return opcode == BRW_OPCODE_IF ||
42 opcode == BRW_OPCODE_ELSE ||
43 opcode == BRW_OPCODE_ENDIF ||
44 opcode == BRW_OPCODE_WHILE ||
45 opcode == BRW_OPCODE_BREAK ||
46 opcode == BRW_OPCODE_CONTINUE ||
47 opcode == BRW_OPCODE_HALT;
48 }
49
50 static bool
51 has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
52 {
53 if (devinfo->gen < 6)
54 return false;
55
56 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
57 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
58 opcode == BRW_OPCODE_BREAK ||
59 opcode == BRW_OPCODE_CONTINUE ||
60 opcode == BRW_OPCODE_HALT;
61 }
62
63 static bool
64 has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode)
65 {
66 if (devinfo->gen < 8)
67 return false;
68
69 return opcode == BRW_OPCODE_IF ||
70 opcode == BRW_OPCODE_ELSE;
71 /* opcode == BRW_OPCODE_GOTO; */
72 }
73
74 static bool
75 is_logic_instruction(unsigned opcode)
76 {
77 return opcode == BRW_OPCODE_AND ||
78 opcode == BRW_OPCODE_NOT ||
79 opcode == BRW_OPCODE_OR ||
80 opcode == BRW_OPCODE_XOR;
81 }
82
83 static bool
84 is_send(unsigned opcode)
85 {
86 return opcode == BRW_OPCODE_SEND ||
87 opcode == BRW_OPCODE_SENDC ||
88 opcode == BRW_OPCODE_SENDS ||
89 opcode == BRW_OPCODE_SENDSC;
90 }
91
92 static bool
93 is_split_send(UNUSED const struct gen_device_info *devinfo, unsigned opcode)
94 {
95 return opcode == BRW_OPCODE_SENDS ||
96 opcode == BRW_OPCODE_SENDSC;
97 }
98
99 const char *const conditional_modifier[16] = {
100 [BRW_CONDITIONAL_NONE] = "",
101 [BRW_CONDITIONAL_Z] = ".z",
102 [BRW_CONDITIONAL_NZ] = ".nz",
103 [BRW_CONDITIONAL_G] = ".g",
104 [BRW_CONDITIONAL_GE] = ".ge",
105 [BRW_CONDITIONAL_L] = ".l",
106 [BRW_CONDITIONAL_LE] = ".le",
107 [BRW_CONDITIONAL_R] = ".r",
108 [BRW_CONDITIONAL_O] = ".o",
109 [BRW_CONDITIONAL_U] = ".u",
110 };
111
112 static const char *const m_negate[2] = {
113 [0] = "",
114 [1] = "-",
115 };
116
117 static const char *const _abs[2] = {
118 [0] = "",
119 [1] = "(abs)",
120 };
121
122 static const char *const m_bitnot[2] = { "", "~" };
123
124 static const char *const vert_stride[16] = {
125 [0] = "0",
126 [1] = "1",
127 [2] = "2",
128 [3] = "4",
129 [4] = "8",
130 [5] = "16",
131 [6] = "32",
132 [15] = "VxH",
133 };
134
135 static const char *const width[8] = {
136 [0] = "1",
137 [1] = "2",
138 [2] = "4",
139 [3] = "8",
140 [4] = "16",
141 };
142
143 static const char *const horiz_stride[4] = {
144 [0] = "0",
145 [1] = "1",
146 [2] = "2",
147 [3] = "4"
148 };
149
150 static const char *const chan_sel[4] = {
151 [0] = "x",
152 [1] = "y",
153 [2] = "z",
154 [3] = "w",
155 };
156
157 static const char *const debug_ctrl[2] = {
158 [0] = "",
159 [1] = ".breakpoint"
160 };
161
162 static const char *const saturate[2] = {
163 [0] = "",
164 [1] = ".sat"
165 };
166
167 static const char *const cmpt_ctrl[2] = {
168 [0] = "",
169 [1] = "compacted"
170 };
171
172 static const char *const accwr[2] = {
173 [0] = "",
174 [1] = "AccWrEnable"
175 };
176
177 static const char *const branch_ctrl[2] = {
178 [0] = "",
179 [1] = "BranchCtrl"
180 };
181
182 static const char *const wectrl[2] = {
183 [0] = "",
184 [1] = "WE_all"
185 };
186
187 static const char *const exec_size[8] = {
188 [0] = "1",
189 [1] = "2",
190 [2] = "4",
191 [3] = "8",
192 [4] = "16",
193 [5] = "32"
194 };
195
196 static const char *const pred_inv[2] = {
197 [0] = "+",
198 [1] = "-"
199 };
200
201 const char *const pred_ctrl_align16[16] = {
202 [1] = "",
203 [2] = ".x",
204 [3] = ".y",
205 [4] = ".z",
206 [5] = ".w",
207 [6] = ".any4h",
208 [7] = ".all4h",
209 };
210
211 static const char *const pred_ctrl_align1[16] = {
212 [BRW_PREDICATE_NORMAL] = "",
213 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
214 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
215 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
216 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
217 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
218 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
219 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
220 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
221 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
222 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
223 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
224 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
225 };
226
227 static const char *const thread_ctrl[4] = {
228 [BRW_THREAD_NORMAL] = "",
229 [BRW_THREAD_ATOMIC] = "atomic",
230 [BRW_THREAD_SWITCH] = "switch",
231 };
232
233 static const char *const compr_ctrl[4] = {
234 [0] = "",
235 [1] = "sechalf",
236 [2] = "compr",
237 [3] = "compr4",
238 };
239
240 static const char *const dep_ctrl[4] = {
241 [0] = "",
242 [1] = "NoDDClr",
243 [2] = "NoDDChk",
244 [3] = "NoDDClr,NoDDChk",
245 };
246
247 static const char *const mask_ctrl[4] = {
248 [0] = "",
249 [1] = "nomask",
250 };
251
252 static const char *const access_mode[2] = {
253 [0] = "align1",
254 [1] = "align16",
255 };
256
257 static const char *const reg_file[4] = {
258 [0] = "A",
259 [1] = "g",
260 [2] = "m",
261 [3] = "imm",
262 };
263
264 static const char *const writemask[16] = {
265 [0x0] = ".",
266 [0x1] = ".x",
267 [0x2] = ".y",
268 [0x3] = ".xy",
269 [0x4] = ".z",
270 [0x5] = ".xz",
271 [0x6] = ".yz",
272 [0x7] = ".xyz",
273 [0x8] = ".w",
274 [0x9] = ".xw",
275 [0xa] = ".yw",
276 [0xb] = ".xyw",
277 [0xc] = ".zw",
278 [0xd] = ".xzw",
279 [0xe] = ".yzw",
280 [0xf] = "",
281 };
282
283 static const char *const end_of_thread[2] = {
284 [0] = "",
285 [1] = "EOT"
286 };
287
288 /* SFIDs on Gen4-5 */
289 static const char *const gen4_sfid[16] = {
290 [BRW_SFID_NULL] = "null",
291 [BRW_SFID_MATH] = "math",
292 [BRW_SFID_SAMPLER] = "sampler",
293 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
294 [BRW_SFID_DATAPORT_READ] = "read",
295 [BRW_SFID_DATAPORT_WRITE] = "write",
296 [BRW_SFID_URB] = "urb",
297 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
298 [BRW_SFID_VME] = "vme",
299 };
300
301 static const char *const gen6_sfid[16] = {
302 [BRW_SFID_NULL] = "null",
303 [BRW_SFID_MATH] = "math",
304 [BRW_SFID_SAMPLER] = "sampler",
305 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
306 [BRW_SFID_URB] = "urb",
307 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
308 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "dp_sampler",
309 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
310 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
311 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
312 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
313 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
314 [HSW_SFID_CRE] = "cre",
315 };
316
317 static const char *const gen7_gateway_subfuncid[8] = {
318 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
319 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
320 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
321 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
322 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
323 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
324 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
325 };
326
327 static const char *const gen4_dp_read_port_msg_type[4] = {
328 [0b00] = "OWord Block Read",
329 [0b01] = "OWord Dual Block Read",
330 [0b10] = "Media Block Read",
331 [0b11] = "DWord Scattered Read",
332 };
333
334 static const char *const g45_dp_read_port_msg_type[8] = {
335 [0b000] = "OWord Block Read",
336 [0b010] = "OWord Dual Block Read",
337 [0b100] = "Media Block Read",
338 [0b110] = "DWord Scattered Read",
339 [0b001] = "Render Target UNORM Read",
340 [0b011] = "AVC Loop Filter Read",
341 };
342
343 static const char *const dp_write_port_msg_type[8] = {
344 [0b000] = "OWord block write",
345 [0b001] = "OWord dual block write",
346 [0b010] = "media block write",
347 [0b011] = "DWord scattered write",
348 [0b100] = "RT write",
349 [0b101] = "streamed VB write",
350 [0b110] = "RT UNORM write", /* G45+ */
351 [0b111] = "flush render cache",
352 };
353
354 static const char *const dp_rc_msg_type_gen6[16] = {
355 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
356 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
357 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
358 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
359 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
360 "OWORD unaligned block read",
361 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
362 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
363 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
364 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
365 "OWORD dual block write",
366 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
368 "DWORD scattered write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
371 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
372 };
373
374 static const char *const dp_rc_msg_type_gen7[16] = {
375 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read",
376 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read",
377 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op",
378 [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence",
379 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write",
380 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
381 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write"
382 };
383
384 static const char *const dp_rc_msg_type_gen9[16] = {
385 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
386 [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read"
387 };
388
389 static const char *const *
390 dp_rc_msg_type(const struct gen_device_info *devinfo)
391 {
392 return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 :
393 devinfo->gen >= 7 ? dp_rc_msg_type_gen7 :
394 devinfo->gen >= 6 ? dp_rc_msg_type_gen6 :
395 dp_write_port_msg_type);
396 }
397
398 static const char *const m_rt_write_subtype[] = {
399 [0b000] = "SIMD16",
400 [0b001] = "SIMD16/RepData",
401 [0b010] = "SIMD8/DualSrcLow",
402 [0b011] = "SIMD8/DualSrcHigh",
403 [0b100] = "SIMD8",
404 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
405 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
406 };
407
408 static const char *const dp_dc0_msg_type_gen7[16] = {
409 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
410 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
411 "DC unaligned OWORD block read",
412 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
413 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
414 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
415 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
416 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
417 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
418 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
419 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
420 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
421 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
422 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
423 };
424
425 static const char *const dp_dc1_msg_type_hsw[32] = {
426 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
427 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
428 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
429 "DC untyped 4x2 atomic op",
430 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
431 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
432 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
433 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
434 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
435 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
436 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
437 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
438 "DC 4x2 atomic counter op",
439 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
440 [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read",
441 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read",
442 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write",
443 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write",
444 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] =
445 "DC untyped atomic float op",
446 };
447
448 static const char *const aop[16] = {
449 [BRW_AOP_AND] = "and",
450 [BRW_AOP_OR] = "or",
451 [BRW_AOP_XOR] = "xor",
452 [BRW_AOP_MOV] = "mov",
453 [BRW_AOP_INC] = "inc",
454 [BRW_AOP_DEC] = "dec",
455 [BRW_AOP_ADD] = "add",
456 [BRW_AOP_SUB] = "sub",
457 [BRW_AOP_REVSUB] = "revsub",
458 [BRW_AOP_IMAX] = "imax",
459 [BRW_AOP_IMIN] = "imin",
460 [BRW_AOP_UMAX] = "umax",
461 [BRW_AOP_UMIN] = "umin",
462 [BRW_AOP_CMPWR] = "cmpwr",
463 [BRW_AOP_PREDEC] = "predec",
464 };
465
466 static const char *const aop_float[4] = {
467 [BRW_AOP_FMAX] = "fmax",
468 [BRW_AOP_FMIN] = "fmin",
469 [BRW_AOP_FCMPWR] = "fcmpwr",
470 };
471
472 static const char * const pixel_interpolator_msg_types[4] = {
473 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
474 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
475 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
476 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
477 };
478
479 static const char *const math_function[16] = {
480 [BRW_MATH_FUNCTION_INV] = "inv",
481 [BRW_MATH_FUNCTION_LOG] = "log",
482 [BRW_MATH_FUNCTION_EXP] = "exp",
483 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
484 [BRW_MATH_FUNCTION_RSQ] = "rsq",
485 [BRW_MATH_FUNCTION_SIN] = "sin",
486 [BRW_MATH_FUNCTION_COS] = "cos",
487 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
488 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
489 [BRW_MATH_FUNCTION_POW] = "pow",
490 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
491 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
492 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
493 [GEN8_MATH_FUNCTION_INVM] = "invm",
494 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
495 };
496
497 static const char *const math_saturate[2] = {
498 [0] = "",
499 [1] = "sat"
500 };
501
502 static const char *const math_signed[2] = {
503 [0] = "",
504 [1] = "signed"
505 };
506
507 static const char *const math_scalar[2] = {
508 [0] = "",
509 [1] = "scalar"
510 };
511
512 static const char *const math_precision[2] = {
513 [0] = "",
514 [1] = "partial_precision"
515 };
516
517 static const char *const gen5_urb_opcode[] = {
518 [0] = "urb_write",
519 [1] = "ff_sync",
520 };
521
522 static const char *const gen7_urb_opcode[] = {
523 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
524 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
525 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
526 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
527 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
528 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
529 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
530 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
531 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
532 /* [9-15] - reserved */
533 };
534
535 static const char *const urb_swizzle[4] = {
536 [BRW_URB_SWIZZLE_NONE] = "",
537 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
538 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
539 };
540
541 static const char *const urb_allocate[2] = {
542 [0] = "",
543 [1] = "allocate"
544 };
545
546 static const char *const urb_used[2] = {
547 [0] = "",
548 [1] = "used"
549 };
550
551 static const char *const urb_complete[2] = {
552 [0] = "",
553 [1] = "complete"
554 };
555
556 static const char *const gen5_sampler_msg_type[] = {
557 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
558 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
559 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
560 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
561 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
562 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
563 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
564 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
565 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
566 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
567 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
568 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
569 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
570 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
571 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
572 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
573 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
574 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",
575 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
576 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
577 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
578 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
579 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
580 };
581
582 static const char *const gen5_sampler_simd_mode[4] = {
583 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
584 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
585 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
586 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
587 };
588
589 static const char *const sampler_target_format[4] = {
590 [0] = "F",
591 [2] = "UD",
592 [3] = "D"
593 };
594
595
596 static int column;
597
598 static int
599 string(FILE *file, const char *string)
600 {
601 fputs(string, file);
602 column += strlen(string);
603 return 0;
604 }
605
606 static int
607 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
608
609 static int
610 format(FILE *f, const char *format, ...)
611 {
612 char buf[1024];
613 va_list args;
614 va_start(args, format);
615
616 vsnprintf(buf, sizeof(buf) - 1, format, args);
617 va_end(args);
618 string(f, buf);
619 return 0;
620 }
621
622 static int
623 newline(FILE *f)
624 {
625 putc('\n', f);
626 column = 0;
627 return 0;
628 }
629
630 static int
631 pad(FILE *f, int c)
632 {
633 do
634 string(f, " ");
635 while (column < c);
636 return 0;
637 }
638
639 static int
640 control(FILE *file, const char *name, const char *const ctrl[],
641 unsigned id, int *space)
642 {
643 if (!ctrl[id]) {
644 fprintf(file, "*** invalid %s value %d ", name, id);
645 return 1;
646 }
647 if (ctrl[id][0]) {
648 if (space && *space)
649 string(file, " ");
650 string(file, ctrl[id]);
651 if (space)
652 *space = 1;
653 }
654 return 0;
655 }
656
657 static int
658 print_opcode(FILE *file, const struct gen_device_info *devinfo,
659 enum opcode id)
660 {
661 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
662 if (!desc) {
663 format(file, "*** invalid opcode value %d ", id);
664 return 1;
665 }
666 string(file, desc->name);
667 return 0;
668 }
669
670 static int
671 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
672 {
673 int err = 0;
674
675 /* Clear the Compr4 instruction compression bit. */
676 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
677 _reg_nr &= ~BRW_MRF_COMPR4;
678
679 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
680 switch (_reg_nr & 0xf0) {
681 case BRW_ARF_NULL:
682 string(file, "null");
683 break;
684 case BRW_ARF_ADDRESS:
685 format(file, "a%d", _reg_nr & 0x0f);
686 break;
687 case BRW_ARF_ACCUMULATOR:
688 format(file, "acc%d", _reg_nr & 0x0f);
689 break;
690 case BRW_ARF_FLAG:
691 format(file, "f%d", _reg_nr & 0x0f);
692 break;
693 case BRW_ARF_MASK:
694 format(file, "mask%d", _reg_nr & 0x0f);
695 break;
696 case BRW_ARF_MASK_STACK:
697 format(file, "msd%d", _reg_nr & 0x0f);
698 break;
699 case BRW_ARF_STATE:
700 format(file, "sr%d", _reg_nr & 0x0f);
701 break;
702 case BRW_ARF_CONTROL:
703 format(file, "cr%d", _reg_nr & 0x0f);
704 break;
705 case BRW_ARF_NOTIFICATION_COUNT:
706 format(file, "n%d", _reg_nr & 0x0f);
707 break;
708 case BRW_ARF_IP:
709 string(file, "ip");
710 return -1;
711 break;
712 case BRW_ARF_TDR:
713 format(file, "tdr0");
714 return -1;
715 case BRW_ARF_TIMESTAMP:
716 format(file, "tm%d", _reg_nr & 0x0f);
717 break;
718 default:
719 format(file, "ARF%d", _reg_nr);
720 break;
721 }
722 } else {
723 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
724 format(file, "%d", _reg_nr);
725 }
726 return err;
727 }
728
729 static int
730 dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
731 {
732 enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);
733 unsigned elem_size = brw_reg_type_to_size(type);
734 int err = 0;
735
736 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
737 /* These are fixed for split sends */
738 type = BRW_REGISTER_TYPE_UD;
739 elem_size = 4;
740 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
741 err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),
742 brw_inst_dst_da_reg_nr(devinfo, inst));
743 unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst);
744 if (subreg_nr)
745 format(file, ".%u", subreg_nr);
746 string(file, brw_reg_type_to_letters(type));
747 } else {
748 string(file, "g[a0");
749 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
750 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
751 elem_size);
752 if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst))
753 format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst));
754 string(file, "]<");
755 string(file, brw_reg_type_to_letters(type));
756 }
757 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
758 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
759 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
760 brw_inst_dst_da_reg_nr(devinfo, inst));
761 if (err == -1)
762 return 0;
763 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
764 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /
765 elem_size);
766 string(file, "<");
767 err |= control(file, "horiz stride", horiz_stride,
768 brw_inst_dst_hstride(devinfo, inst), NULL);
769 string(file, ">");
770 string(file, brw_reg_type_to_letters(type));
771 } else {
772 string(file, "g[a0");
773 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
774 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
775 elem_size);
776 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
777 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
778 string(file, "]<");
779 err |= control(file, "horiz stride", horiz_stride,
780 brw_inst_dst_hstride(devinfo, inst), NULL);
781 string(file, ">");
782 string(file, brw_reg_type_to_letters(type));
783 }
784 } else {
785 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
786 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
787 brw_inst_dst_da_reg_nr(devinfo, inst));
788 if (err == -1)
789 return 0;
790 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
791 format(file, ".%u", 16 / elem_size);
792 string(file, "<1>");
793 err |= control(file, "writemask", writemask,
794 brw_inst_da16_writemask(devinfo, inst), NULL);
795 string(file, brw_reg_type_to_letters(type));
796 } else {
797 err = 1;
798 string(file, "Indirect align16 address mode not supported");
799 }
800 }
801
802 return 0;
803 }
804
805 static int
806 dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
807 {
808 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
809 int err = 0;
810 uint32_t reg_file;
811 unsigned subreg_nr;
812 enum brw_reg_type type;
813
814 if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))
815 reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
816 else if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
817 reg_file = BRW_MESSAGE_REGISTER_FILE;
818 else
819 reg_file = BRW_GENERAL_REGISTER_FILE;
820
821 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
822 if (err == -1)
823 return 0;
824
825 if (is_align1) {
826 type = brw_inst_3src_a1_dst_type(devinfo, inst);
827 subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst);
828 } else {
829 type = brw_inst_3src_a16_dst_type(devinfo, inst);
830 subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4;
831 }
832 subreg_nr /= brw_reg_type_to_size(type);
833
834 if (subreg_nr)
835 format(file, ".%u", subreg_nr);
836 string(file, "<1>");
837
838 if (!is_align1) {
839 err |= control(file, "writemask", writemask,
840 brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
841 }
842 string(file, brw_reg_type_to_letters(type));
843
844 return 0;
845 }
846
847 static int
848 src_align1_region(FILE *file,
849 unsigned _vert_stride, unsigned _width,
850 unsigned _horiz_stride)
851 {
852 int err = 0;
853 string(file, "<");
854 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
855 string(file, ",");
856 err |= control(file, "width", width, _width, NULL);
857 string(file, ",");
858 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
859 string(file, ">");
860 return err;
861 }
862
863 static int
864 src_da1(FILE *file,
865 const struct gen_device_info *devinfo,
866 unsigned opcode,
867 enum brw_reg_type type, unsigned _reg_file,
868 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
869 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
870 unsigned _negate)
871 {
872 int err = 0;
873
874 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
875 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
876 else
877 err |= control(file, "negate", m_negate, _negate, NULL);
878
879 err |= control(file, "abs", _abs, __abs, NULL);
880
881 err |= reg(file, _reg_file, reg_num);
882 if (err == -1)
883 return 0;
884 if (sub_reg_num) {
885 unsigned elem_size = brw_reg_type_to_size(type);
886 format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */
887 }
888 src_align1_region(file, _vert_stride, _width, _horiz_stride);
889 string(file, brw_reg_type_to_letters(type));
890 return err;
891 }
892
893 static int
894 src_ia1(FILE *file,
895 const struct gen_device_info *devinfo,
896 unsigned opcode,
897 enum brw_reg_type type,
898 int _addr_imm,
899 unsigned _addr_subreg_nr,
900 unsigned _negate,
901 unsigned __abs,
902 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
903 {
904 int err = 0;
905
906 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
907 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
908 else
909 err |= control(file, "negate", m_negate, _negate, NULL);
910
911 err |= control(file, "abs", _abs, __abs, NULL);
912
913 string(file, "g[a0");
914 if (_addr_subreg_nr)
915 format(file, ".%d", _addr_subreg_nr);
916 if (_addr_imm)
917 format(file, " %d", _addr_imm);
918 string(file, "]");
919 src_align1_region(file, _vert_stride, _width, _horiz_stride);
920 string(file, brw_reg_type_to_letters(type));
921 return err;
922 }
923
924 static int
925 src_swizzle(FILE *file, unsigned swiz)
926 {
927 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
928 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
929 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
930 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
931 int err = 0;
932
933 if (x == y && x == z && x == w) {
934 string(file, ".");
935 err |= control(file, "channel select", chan_sel, x, NULL);
936 } else if (swiz != BRW_SWIZZLE_XYZW) {
937 string(file, ".");
938 err |= control(file, "channel select", chan_sel, x, NULL);
939 err |= control(file, "channel select", chan_sel, y, NULL);
940 err |= control(file, "channel select", chan_sel, z, NULL);
941 err |= control(file, "channel select", chan_sel, w, NULL);
942 }
943 return err;
944 }
945
946 static int
947 src_da16(FILE *file,
948 const struct gen_device_info *devinfo,
949 unsigned opcode,
950 enum brw_reg_type type,
951 unsigned _reg_file,
952 unsigned _vert_stride,
953 unsigned _reg_nr,
954 unsigned _subreg_nr,
955 unsigned __abs,
956 unsigned _negate,
957 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
958 {
959 int err = 0;
960
961 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
962 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
963 else
964 err |= control(file, "negate", m_negate, _negate, NULL);
965
966 err |= control(file, "abs", _abs, __abs, NULL);
967
968 err |= reg(file, _reg_file, _reg_nr);
969 if (err == -1)
970 return 0;
971 if (_subreg_nr) {
972 unsigned elem_size = brw_reg_type_to_size(type);
973
974 /* bit4 for subreg number byte addressing. Make this same meaning as
975 in da1 case, so output looks consistent. */
976 format(file, ".%d", 16 / elem_size);
977 }
978 string(file, "<");
979 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
980 string(file, ">");
981 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
982 string(file, brw_reg_type_to_letters(type));
983 return err;
984 }
985
986 static enum brw_vertical_stride
987 vstride_from_align1_3src_vstride(enum gen10_align1_3src_vertical_stride vstride)
988 {
989 switch (vstride) {
990 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
991 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;
992 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
993 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8;
994 default:
995 unreachable("not reached");
996 }
997 }
998
999 static enum brw_horizontal_stride
1000 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1001 {
1002 switch (hstride) {
1003 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0;
1004 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1;
1005 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2;
1006 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4;
1007 default:
1008 unreachable("not reached");
1009 }
1010 }
1011
1012 static enum brw_vertical_stride
1013 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1014 {
1015 switch (hstride) {
1016 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
1017 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1;
1018 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;
1019 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
1020 default:
1021 unreachable("not reached");
1022 }
1023 }
1024
1025 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1026 * "Register Region Restrictions" documentation
1027 */
1028 static enum brw_width
1029 implied_width(enum brw_vertical_stride _vert_stride,
1030 enum brw_horizontal_stride _horiz_stride)
1031 {
1032 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1033 if (_vert_stride == BRW_VERTICAL_STRIDE_0 &&
1034 _horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1035 return BRW_WIDTH_1;
1036
1037 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1038 } else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1039 switch (_vert_stride) {
1040 case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2;
1041 case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4;
1042 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;
1043 case BRW_VERTICAL_STRIDE_0:
1044 default:
1045 unreachable("not reached");
1046 }
1047
1048 } else {
1049 /* FINISHME: Implement these: */
1050
1051 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1052 * Strides are non-zero.
1053 *
1054 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1055 * This implies Vertical Stride is always greater than Horizontal
1056 * Stride."
1057 *
1058 * Given these statements and the knowledge that the stride and width
1059 * values are encoded in logarithmic form, we can perform the division
1060 * by just subtracting.
1061 */
1062 return _vert_stride - _horiz_stride;
1063 }
1064 }
1065
1066 static int
1067 src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1068 {
1069 int err = 0;
1070 unsigned reg_nr, subreg_nr;
1071 enum brw_reg_file _file;
1072 enum brw_reg_type type;
1073 enum brw_vertical_stride _vert_stride;
1074 enum brw_width _width;
1075 enum brw_horizontal_stride _horiz_stride;
1076 bool is_scalar_region;
1077 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1078
1079 if (is_align1) {
1080 if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==
1081 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1082 _file = BRW_GENERAL_REGISTER_FILE;
1083 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1084 subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1085 type = brw_inst_3src_a1_src0_type(devinfo, inst);
1086 } else if (brw_inst_3src_a1_src0_type(devinfo, inst) ==
1087 BRW_REGISTER_TYPE_NF) {
1088 _file = BRW_ARCHITECTURE_REGISTER_FILE;
1089 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1090 subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1091 type = brw_inst_3src_a1_src0_type(devinfo, inst);
1092 } else {
1093 _file = BRW_IMMEDIATE_VALUE;
1094 uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst);
1095 enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst);
1096
1097 if (type == BRW_REGISTER_TYPE_W) {
1098 format(file, "%dW", imm_val);
1099 } else if (type == BRW_REGISTER_TYPE_UW) {
1100 format(file, "0x%04xUW", imm_val);
1101 } else if (type == BRW_REGISTER_TYPE_HF) {
1102 format(file, "%-gF", _mesa_half_to_float(imm_val));
1103 }
1104 return 0;
1105 }
1106
1107 _vert_stride = vstride_from_align1_3src_vstride(
1108 brw_inst_3src_a1_src0_vstride(devinfo, inst));
1109 _horiz_stride = hstride_from_align1_3src_hstride(
1110 brw_inst_3src_a1_src0_hstride(devinfo, inst));
1111 _width = implied_width(_vert_stride, _horiz_stride);
1112 } else {
1113 _file = BRW_GENERAL_REGISTER_FILE;
1114 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1115 subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4;
1116 type = brw_inst_3src_a16_src_type(devinfo, inst);
1117
1118 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) {
1119 _vert_stride = BRW_VERTICAL_STRIDE_0;
1120 _width = BRW_WIDTH_1;
1121 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1122 } else {
1123 _vert_stride = BRW_VERTICAL_STRIDE_4;
1124 _width = BRW_WIDTH_4;
1125 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1126 }
1127 }
1128 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1129 _width == BRW_WIDTH_1 &&
1130 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1131
1132 subreg_nr /= brw_reg_type_to_size(type);
1133
1134 err |= control(file, "negate", m_negate,
1135 brw_inst_3src_src0_negate(devinfo, inst), NULL);
1136 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
1137
1138 err |= reg(file, _file, reg_nr);
1139 if (err == -1)
1140 return 0;
1141 if (subreg_nr || is_scalar_region)
1142 format(file, ".%d", subreg_nr);
1143 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1144 if (!is_scalar_region && !is_align1)
1145 err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
1146 string(file, brw_reg_type_to_letters(type));
1147 return err;
1148 }
1149
1150 static int
1151 src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1152 {
1153 int err = 0;
1154 unsigned reg_nr, subreg_nr;
1155 enum brw_reg_file _file;
1156 enum brw_reg_type type;
1157 enum brw_vertical_stride _vert_stride;
1158 enum brw_width _width;
1159 enum brw_horizontal_stride _horiz_stride;
1160 bool is_scalar_region;
1161 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1162
1163 if (is_align1) {
1164 if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==
1165 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1166 _file = BRW_GENERAL_REGISTER_FILE;
1167 } else {
1168 _file = BRW_ARCHITECTURE_REGISTER_FILE;
1169 }
1170
1171 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1172 subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst);
1173 type = brw_inst_3src_a1_src1_type(devinfo, inst);
1174
1175 _vert_stride = vstride_from_align1_3src_vstride(
1176 brw_inst_3src_a1_src1_vstride(devinfo, inst));
1177 _horiz_stride = hstride_from_align1_3src_hstride(
1178 brw_inst_3src_a1_src1_hstride(devinfo, inst));
1179 _width = implied_width(_vert_stride, _horiz_stride);
1180 } else {
1181 _file = BRW_GENERAL_REGISTER_FILE;
1182 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1183 subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4;
1184 type = brw_inst_3src_a16_src_type(devinfo, inst);
1185
1186 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) {
1187 _vert_stride = BRW_VERTICAL_STRIDE_0;
1188 _width = BRW_WIDTH_1;
1189 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1190 } else {
1191 _vert_stride = BRW_VERTICAL_STRIDE_4;
1192 _width = BRW_WIDTH_4;
1193 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1194 }
1195 }
1196 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1197 _width == BRW_WIDTH_1 &&
1198 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1199
1200 subreg_nr /= brw_reg_type_to_size(type);
1201
1202 err |= control(file, "negate", m_negate,
1203 brw_inst_3src_src1_negate(devinfo, inst), NULL);
1204 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
1205
1206 err |= reg(file, _file, reg_nr);
1207 if (err == -1)
1208 return 0;
1209 if (subreg_nr || is_scalar_region)
1210 format(file, ".%d", subreg_nr);
1211 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1212 if (!is_scalar_region && !is_align1)
1213 err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
1214 string(file, brw_reg_type_to_letters(type));
1215 return err;
1216 }
1217
1218 static int
1219 src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1220 {
1221 int err = 0;
1222 unsigned reg_nr, subreg_nr;
1223 enum brw_reg_file _file;
1224 enum brw_reg_type type;
1225 enum brw_vertical_stride _vert_stride;
1226 enum brw_width _width;
1227 enum brw_horizontal_stride _horiz_stride;
1228 bool is_scalar_region;
1229 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1230
1231 if (is_align1) {
1232 if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==
1233 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1234 _file = BRW_GENERAL_REGISTER_FILE;
1235 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1236 subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
1237 type = brw_inst_3src_a1_src2_type(devinfo, inst);
1238 } else {
1239 _file = BRW_IMMEDIATE_VALUE;
1240 uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst);
1241 enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst);
1242
1243 if (type == BRW_REGISTER_TYPE_W) {
1244 format(file, "%dW", imm_val);
1245 } else if (type == BRW_REGISTER_TYPE_UW) {
1246 format(file, "0x%04xUW", imm_val);
1247 } else if (type == BRW_REGISTER_TYPE_HF) {
1248 format(file, "%-gF", _mesa_half_to_float(imm_val));
1249 }
1250 return 0;
1251 }
1252
1253 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1254 * correct? Doesn't seem like it, since there's hstride=1 but
1255 * no vstride=1.
1256 */
1257 _vert_stride = vstride_from_align1_3src_hstride(
1258 brw_inst_3src_a1_src2_hstride(devinfo, inst));
1259 _horiz_stride = hstride_from_align1_3src_hstride(
1260 brw_inst_3src_a1_src2_hstride(devinfo, inst));
1261 _width = implied_width(_vert_stride, _horiz_stride);
1262 } else {
1263 _file = BRW_GENERAL_REGISTER_FILE;
1264 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1265 subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4;
1266 type = brw_inst_3src_a16_src_type(devinfo, inst);
1267
1268 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) {
1269 _vert_stride = BRW_VERTICAL_STRIDE_0;
1270 _width = BRW_WIDTH_1;
1271 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1272 } else {
1273 _vert_stride = BRW_VERTICAL_STRIDE_4;
1274 _width = BRW_WIDTH_4;
1275 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1276 }
1277 }
1278 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1279 _width == BRW_WIDTH_1 &&
1280 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1281
1282 subreg_nr /= brw_reg_type_to_size(type);
1283
1284 err |= control(file, "negate", m_negate,
1285 brw_inst_3src_src2_negate(devinfo, inst), NULL);
1286 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1287
1288 err |= reg(file, _file, reg_nr);
1289 if (err == -1)
1290 return 0;
1291 if (subreg_nr || is_scalar_region)
1292 format(file, ".%d", subreg_nr);
1293 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1294 if (!is_scalar_region && !is_align1)
1295 err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
1296 string(file, brw_reg_type_to_letters(type));
1297 return err;
1298 }
1299
1300 static int
1301 imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
1302 const brw_inst *inst)
1303 {
1304 switch (type) {
1305 case BRW_REGISTER_TYPE_UQ:
1306 format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst));
1307 break;
1308 case BRW_REGISTER_TYPE_Q:
1309 format(file, "%"PRId64"Q", brw_inst_imm_uq(devinfo, inst));
1310 break;
1311 case BRW_REGISTER_TYPE_UD:
1312 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1313 break;
1314 case BRW_REGISTER_TYPE_D:
1315 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1316 break;
1317 case BRW_REGISTER_TYPE_UW:
1318 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1319 break;
1320 case BRW_REGISTER_TYPE_W:
1321 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1322 break;
1323 case BRW_REGISTER_TYPE_UV:
1324 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1325 break;
1326 case BRW_REGISTER_TYPE_VF:
1327 format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));
1328 pad(file, 48);
1329 format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1330 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1331 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1332 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1333 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1334 break;
1335 case BRW_REGISTER_TYPE_V:
1336 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1337 break;
1338 case BRW_REGISTER_TYPE_F:
1339 format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));
1340 pad(file, 48);
1341 format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));
1342 break;
1343 case BRW_REGISTER_TYPE_DF:
1344 format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64));
1345 pad(file, 48);
1346 format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst));
1347 break;
1348 case BRW_REGISTER_TYPE_HF:
1349 string(file, "Half Float IMM");
1350 break;
1351 case BRW_REGISTER_TYPE_NF:
1352 case BRW_REGISTER_TYPE_UB:
1353 case BRW_REGISTER_TYPE_B:
1354 format(file, "*** invalid immediate type %d ", type);
1355 }
1356 return 0;
1357 }
1358
1359 static int
1360 src_sends_da(FILE *file,
1361 const struct gen_device_info *devinfo,
1362 enum brw_reg_type type,
1363 unsigned _reg_nr,
1364 unsigned _reg_subnr)
1365 {
1366 int err = 0;
1367
1368 err |= reg(file, BRW_GENERAL_REGISTER_FILE, _reg_nr);
1369 if (err == -1)
1370 return 0;
1371 if (_reg_subnr)
1372 format(file, ".1");
1373 string(file, brw_reg_type_to_letters(type));
1374
1375 return err;
1376 }
1377
1378 static int
1379 src_sends_ia(FILE *file,
1380 const struct gen_device_info *devinfo,
1381 enum brw_reg_type type,
1382 int _addr_imm,
1383 unsigned _addr_subreg_nr)
1384 {
1385 string(file, "g[a0");
1386 if (_addr_subreg_nr)
1387 format(file, ".1");
1388 if (_addr_imm)
1389 format(file, " %d", _addr_imm);
1390 string(file, "]");
1391 string(file, brw_reg_type_to_letters(type));
1392
1393 return 0;
1394 }
1395
1396 static int
1397 src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1398 {
1399 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1400 if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1401 return src_sends_da(file,
1402 devinfo,
1403 BRW_REGISTER_TYPE_UD,
1404 brw_inst_src0_da_reg_nr(devinfo, inst),
1405 brw_inst_src0_da16_subreg_nr(devinfo, inst));
1406 } else {
1407 return src_sends_ia(file,
1408 devinfo,
1409 BRW_REGISTER_TYPE_UD,
1410 brw_inst_send_src0_ia16_addr_imm(devinfo, inst),
1411 brw_inst_src0_ia_subreg_nr(devinfo, inst));
1412 }
1413 } else if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1414 return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst);
1415 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1416 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1417 return src_da1(file,
1418 devinfo,
1419 brw_inst_opcode(devinfo, inst),
1420 brw_inst_src0_type(devinfo, inst),
1421 brw_inst_src0_reg_file(devinfo, inst),
1422 brw_inst_src0_vstride(devinfo, inst),
1423 brw_inst_src0_width(devinfo, inst),
1424 brw_inst_src0_hstride(devinfo, inst),
1425 brw_inst_src0_da_reg_nr(devinfo, inst),
1426 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1427 brw_inst_src0_abs(devinfo, inst),
1428 brw_inst_src0_negate(devinfo, inst));
1429 } else {
1430 return src_ia1(file,
1431 devinfo,
1432 brw_inst_opcode(devinfo, inst),
1433 brw_inst_src0_type(devinfo, inst),
1434 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1435 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1436 brw_inst_src0_negate(devinfo, inst),
1437 brw_inst_src0_abs(devinfo, inst),
1438 brw_inst_src0_hstride(devinfo, inst),
1439 brw_inst_src0_width(devinfo, inst),
1440 brw_inst_src0_vstride(devinfo, inst));
1441 }
1442 } else {
1443 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1444 return src_da16(file,
1445 devinfo,
1446 brw_inst_opcode(devinfo, inst),
1447 brw_inst_src0_type(devinfo, inst),
1448 brw_inst_src0_reg_file(devinfo, inst),
1449 brw_inst_src0_vstride(devinfo, inst),
1450 brw_inst_src0_da_reg_nr(devinfo, inst),
1451 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1452 brw_inst_src0_abs(devinfo, inst),
1453 brw_inst_src0_negate(devinfo, inst),
1454 brw_inst_src0_da16_swiz_x(devinfo, inst),
1455 brw_inst_src0_da16_swiz_y(devinfo, inst),
1456 brw_inst_src0_da16_swiz_z(devinfo, inst),
1457 brw_inst_src0_da16_swiz_w(devinfo, inst));
1458 } else {
1459 string(file, "Indirect align16 address mode not supported");
1460 return 1;
1461 }
1462 }
1463 }
1464
1465 static int
1466 src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1467 {
1468 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1469 return src_sends_da(file,
1470 devinfo,
1471 BRW_REGISTER_TYPE_UD,
1472 brw_inst_send_src1_reg_nr(devinfo, inst),
1473 0 /* subreg_nr */);
1474 } else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1475 return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst);
1476 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1477 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1478 return src_da1(file,
1479 devinfo,
1480 brw_inst_opcode(devinfo, inst),
1481 brw_inst_src1_type(devinfo, inst),
1482 brw_inst_src1_reg_file(devinfo, inst),
1483 brw_inst_src1_vstride(devinfo, inst),
1484 brw_inst_src1_width(devinfo, inst),
1485 brw_inst_src1_hstride(devinfo, inst),
1486 brw_inst_src1_da_reg_nr(devinfo, inst),
1487 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1488 brw_inst_src1_abs(devinfo, inst),
1489 brw_inst_src1_negate(devinfo, inst));
1490 } else {
1491 return src_ia1(file,
1492 devinfo,
1493 brw_inst_opcode(devinfo, inst),
1494 brw_inst_src1_type(devinfo, inst),
1495 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1496 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1497 brw_inst_src1_negate(devinfo, inst),
1498 brw_inst_src1_abs(devinfo, inst),
1499 brw_inst_src1_hstride(devinfo, inst),
1500 brw_inst_src1_width(devinfo, inst),
1501 brw_inst_src1_vstride(devinfo, inst));
1502 }
1503 } else {
1504 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1505 return src_da16(file,
1506 devinfo,
1507 brw_inst_opcode(devinfo, inst),
1508 brw_inst_src1_type(devinfo, inst),
1509 brw_inst_src1_reg_file(devinfo, inst),
1510 brw_inst_src1_vstride(devinfo, inst),
1511 brw_inst_src1_da_reg_nr(devinfo, inst),
1512 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1513 brw_inst_src1_abs(devinfo, inst),
1514 brw_inst_src1_negate(devinfo, inst),
1515 brw_inst_src1_da16_swiz_x(devinfo, inst),
1516 brw_inst_src1_da16_swiz_y(devinfo, inst),
1517 brw_inst_src1_da16_swiz_z(devinfo, inst),
1518 brw_inst_src1_da16_swiz_w(devinfo, inst));
1519 } else {
1520 string(file, "Indirect align16 address mode not supported");
1521 return 1;
1522 }
1523 }
1524 }
1525
1526 static int
1527 qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1528 {
1529 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1530 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1531 const unsigned nib_ctl = devinfo->gen < 7 ? 0 :
1532 brw_inst_nib_control(devinfo, inst);
1533
1534 if (exec_size < 8 || nib_ctl) {
1535 format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1);
1536 } else if (exec_size == 8) {
1537 switch (qtr_ctl) {
1538 case 0:
1539 string(file, " 1Q");
1540 break;
1541 case 1:
1542 string(file, " 2Q");
1543 break;
1544 case 2:
1545 string(file, " 3Q");
1546 break;
1547 case 3:
1548 string(file, " 4Q");
1549 break;
1550 }
1551 } else if (exec_size == 16) {
1552 if (qtr_ctl < 2)
1553 string(file, " 1H");
1554 else
1555 string(file, " 2H");
1556 }
1557 return 0;
1558 }
1559
1560 #ifdef DEBUG
1561 static __attribute__((__unused__)) int
1562 brw_disassemble_imm(const struct gen_device_info *devinfo,
1563 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1564 {
1565 brw_inst inst;
1566 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1567 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1568 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1569 }
1570 #endif
1571
1572 int
1573 brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
1574 const brw_inst *inst, bool is_compacted)
1575 {
1576 int err = 0;
1577 int space = 0;
1578
1579 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1580 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1581
1582 if (brw_inst_pred_control(devinfo, inst)) {
1583 string(file, "(");
1584 err |= control(file, "predicate inverse", pred_inv,
1585 brw_inst_pred_inv(devinfo, inst), NULL);
1586 format(file, "f%"PRIu64".%"PRIu64,
1587 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1588 brw_inst_flag_subreg_nr(devinfo, inst));
1589 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1590 err |= control(file, "predicate control align1", pred_ctrl_align1,
1591 brw_inst_pred_control(devinfo, inst), NULL);
1592 } else {
1593 err |= control(file, "predicate control align16", pred_ctrl_align16,
1594 brw_inst_pred_control(devinfo, inst), NULL);
1595 }
1596 string(file, ") ");
1597 }
1598
1599 err |= print_opcode(file, devinfo, opcode);
1600 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1601 NULL);
1602
1603 err |= control(file, "debug control", debug_ctrl,
1604 brw_inst_debug_control(devinfo, inst), NULL);
1605
1606 if (opcode == BRW_OPCODE_MATH) {
1607 string(file, " ");
1608 err |= control(file, "function", math_function,
1609 brw_inst_math_function(devinfo, inst), NULL);
1610 } else if (!is_send(opcode)) {
1611 err |= control(file, "conditional modifier", conditional_modifier,
1612 brw_inst_cond_modifier(devinfo, inst), NULL);
1613
1614 /* If we're using the conditional modifier, print which flags reg is
1615 * used for it. Note that on gen6+, the embedded-condition SEL and
1616 * control flow doesn't update flags.
1617 */
1618 if (brw_inst_cond_modifier(devinfo, inst) &&
1619 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1620 opcode != BRW_OPCODE_CSEL &&
1621 opcode != BRW_OPCODE_IF &&
1622 opcode != BRW_OPCODE_WHILE))) {
1623 format(file, ".f%"PRIu64".%"PRIu64,
1624 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1625 brw_inst_flag_subreg_nr(devinfo, inst));
1626 }
1627 }
1628
1629 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1630 string(file, "(");
1631 err |= control(file, "execution size", exec_size,
1632 brw_inst_exec_size(devinfo, inst), NULL);
1633 string(file, ")");
1634 }
1635
1636 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1637 format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
1638
1639 if (has_uip(devinfo, opcode)) {
1640 /* Instructions that have UIP also have JIP. */
1641 pad(file, 16);
1642 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1643 pad(file, 32);
1644 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1645 } else if (has_jip(devinfo, opcode)) {
1646 pad(file, 16);
1647 if (devinfo->gen >= 7) {
1648 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1649 } else {
1650 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1651 }
1652 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1653 opcode == BRW_OPCODE_CONTINUE ||
1654 opcode == BRW_OPCODE_ELSE)) {
1655 pad(file, 16);
1656 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1657 pad(file, 32);
1658 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1659 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1660 opcode == BRW_OPCODE_IFF ||
1661 opcode == BRW_OPCODE_HALT)) {
1662 pad(file, 16);
1663 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1664 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1665 pad(file, 16);
1666 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1667 } else if (opcode == BRW_OPCODE_JMPI) {
1668 pad(file, 16);
1669 err |= src1(file, devinfo, inst);
1670 } else if (desc && desc->nsrc == 3) {
1671 pad(file, 16);
1672 err |= dest_3src(file, devinfo, inst);
1673
1674 pad(file, 32);
1675 err |= src0_3src(file, devinfo, inst);
1676
1677 pad(file, 48);
1678 err |= src1_3src(file, devinfo, inst);
1679
1680 pad(file, 64);
1681 err |= src2_3src(file, devinfo, inst);
1682 } else if (desc) {
1683 if (desc->ndst > 0) {
1684 pad(file, 16);
1685 err |= dest(file, devinfo, inst);
1686 }
1687
1688 if (desc->nsrc > 0) {
1689 pad(file, 32);
1690 err |= src0(file, devinfo, inst);
1691 }
1692
1693 if (desc->nsrc > 1) {
1694 pad(file, 48);
1695 err |= src1(file, devinfo, inst);
1696 }
1697 }
1698
1699 if (is_send(opcode)) {
1700 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1701
1702 bool has_imm_desc = false, has_imm_ex_desc = false;
1703 uint32_t imm_desc = 0, imm_ex_desc = 0;
1704 if (is_split_send(devinfo, opcode)) {
1705 pad(file, 64);
1706 if (brw_inst_send_sel_reg32_desc(devinfo, inst)) {
1707 /* show the indirect descriptor source */
1708 err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0, 0);
1709 } else {
1710 has_imm_desc = true;
1711 imm_desc = brw_inst_send_desc(devinfo, inst);
1712 fprintf(file, "0x%08"PRIx32, imm_desc);
1713 }
1714
1715 pad(file, 80);
1716 if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) {
1717 /* show the indirect descriptor source */
1718 err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0,
1719 brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));
1720 } else {
1721 has_imm_ex_desc = true;
1722 imm_ex_desc = brw_inst_send_ex_desc(devinfo, inst);
1723 fprintf(file, "0x%08"PRIx32, imm_ex_desc);
1724 }
1725 } else {
1726 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1727 /* show the indirect descriptor source */
1728 pad(file, 48);
1729 err |= src1(file, devinfo, inst);
1730 pad(file, 64);
1731 } else {
1732 has_imm_desc = true;
1733 imm_desc = brw_inst_send_desc(devinfo, inst);
1734 pad(file, 48);
1735 }
1736
1737 /* Print message descriptor as immediate source */
1738 fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);
1739 }
1740
1741 newline(file);
1742 pad(file, 16);
1743 space = 0;
1744
1745 fprintf(file, " ");
1746 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1747 sfid, &space);
1748 string(file, " MsgDesc:");
1749
1750 if (!has_imm_desc) {
1751 format(file, " indirect");
1752 } else {
1753 switch (sfid) {
1754 case BRW_SFID_MATH:
1755 err |= control(file, "math function", math_function,
1756 brw_inst_math_msg_function(devinfo, inst), &space);
1757 err |= control(file, "math saturate", math_saturate,
1758 brw_inst_math_msg_saturate(devinfo, inst), &space);
1759 err |= control(file, "math signed", math_signed,
1760 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1761 err |= control(file, "math scalar", math_scalar,
1762 brw_inst_math_msg_data_type(devinfo, inst), &space);
1763 err |= control(file, "math precision", math_precision,
1764 brw_inst_math_msg_precision(devinfo, inst), &space);
1765 break;
1766 case BRW_SFID_SAMPLER:
1767 if (devinfo->gen >= 5) {
1768 err |= control(file, "sampler message", gen5_sampler_msg_type,
1769 brw_sampler_desc_msg_type(devinfo, imm_desc),
1770 &space);
1771 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1772 brw_sampler_desc_simd_mode(devinfo, imm_desc),
1773 &space);
1774 format(file, " Surface = %u Sampler = %u",
1775 brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1776 brw_sampler_desc_sampler(devinfo, imm_desc));
1777 } else {
1778 format(file, " (%u, %u, %u, ",
1779 brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1780 brw_sampler_desc_sampler(devinfo, imm_desc),
1781 brw_sampler_desc_msg_type(devinfo, imm_desc));
1782 if (!devinfo->is_g4x) {
1783 err |= control(file, "sampler target format",
1784 sampler_target_format,
1785 brw_sampler_desc_return_format(devinfo, imm_desc),
1786 NULL);
1787 }
1788 string(file, ")");
1789 }
1790 break;
1791 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1792 case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
1793 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1794 if (devinfo->gen >= 6) {
1795 format(file, " (%u, %u, %u, %u)",
1796 brw_dp_desc_binding_table_index(devinfo, imm_desc),
1797 brw_dp_desc_msg_control(devinfo, imm_desc),
1798 brw_dp_desc_msg_type(devinfo, imm_desc),
1799 devinfo->gen >= 7 ? 0u :
1800 brw_dp_write_desc_write_commit(devinfo, imm_desc));
1801 } else {
1802 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1803 err |= control(file, "DP read message type",
1804 is_965 ? gen4_dp_read_port_msg_type :
1805 g45_dp_read_port_msg_type,
1806 brw_dp_read_desc_msg_type(devinfo, imm_desc),
1807 &space);
1808
1809 format(file, " MsgCtrl = 0x%u",
1810 brw_dp_read_desc_msg_control(devinfo, imm_desc));
1811
1812 format(file, " Surface = %u",
1813 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1814 }
1815 break;
1816
1817 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1818 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1819 unsigned msg_type = brw_dp_write_desc_msg_type(devinfo, imm_desc);
1820
1821 err |= control(file, "DP rc message type",
1822 dp_rc_msg_type(devinfo), msg_type, &space);
1823
1824 bool is_rt_write = msg_type ==
1825 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1826 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1827
1828 if (is_rt_write) {
1829 err |= control(file, "RT message type", m_rt_write_subtype,
1830 brw_inst_rt_message_type(devinfo, inst), &space);
1831 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1832 string(file, " Hi");
1833 if (brw_dp_write_desc_last_render_target(devinfo, imm_desc))
1834 string(file, " LastRT");
1835 if (devinfo->gen < 7 &&
1836 brw_dp_write_desc_write_commit(devinfo, imm_desc))
1837 string(file, " WriteCommit");
1838 } else {
1839 format(file, " MsgCtrl = 0x%u",
1840 brw_dp_write_desc_msg_control(devinfo, imm_desc));
1841 }
1842
1843 format(file, " Surface = %u",
1844 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1845 break;
1846 }
1847
1848 case BRW_SFID_URB: {
1849 unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1850
1851 format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));
1852
1853 space = 1;
1854
1855 err |= control(file, "urb opcode",
1856 devinfo->gen >= 7 ? gen7_urb_opcode
1857 : gen5_urb_opcode,
1858 opcode, &space);
1859
1860 if (devinfo->gen >= 7 &&
1861 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1862 string(file, " per-slot");
1863 }
1864
1865 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1866 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1867 if (brw_inst_urb_channel_mask_present(devinfo, inst))
1868 string(file, " masked");
1869 } else {
1870 err |= control(file, "urb swizzle", urb_swizzle,
1871 brw_inst_urb_swizzle_control(devinfo, inst),
1872 &space);
1873 }
1874
1875 if (devinfo->gen < 7) {
1876 err |= control(file, "urb allocate", urb_allocate,
1877 brw_inst_urb_allocate(devinfo, inst), &space);
1878 err |= control(file, "urb used", urb_used,
1879 brw_inst_urb_used(devinfo, inst), &space);
1880 }
1881 if (devinfo->gen < 8) {
1882 err |= control(file, "urb complete", urb_complete,
1883 brw_inst_urb_complete(devinfo, inst), &space);
1884 }
1885 break;
1886 }
1887 case BRW_SFID_THREAD_SPAWNER:
1888 break;
1889
1890 case BRW_SFID_MESSAGE_GATEWAY:
1891 format(file, " (%s)",
1892 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1893 break;
1894
1895 case GEN7_SFID_DATAPORT_DATA_CACHE:
1896 if (devinfo->gen >= 7) {
1897 format(file, " (");
1898
1899 err |= control(file, "DP DC0 message type",
1900 dp_dc0_msg_type_gen7,
1901 brw_dp_desc_msg_type(devinfo, imm_desc), &space);
1902
1903 format(file, ", %u, ",
1904 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1905
1906 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1907 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1908 control(file, "atomic op", aop,
1909 brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf,
1910 &space);
1911 break;
1912 default:
1913 format(file, "%u",
1914 brw_dp_desc_msg_control(devinfo, imm_desc));
1915 }
1916 format(file, ")");
1917 break;
1918 }
1919 /* FALLTHROUGH */
1920
1921 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1922 if (devinfo->gen >= 7) {
1923 format(file, " (");
1924
1925 unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc);
1926
1927 err |= control(file, "DP DC1 message type",
1928 dp_dc1_msg_type_hsw,
1929 brw_dp_desc_msg_type(devinfo, imm_desc), &space);
1930
1931 format(file, ", Surface = %u, ",
1932 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1933
1934 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1935 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1936 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1937 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1938 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1939 /* fallthrough */
1940 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1941 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1942 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1943 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1944 break;
1945 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1946 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1947 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1948 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE:
1949 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE:
1950 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ: {
1951 static const char *simd_modes[] = { "4x2", "16", "8" };
1952 format(file, "SIMD%s, Mask = 0x%x",
1953 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1954 break;
1955 }
1956 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP:
1957 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1958 control(file, "atomic float op", aop_float, msg_ctrl & 0xf,
1959 &space);
1960 break;
1961 default:
1962 format(file, "0x%x", msg_ctrl);
1963 }
1964 format(file, ")");
1965 break;
1966 }
1967 /* FALLTHROUGH */
1968 }
1969
1970 case GEN7_SFID_PIXEL_INTERPOLATOR:
1971 if (devinfo->gen >= 7) {
1972 format(file, " (%s, %s, 0x%02"PRIx64")",
1973 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1974 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1975 brw_inst_pi_message_data(devinfo, inst));
1976 break;
1977 }
1978 /* FALLTHROUGH */
1979
1980 default:
1981 format(file, "unsupported shared function ID %d", sfid);
1982 break;
1983 }
1984
1985 if (space)
1986 string(file, " ");
1987 }
1988 if (has_imm_desc)
1989 format(file, "mlen %u", brw_message_desc_mlen(devinfo, imm_desc));
1990 if (has_imm_ex_desc) {
1991 format(file, " ex_mlen %u",
1992 brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc));
1993 }
1994 if (has_imm_desc)
1995 format(file, " rlen %u", brw_message_desc_rlen(devinfo, imm_desc));
1996 }
1997 pad(file, 64);
1998 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1999 string(file, "{");
2000 space = 1;
2001 err |= control(file, "access mode", access_mode,
2002 brw_inst_access_mode(devinfo, inst), &space);
2003 if (devinfo->gen >= 6) {
2004 err |= control(file, "write enable control", wectrl,
2005 brw_inst_mask_control(devinfo, inst), &space);
2006 } else {
2007 err |= control(file, "mask control", mask_ctrl,
2008 brw_inst_mask_control(devinfo, inst), &space);
2009 }
2010 err |= control(file, "dependency control", dep_ctrl,
2011 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
2012 brw_inst_no_dd_clear(devinfo, inst)), &space);
2013
2014 if (devinfo->gen >= 6)
2015 err |= qtr_ctrl(file, devinfo, inst);
2016 else {
2017 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
2018 desc && desc->ndst > 0 &&
2019 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
2020 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
2021 format(file, " compr4");
2022 } else {
2023 err |= control(file, "compression control", compr_ctrl,
2024 brw_inst_qtr_control(devinfo, inst), &space);
2025 }
2026 }
2027
2028 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
2029 err |= control(file, "thread control", thread_ctrl,
2030 brw_inst_thread_control(devinfo, inst), &space);
2031 if (has_branch_ctrl(devinfo, opcode)) {
2032 err |= control(file, "branch ctrl", branch_ctrl,
2033 brw_inst_branch_control(devinfo, inst), &space);
2034 } else if (devinfo->gen >= 6) {
2035 err |= control(file, "acc write control", accwr,
2036 brw_inst_acc_wr_control(devinfo, inst), &space);
2037 }
2038 if (is_send(opcode))
2039 err |= control(file, "end of thread", end_of_thread,
2040 brw_inst_eot(devinfo, inst), &space);
2041 if (space)
2042 string(file, " ");
2043 string(file, "}");
2044 }
2045 string(file, ";");
2046 newline(file);
2047 return err;
2048 }