2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
27 #include "brw_eu_defines.h"
29 #include "brw_shader.h"
33 #include "util/half_float.h"
36 has_jip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
41 return opcode
== BRW_OPCODE_IF
||
42 opcode
== BRW_OPCODE_ELSE
||
43 opcode
== BRW_OPCODE_ENDIF
||
44 opcode
== BRW_OPCODE_WHILE
||
45 opcode
== BRW_OPCODE_BREAK
||
46 opcode
== BRW_OPCODE_CONTINUE
||
47 opcode
== BRW_OPCODE_HALT
;
51 has_uip(const struct gen_device_info
*devinfo
, enum opcode opcode
)
56 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
57 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
58 opcode
== BRW_OPCODE_BREAK
||
59 opcode
== BRW_OPCODE_CONTINUE
||
60 opcode
== BRW_OPCODE_HALT
;
64 has_branch_ctrl(const struct gen_device_info
*devinfo
, enum opcode opcode
)
69 return opcode
== BRW_OPCODE_IF
||
70 opcode
== BRW_OPCODE_ELSE
;
71 /* opcode == BRW_OPCODE_GOTO; */
75 is_logic_instruction(unsigned opcode
)
77 return opcode
== BRW_OPCODE_AND
||
78 opcode
== BRW_OPCODE_NOT
||
79 opcode
== BRW_OPCODE_OR
||
80 opcode
== BRW_OPCODE_XOR
;
83 const char *const conditional_modifier
[16] = {
84 [BRW_CONDITIONAL_NONE
] = "",
85 [BRW_CONDITIONAL_Z
] = ".z",
86 [BRW_CONDITIONAL_NZ
] = ".nz",
87 [BRW_CONDITIONAL_G
] = ".g",
88 [BRW_CONDITIONAL_GE
] = ".ge",
89 [BRW_CONDITIONAL_L
] = ".l",
90 [BRW_CONDITIONAL_LE
] = ".le",
91 [BRW_CONDITIONAL_R
] = ".r",
92 [BRW_CONDITIONAL_O
] = ".o",
93 [BRW_CONDITIONAL_U
] = ".u",
96 static const char *const m_negate
[2] = {
101 static const char *const _abs
[2] = {
106 static const char *const m_bitnot
[2] = { "", "~" };
108 static const char *const vert_stride
[16] = {
119 static const char *const width
[8] = {
127 static const char *const horiz_stride
[4] = {
134 static const char *const chan_sel
[4] = {
141 static const char *const debug_ctrl
[2] = {
146 static const char *const saturate
[2] = {
151 static const char *const cmpt_ctrl
[2] = {
156 static const char *const accwr
[2] = {
161 static const char *const branch_ctrl
[2] = {
166 static const char *const wectrl
[2] = {
171 static const char *const exec_size
[8] = {
180 static const char *const pred_inv
[2] = {
185 const char *const pred_ctrl_align16
[16] = {
195 static const char *const pred_ctrl_align1
[16] = {
196 [BRW_PREDICATE_NORMAL
] = "",
197 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
198 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
199 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
200 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
201 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
202 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
203 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
204 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
205 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
206 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
207 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
208 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
211 static const char *const thread_ctrl
[4] = {
212 [BRW_THREAD_NORMAL
] = "",
213 [BRW_THREAD_ATOMIC
] = "atomic",
214 [BRW_THREAD_SWITCH
] = "switch",
217 static const char *const compr_ctrl
[4] = {
224 static const char *const dep_ctrl
[4] = {
228 [3] = "NoDDClr,NoDDChk",
231 static const char *const mask_ctrl
[4] = {
236 static const char *const access_mode
[2] = {
241 static const char *const reg_file
[4] = {
248 static const char *const writemask
[16] = {
267 static const char *const end_of_thread
[2] = {
272 /* SFIDs on Gen4-5 */
273 static const char *const gen4_sfid
[16] = {
274 [BRW_SFID_NULL
] = "null",
275 [BRW_SFID_MATH
] = "math",
276 [BRW_SFID_SAMPLER
] = "sampler",
277 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
278 [BRW_SFID_DATAPORT_READ
] = "read",
279 [BRW_SFID_DATAPORT_WRITE
] = "write",
280 [BRW_SFID_URB
] = "urb",
281 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
282 [BRW_SFID_VME
] = "vme",
285 static const char *const gen6_sfid
[16] = {
286 [BRW_SFID_NULL
] = "null",
287 [BRW_SFID_MATH
] = "math",
288 [BRW_SFID_SAMPLER
] = "sampler",
289 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
290 [BRW_SFID_URB
] = "urb",
291 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
292 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "sampler",
293 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
294 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
295 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
296 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
297 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
298 [HSW_SFID_CRE
] = "cre",
301 static const char *const gen7_gateway_subfuncid
[8] = {
302 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
303 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
304 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
305 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
306 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
307 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
308 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
311 static const char *const gen4_dp_read_port_msg_type
[4] = {
312 [0b00] = "OWord Block Read",
313 [0b01] = "OWord Dual Block Read",
314 [0b10] = "Media Block Read",
315 [0b11] = "DWord Scattered Read",
318 static const char *const g45_dp_read_port_msg_type
[8] = {
319 [0b000] = "OWord Block Read",
320 [0b010] = "OWord Dual Block Read",
321 [0b100] = "Media Block Read",
322 [0b110] = "DWord Scattered Read",
323 [0b001] = "Render Target UNORM Read",
324 [0b011] = "AVC Loop Filter Read",
327 static const char *const dp_write_port_msg_type
[8] = {
328 [0b000] = "OWord block write",
329 [0b001] = "OWord dual block write",
330 [0b010] = "media block write",
331 [0b011] = "DWord scattered write",
332 [0b100] = "RT write",
333 [0b101] = "streamed VB write",
334 [0b110] = "RT UNORM write", /* G45+ */
335 [0b111] = "flush render cache",
338 static const char *const dp_rc_msg_type_gen6
[16] = {
339 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
340 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
341 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
342 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
343 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
344 "OWORD unaligned block read",
345 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
346 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
347 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
348 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
349 "OWORD dual block write",
350 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
351 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
352 "DWORD scattered write",
353 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
354 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
355 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
358 static const char *const dp_rc_msg_type_gen7
[16] = {
359 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ
] = "media block read",
360 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ
] = "typed surface read",
361 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP
] = "typed atomic op",
362 [GEN7_DATAPORT_RC_MEMORY_FENCE
] = "memory fence",
363 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE
] = "media block write",
364 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
365 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE
] = "typed surface write"
368 static const char *const dp_rc_msg_type_gen9
[16] = {
369 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE
] = "RT write",
370 [GEN9_DATAPORT_RC_RENDER_TARGET_READ
] = "RT read"
373 static const char *const *
374 dp_rc_msg_type(const struct gen_device_info
*devinfo
)
376 return (devinfo
->gen
>= 9 ? dp_rc_msg_type_gen9
:
377 devinfo
->gen
>= 7 ? dp_rc_msg_type_gen7
:
378 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
:
379 dp_write_port_msg_type
);
382 static const char *const m_rt_write_subtype
[] = {
384 [0b001] = "SIMD16/RepData",
385 [0b010] = "SIMD8/DualSrcLow",
386 [0b011] = "SIMD8/DualSrcHigh",
388 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
389 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
392 static const char *const dp_dc0_msg_type_gen7
[16] = {
393 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
394 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
395 "DC unaligned OWORD block read",
396 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
397 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
398 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
399 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
400 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
401 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
402 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
403 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
404 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
405 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
406 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
409 static const char *const dp_dc1_msg_type_hsw
[32] = {
410 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
411 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
412 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
413 "DC untyped 4x2 atomic op",
414 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
415 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
416 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
417 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
418 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
419 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
420 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
421 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
422 "DC 4x2 atomic counter op",
423 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
424 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
] =
425 "DC untyped atomic float op",
428 static const char *const aop
[16] = {
429 [BRW_AOP_AND
] = "and",
431 [BRW_AOP_XOR
] = "xor",
432 [BRW_AOP_MOV
] = "mov",
433 [BRW_AOP_INC
] = "inc",
434 [BRW_AOP_DEC
] = "dec",
435 [BRW_AOP_ADD
] = "add",
436 [BRW_AOP_SUB
] = "sub",
437 [BRW_AOP_REVSUB
] = "revsub",
438 [BRW_AOP_IMAX
] = "imax",
439 [BRW_AOP_IMIN
] = "imin",
440 [BRW_AOP_UMAX
] = "umax",
441 [BRW_AOP_UMIN
] = "umin",
442 [BRW_AOP_CMPWR
] = "cmpwr",
443 [BRW_AOP_PREDEC
] = "predec",
446 static const char *const aop_float
[4] = {
447 [BRW_AOP_FMAX
] = "fmax",
448 [BRW_AOP_FMIN
] = "fmin",
449 [BRW_AOP_FCMPWR
] = "fcmpwr",
452 static const char * const pixel_interpolator_msg_types
[4] = {
453 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
454 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
455 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
456 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
459 static const char *const math_function
[16] = {
460 [BRW_MATH_FUNCTION_INV
] = "inv",
461 [BRW_MATH_FUNCTION_LOG
] = "log",
462 [BRW_MATH_FUNCTION_EXP
] = "exp",
463 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
464 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
465 [BRW_MATH_FUNCTION_SIN
] = "sin",
466 [BRW_MATH_FUNCTION_COS
] = "cos",
467 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
468 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
469 [BRW_MATH_FUNCTION_POW
] = "pow",
470 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
471 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
472 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
473 [GEN8_MATH_FUNCTION_INVM
] = "invm",
474 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
477 static const char *const math_saturate
[2] = {
482 static const char *const math_signed
[2] = {
487 static const char *const math_scalar
[2] = {
492 static const char *const math_precision
[2] = {
494 [1] = "partial_precision"
497 static const char *const gen5_urb_opcode
[] = {
502 static const char *const gen7_urb_opcode
[] = {
503 [BRW_URB_OPCODE_WRITE_HWORD
] = "write HWord",
504 [BRW_URB_OPCODE_WRITE_OWORD
] = "write OWord",
505 [BRW_URB_OPCODE_READ_HWORD
] = "read HWord",
506 [BRW_URB_OPCODE_READ_OWORD
] = "read OWord",
507 [GEN7_URB_OPCODE_ATOMIC_MOV
] = "atomic mov", /* Gen7+ */
508 [GEN7_URB_OPCODE_ATOMIC_INC
] = "atomic inc", /* Gen7+ */
509 [GEN8_URB_OPCODE_ATOMIC_ADD
] = "atomic add", /* Gen8+ */
510 [GEN8_URB_OPCODE_SIMD8_WRITE
] = "SIMD8 write", /* Gen8+ */
511 [GEN8_URB_OPCODE_SIMD8_READ
] = "SIMD8 read", /* Gen8+ */
512 /* [9-15] - reserved */
515 static const char *const urb_swizzle
[4] = {
516 [BRW_URB_SWIZZLE_NONE
] = "",
517 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
518 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
521 static const char *const urb_allocate
[2] = {
526 static const char *const urb_used
[2] = {
531 static const char *const urb_complete
[2] = {
536 static const char *const gen5_sampler_msg_type
[] = {
537 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
538 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
539 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
540 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
541 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
542 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
543 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
544 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
545 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
546 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
547 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
548 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO
] = "sampleinfo",
549 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
550 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
551 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
552 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
553 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ
] = "sample_lz",
554 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ
] = "sample_c_lz",
555 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ
] = "ld_lz",
556 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W
] = "ld2dms_w",
557 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
558 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
559 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
562 static const char *const gen5_sampler_simd_mode
[4] = {
563 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
564 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
565 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
566 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
569 static const char *const sampler_target_format
[4] = {
579 string(FILE *file
, const char *string
)
582 column
+= strlen(string
);
587 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
590 format(FILE *f
, const char *format
, ...)
594 va_start(args
, format
);
596 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
620 control(FILE *file
, const char *name
, const char *const ctrl
[],
621 unsigned id
, int *space
)
624 fprintf(file
, "*** invalid %s value %d ", name
, id
);
630 string(file
, ctrl
[id
]);
638 print_opcode(FILE *file
, const struct gen_device_info
*devinfo
,
641 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, id
);
643 format(file
, "*** invalid opcode value %d ", id
);
646 string(file
, desc
->name
);
651 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
655 /* Clear the Compr4 instruction compression bit. */
656 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
657 _reg_nr
&= ~BRW_MRF_COMPR4
;
659 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
660 switch (_reg_nr
& 0xf0) {
662 string(file
, "null");
664 case BRW_ARF_ADDRESS
:
665 format(file
, "a%d", _reg_nr
& 0x0f);
667 case BRW_ARF_ACCUMULATOR
:
668 format(file
, "acc%d", _reg_nr
& 0x0f);
671 format(file
, "f%d", _reg_nr
& 0x0f);
674 format(file
, "mask%d", _reg_nr
& 0x0f);
676 case BRW_ARF_MASK_STACK
:
677 format(file
, "msd%d", _reg_nr
& 0x0f);
680 format(file
, "sr%d", _reg_nr
& 0x0f);
682 case BRW_ARF_CONTROL
:
683 format(file
, "cr%d", _reg_nr
& 0x0f);
685 case BRW_ARF_NOTIFICATION_COUNT
:
686 format(file
, "n%d", _reg_nr
& 0x0f);
693 format(file
, "tdr0");
695 case BRW_ARF_TIMESTAMP
:
696 format(file
, "tm%d", _reg_nr
& 0x0f);
699 format(file
, "ARF%d", _reg_nr
);
703 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
704 format(file
, "%d", _reg_nr
);
710 dest(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
712 enum brw_reg_type type
= brw_inst_dst_type(devinfo
, inst
);
713 unsigned elem_size
= brw_reg_type_to_size(type
);
716 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
717 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
718 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
719 brw_inst_dst_da_reg_nr(devinfo
, inst
));
722 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
723 format(file
, ".%"PRIu64
, brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
726 err
|= control(file
, "horiz stride", horiz_stride
,
727 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
729 string(file
, brw_reg_type_to_letters(type
));
731 string(file
, "g[a0");
732 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
733 format(file
, ".%"PRIu64
, brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
735 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
736 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
738 err
|= control(file
, "horiz stride", horiz_stride
,
739 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
741 string(file
, brw_reg_type_to_letters(type
));
744 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
745 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
746 brw_inst_dst_da_reg_nr(devinfo
, inst
));
749 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
750 format(file
, ".%u", 16 / elem_size
);
752 err
|= control(file
, "writemask", writemask
,
753 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
754 string(file
, brw_reg_type_to_letters(type
));
757 string(file
, "Indirect align16 address mode not supported");
765 dest_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
767 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
771 enum brw_reg_type type
;
773 if (is_align1
&& brw_inst_3src_a1_dst_reg_file(devinfo
, inst
))
774 reg_file
= BRW_ARCHITECTURE_REGISTER_FILE
;
775 else if (devinfo
->gen
== 6 && brw_inst_3src_a16_dst_reg_file(devinfo
, inst
))
776 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
778 reg_file
= BRW_GENERAL_REGISTER_FILE
;
780 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
785 type
= brw_inst_3src_a1_dst_type(devinfo
, inst
);
786 subreg_nr
= brw_inst_3src_a1_dst_subreg_nr(devinfo
, inst
);
788 type
= brw_inst_3src_a16_dst_type(devinfo
, inst
);
789 subreg_nr
= brw_inst_3src_a16_dst_subreg_nr(devinfo
, inst
) * 4;
791 subreg_nr
/= brw_reg_type_to_size(type
);
794 format(file
, ".%u", subreg_nr
);
798 err
|= control(file
, "writemask", writemask
,
799 brw_inst_3src_a16_dst_writemask(devinfo
, inst
), NULL
);
801 string(file
, brw_reg_type_to_letters(type
));
807 src_align1_region(FILE *file
,
808 unsigned _vert_stride
, unsigned _width
,
809 unsigned _horiz_stride
)
813 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
815 err
|= control(file
, "width", width
, _width
, NULL
);
817 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
824 const struct gen_device_info
*devinfo
,
826 enum brw_reg_type type
, unsigned _reg_file
,
827 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
828 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
833 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
834 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
836 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
838 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
840 err
|= reg(file
, _reg_file
, reg_num
);
844 unsigned elem_size
= brw_reg_type_to_size(type
);
845 format(file
, ".%d", sub_reg_num
/ elem_size
); /* use formal style like spec */
847 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
848 string(file
, brw_reg_type_to_letters(type
));
854 const struct gen_device_info
*devinfo
,
856 enum brw_reg_type type
,
858 unsigned _addr_subreg_nr
,
861 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
865 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
866 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
868 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
870 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
872 string(file
, "g[a0");
874 format(file
, ".%d", _addr_subreg_nr
);
876 format(file
, " %d", _addr_imm
);
878 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
879 string(file
, brw_reg_type_to_letters(type
));
884 src_swizzle(FILE *file
, unsigned swiz
)
886 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
887 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
888 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
889 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
892 if (x
== y
&& x
== z
&& x
== w
) {
894 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
895 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
897 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
898 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
899 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
900 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
907 const struct gen_device_info
*devinfo
,
909 enum brw_reg_type type
,
911 unsigned _vert_stride
,
916 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
920 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
921 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
923 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
925 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
927 err
|= reg(file
, _reg_file
, _reg_nr
);
931 unsigned elem_size
= brw_reg_type_to_size(type
);
933 /* bit4 for subreg number byte addressing. Make this same meaning as
934 in da1 case, so output looks consistent. */
935 format(file
, ".%d", 16 / elem_size
);
938 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
940 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
941 string(file
, brw_reg_type_to_letters(type
));
945 static enum brw_vertical_stride
946 vstride_from_align1_3src_vstride(enum gen10_align1_3src_vertical_stride vstride
)
949 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
950 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
951 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
952 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8
: return BRW_VERTICAL_STRIDE_8
;
954 unreachable("not reached");
958 static enum brw_horizontal_stride
959 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
962 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_HORIZONTAL_STRIDE_0
;
963 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_HORIZONTAL_STRIDE_1
;
964 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_HORIZONTAL_STRIDE_2
;
965 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_HORIZONTAL_STRIDE_4
;
967 unreachable("not reached");
971 static enum brw_vertical_stride
972 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride
)
975 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0
: return BRW_VERTICAL_STRIDE_0
;
976 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1
: return BRW_VERTICAL_STRIDE_1
;
977 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2
: return BRW_VERTICAL_STRIDE_2
;
978 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4
: return BRW_VERTICAL_STRIDE_4
;
980 unreachable("not reached");
984 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
985 * "Register Region Restrictions" documentation
987 static enum brw_width
988 implied_width(enum brw_vertical_stride _vert_stride
,
989 enum brw_horizontal_stride _horiz_stride
)
991 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
992 if (_vert_stride
== BRW_VERTICAL_STRIDE_0
&&
993 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
996 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
997 } else if (_horiz_stride
== BRW_HORIZONTAL_STRIDE_0
) {
998 switch (_vert_stride
) {
999 case BRW_VERTICAL_STRIDE_2
: return BRW_WIDTH_2
;
1000 case BRW_VERTICAL_STRIDE_4
: return BRW_WIDTH_4
;
1001 case BRW_VERTICAL_STRIDE_8
: return BRW_WIDTH_8
;
1002 case BRW_VERTICAL_STRIDE_0
:
1004 unreachable("not reached");
1008 /* FINISHME: Implement these: */
1010 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1011 * Strides are non-zero.
1013 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1014 * This implies Vertical Stride is always greater than Horizontal
1017 * Given these statements and the knowledge that the stride and width
1018 * values are encoded in logarithmic form, we can perform the division
1019 * by just subtracting.
1021 return _vert_stride
- _horiz_stride
;
1026 src0_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1029 unsigned reg_nr
, subreg_nr
;
1030 enum brw_reg_file _file
;
1031 enum brw_reg_type type
;
1032 enum brw_vertical_stride _vert_stride
;
1033 enum brw_width _width
;
1034 enum brw_horizontal_stride _horiz_stride
;
1035 bool is_scalar_region
;
1036 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1039 if (brw_inst_3src_a1_src0_reg_file(devinfo
, inst
) ==
1040 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1041 _file
= BRW_GENERAL_REGISTER_FILE
;
1042 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1043 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1044 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1045 } else if (brw_inst_3src_a1_src0_type(devinfo
, inst
) ==
1046 BRW_REGISTER_TYPE_NF
) {
1047 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1048 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1049 subreg_nr
= brw_inst_3src_a1_src0_subreg_nr(devinfo
, inst
);
1050 type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1052 _file
= BRW_IMMEDIATE_VALUE
;
1053 uint16_t imm_val
= brw_inst_3src_a1_src0_imm(devinfo
, inst
);
1054 enum brw_reg_type type
= brw_inst_3src_a1_src0_type(devinfo
, inst
);
1056 if (type
== BRW_REGISTER_TYPE_W
) {
1057 format(file
, "%dW", imm_val
);
1058 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1059 format(file
, "0x%04xUW", imm_val
);
1060 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1061 format(file
, "%-gF", _mesa_half_to_float(imm_val
));
1066 _vert_stride
= vstride_from_align1_3src_vstride(
1067 brw_inst_3src_a1_src0_vstride(devinfo
, inst
));
1068 _horiz_stride
= hstride_from_align1_3src_hstride(
1069 brw_inst_3src_a1_src0_hstride(devinfo
, inst
));
1070 _width
= implied_width(_vert_stride
, _horiz_stride
);
1072 _file
= BRW_GENERAL_REGISTER_FILE
;
1073 reg_nr
= brw_inst_3src_src0_reg_nr(devinfo
, inst
);
1074 subreg_nr
= brw_inst_3src_a16_src0_subreg_nr(devinfo
, inst
) * 4;
1075 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1077 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo
, inst
)) {
1078 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1079 _width
= BRW_WIDTH_1
;
1080 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1082 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1083 _width
= BRW_WIDTH_4
;
1084 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1087 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1088 _width
== BRW_WIDTH_1
&&
1089 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1091 subreg_nr
/= brw_reg_type_to_size(type
);
1093 err
|= control(file
, "negate", m_negate
,
1094 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
1095 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
1097 err
|= reg(file
, _file
, reg_nr
);
1100 if (subreg_nr
|| is_scalar_region
)
1101 format(file
, ".%d", subreg_nr
);
1102 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1103 if (!is_scalar_region
&& !is_align1
)
1104 err
|= src_swizzle(file
, brw_inst_3src_a16_src0_swizzle(devinfo
, inst
));
1105 string(file
, brw_reg_type_to_letters(type
));
1110 src1_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1113 unsigned reg_nr
, subreg_nr
;
1114 enum brw_reg_file _file
;
1115 enum brw_reg_type type
;
1116 enum brw_vertical_stride _vert_stride
;
1117 enum brw_width _width
;
1118 enum brw_horizontal_stride _horiz_stride
;
1119 bool is_scalar_region
;
1120 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1123 if (brw_inst_3src_a1_src1_reg_file(devinfo
, inst
) ==
1124 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1125 _file
= BRW_GENERAL_REGISTER_FILE
;
1127 _file
= BRW_ARCHITECTURE_REGISTER_FILE
;
1130 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1131 subreg_nr
= brw_inst_3src_a1_src1_subreg_nr(devinfo
, inst
);
1132 type
= brw_inst_3src_a1_src1_type(devinfo
, inst
);
1134 _vert_stride
= vstride_from_align1_3src_vstride(
1135 brw_inst_3src_a1_src1_vstride(devinfo
, inst
));
1136 _horiz_stride
= hstride_from_align1_3src_hstride(
1137 brw_inst_3src_a1_src1_hstride(devinfo
, inst
));
1138 _width
= implied_width(_vert_stride
, _horiz_stride
);
1140 _file
= BRW_GENERAL_REGISTER_FILE
;
1141 reg_nr
= brw_inst_3src_src1_reg_nr(devinfo
, inst
);
1142 subreg_nr
= brw_inst_3src_a16_src1_subreg_nr(devinfo
, inst
) * 4;
1143 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1145 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo
, inst
)) {
1146 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1147 _width
= BRW_WIDTH_1
;
1148 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1150 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1151 _width
= BRW_WIDTH_4
;
1152 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1155 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1156 _width
== BRW_WIDTH_1
&&
1157 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1159 subreg_nr
/= brw_reg_type_to_size(type
);
1161 err
|= control(file
, "negate", m_negate
,
1162 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
1163 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
1165 err
|= reg(file
, _file
, reg_nr
);
1168 if (subreg_nr
|| is_scalar_region
)
1169 format(file
, ".%d", subreg_nr
);
1170 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1171 if (!is_scalar_region
&& !is_align1
)
1172 err
|= src_swizzle(file
, brw_inst_3src_a16_src1_swizzle(devinfo
, inst
));
1173 string(file
, brw_reg_type_to_letters(type
));
1178 src2_3src(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1181 unsigned reg_nr
, subreg_nr
;
1182 enum brw_reg_file _file
;
1183 enum brw_reg_type type
;
1184 enum brw_vertical_stride _vert_stride
;
1185 enum brw_width _width
;
1186 enum brw_horizontal_stride _horiz_stride
;
1187 bool is_scalar_region
;
1188 bool is_align1
= brw_inst_3src_access_mode(devinfo
, inst
) == BRW_ALIGN_1
;
1191 if (brw_inst_3src_a1_src2_reg_file(devinfo
, inst
) ==
1192 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE
) {
1193 _file
= BRW_GENERAL_REGISTER_FILE
;
1194 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1195 subreg_nr
= brw_inst_3src_a1_src2_subreg_nr(devinfo
, inst
);
1196 type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1198 _file
= BRW_IMMEDIATE_VALUE
;
1199 uint16_t imm_val
= brw_inst_3src_a1_src2_imm(devinfo
, inst
);
1200 enum brw_reg_type type
= brw_inst_3src_a1_src2_type(devinfo
, inst
);
1202 if (type
== BRW_REGISTER_TYPE_W
) {
1203 format(file
, "%dW", imm_val
);
1204 } else if (type
== BRW_REGISTER_TYPE_UW
) {
1205 format(file
, "0x%04xUW", imm_val
);
1206 } else if (type
== BRW_REGISTER_TYPE_HF
) {
1207 format(file
, "%-gF", _mesa_half_to_float(imm_val
));
1212 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1213 * correct? Doesn't seem like it, since there's hstride=1 but
1216 _vert_stride
= vstride_from_align1_3src_hstride(
1217 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1218 _horiz_stride
= hstride_from_align1_3src_hstride(
1219 brw_inst_3src_a1_src2_hstride(devinfo
, inst
));
1220 _width
= implied_width(_vert_stride
, _horiz_stride
);
1222 _file
= BRW_GENERAL_REGISTER_FILE
;
1223 reg_nr
= brw_inst_3src_src2_reg_nr(devinfo
, inst
);
1224 subreg_nr
= brw_inst_3src_a16_src2_subreg_nr(devinfo
, inst
) * 4;
1225 type
= brw_inst_3src_a16_src_type(devinfo
, inst
);
1227 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo
, inst
)) {
1228 _vert_stride
= BRW_VERTICAL_STRIDE_0
;
1229 _width
= BRW_WIDTH_1
;
1230 _horiz_stride
= BRW_HORIZONTAL_STRIDE_0
;
1232 _vert_stride
= BRW_VERTICAL_STRIDE_4
;
1233 _width
= BRW_WIDTH_4
;
1234 _horiz_stride
= BRW_HORIZONTAL_STRIDE_1
;
1237 is_scalar_region
= _vert_stride
== BRW_VERTICAL_STRIDE_0
&&
1238 _width
== BRW_WIDTH_1
&&
1239 _horiz_stride
== BRW_HORIZONTAL_STRIDE_0
;
1241 subreg_nr
/= brw_reg_type_to_size(type
);
1243 err
|= control(file
, "negate", m_negate
,
1244 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1245 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1247 err
|= reg(file
, _file
, reg_nr
);
1250 if (subreg_nr
|| is_scalar_region
)
1251 format(file
, ".%d", subreg_nr
);
1252 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
1253 if (!is_scalar_region
&& !is_align1
)
1254 err
|= src_swizzle(file
, brw_inst_3src_a16_src2_swizzle(devinfo
, inst
));
1255 string(file
, brw_reg_type_to_letters(type
));
1260 imm(FILE *file
, const struct gen_device_info
*devinfo
, enum brw_reg_type type
,
1261 const brw_inst
*inst
)
1264 case BRW_REGISTER_TYPE_UQ
:
1265 format(file
, "0x%016"PRIx64
"UQ", brw_inst_imm_uq(devinfo
, inst
));
1267 case BRW_REGISTER_TYPE_Q
:
1268 format(file
, "%"PRId64
"Q", brw_inst_imm_uq(devinfo
, inst
));
1270 case BRW_REGISTER_TYPE_UD
:
1271 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1273 case BRW_REGISTER_TYPE_D
:
1274 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1276 case BRW_REGISTER_TYPE_UW
:
1277 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1279 case BRW_REGISTER_TYPE_W
:
1280 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1282 case BRW_REGISTER_TYPE_UV
:
1283 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1285 case BRW_REGISTER_TYPE_VF
:
1286 format(file
, "[%-gF, %-gF, %-gF, %-gF]VF",
1287 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1288 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1289 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1290 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1292 case BRW_REGISTER_TYPE_V
:
1293 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1295 case BRW_REGISTER_TYPE_F
:
1296 format(file
, "%-gF", brw_inst_imm_f(devinfo
, inst
));
1298 case BRW_REGISTER_TYPE_DF
:
1299 format(file
, "%-gDF", brw_inst_imm_df(devinfo
, inst
));
1301 case BRW_REGISTER_TYPE_HF
:
1302 string(file
, "Half Float IMM");
1304 case BRW_REGISTER_TYPE_NF
:
1305 case BRW_REGISTER_TYPE_UB
:
1306 case BRW_REGISTER_TYPE_B
:
1307 format(file
, "*** invalid immediate type %d ", type
);
1313 src0(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1315 if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1316 return imm(file
, devinfo
, brw_inst_src0_type(devinfo
, inst
), inst
);
1317 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1318 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1319 return src_da1(file
,
1321 brw_inst_opcode(devinfo
, inst
),
1322 brw_inst_src0_type(devinfo
, inst
),
1323 brw_inst_src0_reg_file(devinfo
, inst
),
1324 brw_inst_src0_vstride(devinfo
, inst
),
1325 brw_inst_src0_width(devinfo
, inst
),
1326 brw_inst_src0_hstride(devinfo
, inst
),
1327 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1328 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1329 brw_inst_src0_abs(devinfo
, inst
),
1330 brw_inst_src0_negate(devinfo
, inst
));
1332 return src_ia1(file
,
1334 brw_inst_opcode(devinfo
, inst
),
1335 brw_inst_src0_type(devinfo
, inst
),
1336 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1337 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1338 brw_inst_src0_negate(devinfo
, inst
),
1339 brw_inst_src0_abs(devinfo
, inst
),
1340 brw_inst_src0_hstride(devinfo
, inst
),
1341 brw_inst_src0_width(devinfo
, inst
),
1342 brw_inst_src0_vstride(devinfo
, inst
));
1345 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1346 return src_da16(file
,
1348 brw_inst_opcode(devinfo
, inst
),
1349 brw_inst_src0_type(devinfo
, inst
),
1350 brw_inst_src0_reg_file(devinfo
, inst
),
1351 brw_inst_src0_vstride(devinfo
, inst
),
1352 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1353 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1354 brw_inst_src0_abs(devinfo
, inst
),
1355 brw_inst_src0_negate(devinfo
, inst
),
1356 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1357 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1358 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1359 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1361 string(file
, "Indirect align16 address mode not supported");
1368 src1(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1370 if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1371 return imm(file
, devinfo
, brw_inst_src1_type(devinfo
, inst
), inst
);
1372 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1373 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1374 return src_da1(file
,
1376 brw_inst_opcode(devinfo
, inst
),
1377 brw_inst_src1_type(devinfo
, inst
),
1378 brw_inst_src1_reg_file(devinfo
, inst
),
1379 brw_inst_src1_vstride(devinfo
, inst
),
1380 brw_inst_src1_width(devinfo
, inst
),
1381 brw_inst_src1_hstride(devinfo
, inst
),
1382 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1383 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1384 brw_inst_src1_abs(devinfo
, inst
),
1385 brw_inst_src1_negate(devinfo
, inst
));
1387 return src_ia1(file
,
1389 brw_inst_opcode(devinfo
, inst
),
1390 brw_inst_src1_type(devinfo
, inst
),
1391 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1392 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1393 brw_inst_src1_negate(devinfo
, inst
),
1394 brw_inst_src1_abs(devinfo
, inst
),
1395 brw_inst_src1_hstride(devinfo
, inst
),
1396 brw_inst_src1_width(devinfo
, inst
),
1397 brw_inst_src1_vstride(devinfo
, inst
));
1400 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1401 return src_da16(file
,
1403 brw_inst_opcode(devinfo
, inst
),
1404 brw_inst_src1_type(devinfo
, inst
),
1405 brw_inst_src1_reg_file(devinfo
, inst
),
1406 brw_inst_src1_vstride(devinfo
, inst
),
1407 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1408 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1409 brw_inst_src1_abs(devinfo
, inst
),
1410 brw_inst_src1_negate(devinfo
, inst
),
1411 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1412 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1413 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1414 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1416 string(file
, "Indirect align16 address mode not supported");
1423 qtr_ctrl(FILE *file
, const struct gen_device_info
*devinfo
, const brw_inst
*inst
)
1425 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1426 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1427 const unsigned nib_ctl
= devinfo
->gen
< 7 ? 0 :
1428 brw_inst_nib_control(devinfo
, inst
);
1430 if (exec_size
< 8 || nib_ctl
) {
1431 format(file
, " %dN", qtr_ctl
* 2 + nib_ctl
+ 1);
1432 } else if (exec_size
== 8) {
1435 string(file
, " 1Q");
1438 string(file
, " 2Q");
1441 string(file
, " 3Q");
1444 string(file
, " 4Q");
1447 } else if (exec_size
== 16) {
1449 string(file
, " 1H");
1451 string(file
, " 2H");
1457 static __attribute__((__unused__
)) int
1458 brw_disassemble_imm(const struct gen_device_info
*devinfo
,
1459 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1462 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1463 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1464 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1469 brw_disassemble_inst(FILE *file
, const struct gen_device_info
*devinfo
,
1470 const brw_inst
*inst
, bool is_compacted
)
1475 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1476 const struct opcode_desc
*desc
= brw_opcode_desc(devinfo
, opcode
);
1478 if (brw_inst_pred_control(devinfo
, inst
)) {
1480 err
|= control(file
, "predicate inverse", pred_inv
,
1481 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1482 format(file
, "f%"PRIu64
, devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1483 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1484 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1485 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1486 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1487 brw_inst_pred_control(devinfo
, inst
), NULL
);
1489 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1490 brw_inst_pred_control(devinfo
, inst
), NULL
);
1495 err
|= print_opcode(file
, devinfo
, opcode
);
1496 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1499 err
|= control(file
, "debug control", debug_ctrl
,
1500 brw_inst_debug_control(devinfo
, inst
), NULL
);
1502 if (opcode
== BRW_OPCODE_MATH
) {
1504 err
|= control(file
, "function", math_function
,
1505 brw_inst_math_function(devinfo
, inst
), NULL
);
1506 } else if (opcode
!= BRW_OPCODE_SEND
&& opcode
!= BRW_OPCODE_SENDC
) {
1507 err
|= control(file
, "conditional modifier", conditional_modifier
,
1508 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1510 /* If we're using the conditional modifier, print which flags reg is
1511 * used for it. Note that on gen6+, the embedded-condition SEL and
1512 * control flow doesn't update flags.
1514 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1515 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1516 opcode
!= BRW_OPCODE_CSEL
&&
1517 opcode
!= BRW_OPCODE_IF
&&
1518 opcode
!= BRW_OPCODE_WHILE
))) {
1519 format(file
, ".f%"PRIu64
,
1520 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1521 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1522 format(file
, ".%"PRIu64
, brw_inst_flag_subreg_nr(devinfo
, inst
));
1526 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1528 err
|= control(file
, "execution size", exec_size
,
1529 brw_inst_exec_size(devinfo
, inst
), NULL
);
1533 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1534 format(file
, " %"PRIu64
, brw_inst_base_mrf(devinfo
, inst
));
1536 if (has_uip(devinfo
, opcode
)) {
1537 /* Instructions that have UIP also have JIP. */
1539 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1541 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1542 } else if (has_jip(devinfo
, opcode
)) {
1544 if (devinfo
->gen
>= 7) {
1545 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1547 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1549 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1550 opcode
== BRW_OPCODE_CONTINUE
||
1551 opcode
== BRW_OPCODE_ELSE
)) {
1553 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1555 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1556 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1557 opcode
== BRW_OPCODE_IFF
||
1558 opcode
== BRW_OPCODE_HALT
)) {
1560 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1561 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1563 format(file
, "Pop: %"PRIu64
, brw_inst_gen4_pop_count(devinfo
, inst
));
1564 } else if (opcode
== BRW_OPCODE_JMPI
) {
1566 err
|= src1(file
, devinfo
, inst
);
1567 } else if (desc
&& desc
->nsrc
== 3) {
1569 err
|= dest_3src(file
, devinfo
, inst
);
1572 err
|= src0_3src(file
, devinfo
, inst
);
1575 err
|= src1_3src(file
, devinfo
, inst
);
1578 err
|= src2_3src(file
, devinfo
, inst
);
1580 if (desc
->ndst
> 0) {
1582 err
|= dest(file
, devinfo
, inst
);
1585 if (desc
->nsrc
> 0) {
1587 err
|= src0(file
, devinfo
, inst
);
1590 if (desc
->nsrc
> 1) {
1592 err
|= src1(file
, devinfo
, inst
);
1596 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
) {
1597 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1599 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1600 /* show the indirect descriptor source */
1602 err
|= src1(file
, devinfo
, inst
);
1610 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1614 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1615 format(file
, " indirect");
1619 err
|= control(file
, "math function", math_function
,
1620 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1621 err
|= control(file
, "math saturate", math_saturate
,
1622 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1623 err
|= control(file
, "math signed", math_signed
,
1624 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1625 err
|= control(file
, "math scalar", math_scalar
,
1626 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1627 err
|= control(file
, "math precision", math_precision
,
1628 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1630 case BRW_SFID_SAMPLER
:
1631 if (devinfo
->gen
>= 5) {
1632 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1633 brw_inst_sampler_msg_type(devinfo
, inst
), &space
);
1634 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1635 brw_inst_sampler_simd_mode(devinfo
, inst
), &space
);
1636 format(file
, " Surface = %"PRIu64
" Sampler = %"PRIu64
,
1637 brw_inst_binding_table_index(devinfo
, inst
),
1638 brw_inst_sampler(devinfo
, inst
));
1640 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", ",
1641 brw_inst_binding_table_index(devinfo
, inst
),
1642 brw_inst_sampler(devinfo
, inst
),
1643 brw_inst_sampler_msg_type(devinfo
, inst
));
1644 if (!devinfo
->is_g4x
) {
1645 err
|= control(file
, "sampler target format",
1646 sampler_target_format
,
1647 brw_inst_sampler_return_format(devinfo
, inst
), NULL
);
1652 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1653 case GEN6_SFID_DATAPORT_CONSTANT_CACHE
:
1654 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1655 if (devinfo
->gen
>= 6) {
1656 format(file
, " (%"PRIu64
", %"PRIu64
", %"PRIu64
", %"PRIu64
")",
1657 brw_inst_binding_table_index(devinfo
, inst
),
1658 brw_inst_dp_msg_control(devinfo
, inst
),
1659 brw_inst_dp_msg_type(devinfo
, inst
),
1660 devinfo
->gen
>= 7 ? 0 : brw_inst_dp_write_commit(devinfo
, inst
));
1662 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1663 err
|= control(file
, "DP read message type",
1664 is_965
? gen4_dp_read_port_msg_type
:
1665 g45_dp_read_port_msg_type
,
1666 brw_inst_dp_read_msg_type(devinfo
, inst
),
1669 format(file
, " MsgCtrl = 0x%"PRIx64
,
1670 brw_inst_dp_read_msg_control(devinfo
, inst
));
1672 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1676 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1677 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1678 unsigned msg_type
= brw_inst_dp_write_msg_type(devinfo
, inst
);
1680 err
|= control(file
, "DP rc message type",
1681 dp_rc_msg_type(devinfo
), msg_type
, &space
);
1683 bool is_rt_write
= msg_type
==
1684 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1685 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1688 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1689 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1690 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1691 string(file
, " Hi");
1692 if (brw_inst_rt_last(devinfo
, inst
))
1693 string(file
, " LastRT");
1694 if (devinfo
->gen
< 7 && brw_inst_dp_write_commit(devinfo
, inst
))
1695 string(file
, " WriteCommit");
1697 format(file
, " MsgCtrl = 0x%"PRIx64
,
1698 brw_inst_dp_write_msg_control(devinfo
, inst
));
1701 format(file
, " Surface = %"PRIu64
, brw_inst_binding_table_index(devinfo
, inst
));
1705 case BRW_SFID_URB
: {
1706 unsigned opcode
= brw_inst_urb_opcode(devinfo
, inst
);
1708 format(file
, " %"PRIu64
, brw_inst_urb_global_offset(devinfo
, inst
));
1712 err
|= control(file
, "urb opcode",
1713 devinfo
->gen
>= 7 ? gen7_urb_opcode
1717 if (devinfo
->gen
>= 7 &&
1718 brw_inst_urb_per_slot_offset(devinfo
, inst
)) {
1719 string(file
, " per-slot");
1722 if (opcode
== GEN8_URB_OPCODE_SIMD8_WRITE
||
1723 opcode
== GEN8_URB_OPCODE_SIMD8_READ
) {
1724 if (brw_inst_urb_channel_mask_present(devinfo
, inst
))
1725 string(file
, " masked");
1727 err
|= control(file
, "urb swizzle", urb_swizzle
,
1728 brw_inst_urb_swizzle_control(devinfo
, inst
),
1732 if (devinfo
->gen
< 7) {
1733 err
|= control(file
, "urb allocate", urb_allocate
,
1734 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1735 err
|= control(file
, "urb used", urb_used
,
1736 brw_inst_urb_used(devinfo
, inst
), &space
);
1738 if (devinfo
->gen
< 8) {
1739 err
|= control(file
, "urb complete", urb_complete
,
1740 brw_inst_urb_complete(devinfo
, inst
), &space
);
1744 case BRW_SFID_THREAD_SPAWNER
:
1747 case BRW_SFID_MESSAGE_GATEWAY
:
1748 format(file
, " (%s)",
1749 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1752 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1753 if (devinfo
->gen
>= 7) {
1756 err
|= control(file
, "DP DC0 message type",
1757 dp_dc0_msg_type_gen7
,
1758 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1760 format(file
, ", %"PRIu64
", ", brw_inst_binding_table_index(devinfo
, inst
));
1762 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1763 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1764 control(file
, "atomic op", aop
,
1765 brw_inst_imm_ud(devinfo
, inst
) >> 8 & 0xf, &space
);
1768 format(file
, "%"PRIu64
, brw_inst_dp_msg_control(devinfo
, inst
));
1775 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1776 if (devinfo
->gen
>= 7) {
1779 unsigned msg_ctrl
= brw_inst_dp_msg_control(devinfo
, inst
);
1781 err
|= control(file
, "DP DC1 message type",
1782 dp_dc1_msg_type_hsw
,
1783 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1785 format(file
, ", Surface = %"PRIu64
", ",
1786 brw_inst_binding_table_index(devinfo
, inst
));
1788 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1789 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1790 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1791 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1792 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1794 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1795 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1796 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1797 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1799 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1800 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1801 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1802 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
: {
1803 static const char *simd_modes
[] = { "4x2", "16", "8" };
1804 format(file
, "SIMD%s, Mask = 0x%x",
1805 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1808 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP
:
1809 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1810 control(file
, "atomic float op", aop_float
, msg_ctrl
& 0xf,
1814 format(file
, "0x%x", msg_ctrl
);
1822 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1823 if (devinfo
->gen
>= 7) {
1824 format(file
, " (%s, %s, 0x%02"PRIx64
")",
1825 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1826 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1827 brw_inst_pi_message_data(devinfo
, inst
));
1833 format(file
, "unsupported shared function ID %d", sfid
);
1839 format(file
, "mlen %"PRIu64
, brw_inst_mlen(devinfo
, inst
));
1840 format(file
, " rlen %"PRIu64
, brw_inst_rlen(devinfo
, inst
));
1844 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1847 err
|= control(file
, "access mode", access_mode
,
1848 brw_inst_access_mode(devinfo
, inst
), &space
);
1849 if (devinfo
->gen
>= 6) {
1850 err
|= control(file
, "write enable control", wectrl
,
1851 brw_inst_mask_control(devinfo
, inst
), &space
);
1853 err
|= control(file
, "mask control", mask_ctrl
,
1854 brw_inst_mask_control(devinfo
, inst
), &space
);
1856 err
|= control(file
, "dependency control", dep_ctrl
,
1857 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
1858 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
1860 if (devinfo
->gen
>= 6)
1861 err
|= qtr_ctrl(file
, devinfo
, inst
);
1863 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
1864 desc
&& desc
->ndst
> 0 &&
1865 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
1866 brw_inst_dst_da_reg_nr(devinfo
, inst
) & BRW_MRF_COMPR4
) {
1867 format(file
, " compr4");
1869 err
|= control(file
, "compression control", compr_ctrl
,
1870 brw_inst_qtr_control(devinfo
, inst
), &space
);
1874 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
1875 err
|= control(file
, "thread control", thread_ctrl
,
1876 brw_inst_thread_control(devinfo
, inst
), &space
);
1877 if (has_branch_ctrl(devinfo
, opcode
)) {
1878 err
|= control(file
, "branch ctrl", branch_ctrl
,
1879 brw_inst_branch_control(devinfo
, inst
), &space
);
1880 } else if (devinfo
->gen
>= 6) {
1881 err
|= control(file
, "acc write control", accwr
,
1882 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
1884 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
)
1885 err
|= control(file
, "end of thread", end_of_thread
,
1886 brw_inst_eot(devinfo
, inst
), &space
);