src/intel/compiler/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include <stdio.h>
  38 #include "brw_inst.h"
  39 #include "brw_eu_defines.h"
  40 #include "brw_reg.h"
  41 #include "brw_disasm_info.h"
  42
  43 #ifdef __cplusplus
  44 extern "C" {
  45 #endif
  46
  47 #define BRW_EU_MAX_INSN_STACK 5
  48
  49 struct brw_insn_state {
  50    /* One of BRW_EXECUTE_* */
  51    unsigned exec_size:3;
  52
  53    /* Group in units of channels */
  54    unsigned group:5;
  55
  56    /* Compression control on gen4-5 */
  57    bool compressed:1;
  58
  59    /* One of BRW_MASK_* */
  60    unsigned mask_control:1;
  61
  62    bool saturate:1;
  63
  64    /* One of BRW_ALIGN_* */
  65    unsigned access_mode:1;
  66
  67    /* One of BRW_PREDICATE_* */
  68    enum brw_predicate predicate:4;
  69
  70    bool pred_inv:1;
  71
  72    /* Flag subreg.  Bottom bit is subreg, top bit is reg */
  73    unsigned flag_subreg:2;
  74
  75    bool acc_wr_control:1;
  76 };
  77
  78
  79 /* A helper for accessing the last instruction emitted.  This makes it easy
  80  * to set various bits on an instruction without having to create temporary
  81  * variable and assign the emitted instruction to those.
  82  */
  83 #define brw_last_inst (&p->store[p->nr_insn - 1])
  84
  85 struct brw_codegen {
  86    brw_inst *store;
  87    int store_size;
  88    unsigned nr_insn;
  89    unsigned int next_insn_offset;
  90
  91    void *mem_ctx;
  92
  93    /* Allow clients to push/pop instruction state:
  94     */
  95    struct brw_insn_state stack[BRW_EU_MAX_INSN_STACK];
  96    struct brw_insn_state *current;
  97
  98    /** Whether or not the user wants automatic exec sizes
  99     *
 100     * If true, codegen will try to automatically infer the exec size of an
 101     * instruction from the width of the destination register.  If false, it
 102     * will take whatever is set by brw_set_default_exec_size verbatim.
 103     *
 104     * This is set to true by default in brw_init_codegen.
 105     */
 106    bool automatic_exec_sizes;
 107
 108    bool single_program_flow;
 109    const struct gen_device_info *devinfo;
 110
 111    /* Control flow stacks:
 112     * - if_stack contains IF and ELSE instructions which must be patched
 113     *   (and popped) once the matching ENDIF instruction is encountered.
 114     *
 115     *   Just store the instruction pointer(an index).
 116     */
 117    int *if_stack;
 118    int if_stack_depth;
 119    int if_stack_array_size;
 120
 121    /**
 122     * loop_stack contains the instruction pointers of the starts of loops which
 123     * must be patched (and popped) once the matching WHILE instruction is
 124     * encountered.
 125     */
 126    int *loop_stack;
 127    /**
 128     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
 129     * blocks they were popping out of, to fix up the mask stack.  This tracks
 130     * the IF/ENDIF nesting in each current nested loop level.
 131     */
 132    int *if_depth_in_loop;
 133    int loop_stack_depth;
 134    int loop_stack_array_size;
 135 };
 136
 137 void brw_pop_insn_state( struct brw_codegen *p );
 138 void brw_push_insn_state( struct brw_codegen *p );
 139 unsigned brw_get_default_exec_size(struct brw_codegen *p);
 140 unsigned brw_get_default_group(struct brw_codegen *p);
 141 unsigned brw_get_default_access_mode(struct brw_codegen *p);
 142 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 143 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 144 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 145 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 146 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 147                               brw_inst *inst, bool on);
 148 void brw_set_default_compression(struct brw_codegen *p, bool on);
 149 void brw_inst_set_group(const struct gen_device_info *devinfo,
 150                         brw_inst *inst, unsigned group);
 151 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 152 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 153 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 154 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 155 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 156 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 157
 158 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 159                       void *mem_ctx);
 160 int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
 161                          const struct brw_inst *inst, bool is_compacted);
 162 void brw_disassemble(const struct gen_device_info *devinfo,
 163                      const void *assembly, int start, int end, FILE *out);
 164 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 165
 166 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 167 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 168 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 169
 170 void gen6_resolve_implied_move(struct brw_codegen *p,
 171                                struct brw_reg *src,
 172                                unsigned msg_reg_nr);
 173
 174 /* Helpers for regular instructions:
 175  */
 176 #define ALU1(OP)                                \
 177 brw_inst *brw_##OP(struct brw_codegen *p,       \
 178               struct brw_reg dest,              \
 179               struct brw_reg src0);
 180
 181 #define ALU2(OP)                                \
 182 brw_inst *brw_##OP(struct brw_codegen *p,       \
 183               struct brw_reg dest,              \
 184               struct brw_reg src0,              \
 185               struct brw_reg src1);
 186
 187 #define ALU3(OP)                                \
 188 brw_inst *brw_##OP(struct brw_codegen *p,       \
 189               struct brw_reg dest,              \
 190               struct brw_reg src0,              \
 191               struct brw_reg src1,              \
 192               struct brw_reg src2);
 193
 194 #define ROUND(OP) \
 195 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 196
 197 ALU1(MOV)
 198 ALU2(SEL)
 199 ALU1(NOT)
 200 ALU2(AND)
 201 ALU2(OR)
 202 ALU2(XOR)
 203 ALU2(SHR)
 204 ALU2(SHL)
 205 ALU1(DIM)
 206 ALU2(ASR)
 207 ALU3(CSEL)
 208 ALU1(F32TO16)
 209 ALU1(F16TO32)
 210 ALU2(ADD)
 211 ALU2(AVG)
 212 ALU2(MUL)
 213 ALU1(FRC)
 214 ALU1(RNDD)
 215 ALU2(MAC)
 216 ALU2(MACH)
 217 ALU1(LZD)
 218 ALU2(DP4)
 219 ALU2(DPH)
 220 ALU2(DP3)
 221 ALU2(DP2)
 222 ALU2(LINE)
 223 ALU2(PLN)
 224 ALU3(MAD)
 225 ALU3(LRP)
 226 ALU1(BFREV)
 227 ALU3(BFE)
 228 ALU2(BFI1)
 229 ALU3(BFI2)
 230 ALU1(FBH)
 231 ALU1(FBL)
 232 ALU1(CBIT)
 233 ALU2(ADDC)
 234 ALU2(SUBB)
 235 ALU2(MAC)
 236
 237 ROUND(RNDZ)
 238 ROUND(RNDE)
 239
 240 #undef ALU1
 241 #undef ALU2
 242 #undef ALU3
 243 #undef ROUND
 244
 245
 246 /* Helpers for SEND instruction:
 247  */
 248 void brw_set_sampler_message(struct brw_codegen *p,
 249                              brw_inst *insn,
 250                              unsigned binding_table_index,
 251                              unsigned sampler,
 252                              unsigned msg_type,
 253                              unsigned response_length,
 254                              unsigned msg_length,
 255                              unsigned header_present,
 256                              unsigned simd_mode,
 257                              unsigned return_format);
 258
 259 void brw_set_message_descriptor(struct brw_codegen *p,
 260                                 brw_inst *inst,
 261                                 enum brw_message_target sfid,
 262                                 unsigned msg_length,
 263                                 unsigned response_length,
 264                                 bool header_present,
 265                                 bool end_of_thread);
 266
 267 void brw_set_dp_read_message(struct brw_codegen *p,
 268                              brw_inst *insn,
 269                              unsigned binding_table_index,
 270                              unsigned msg_control,
 271                              unsigned msg_type,
 272                              unsigned target_cache,
 273                              unsigned msg_length,
 274                              bool header_present,
 275                              unsigned response_length);
 276
 277 void brw_set_dp_write_message(struct brw_codegen *p,
 278                               brw_inst *insn,
 279                               unsigned binding_table_index,
 280                               unsigned msg_control,
 281                               unsigned msg_type,
 282                               unsigned target_cache,
 283                               unsigned msg_length,
 284                               bool header_present,
 285                               unsigned last_render_target,
 286                               unsigned response_length,
 287                               unsigned end_of_thread,
 288                               unsigned send_commit_msg);
 289
 290 void brw_urb_WRITE(struct brw_codegen *p,
 291                    struct brw_reg dest,
 292                    unsigned msg_reg_nr,
 293                    struct brw_reg src0,
 294                    enum brw_urb_write_flags flags,
 295                    unsigned msg_length,
 296                    unsigned response_length,
 297                    unsigned offset,
 298                    unsigned swizzle);
 299
 300 /**
 301  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 302  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 303  * address register using an OR instruction.  The returned instruction can be
 304  * passed as argument to the usual brw_set_*_message() functions in order to
 305  * specify any additional descriptor bits -- If \p desc is an immediate this
 306  * will be the SEND instruction itself, otherwise it will be the OR
 307  * instruction.
 308  */
 309 struct brw_inst *
 310 brw_send_indirect_message(struct brw_codegen *p,
 311                           unsigned sfid,
 312                           struct brw_reg dst,
 313                           struct brw_reg payload,
 314                           struct brw_reg desc);
 315
 316 void brw_ff_sync(struct brw_codegen *p,
 317                    struct brw_reg dest,
 318                    unsigned msg_reg_nr,
 319                    struct brw_reg src0,
 320                    bool allocate,
 321                    unsigned response_length,
 322                    bool eot);
 323
 324 void brw_svb_write(struct brw_codegen *p,
 325                    struct brw_reg dest,
 326                    unsigned msg_reg_nr,
 327                    struct brw_reg src0,
 328                    unsigned binding_table_index,
 329                    bool   send_commit_msg);
 330
 331 brw_inst *brw_fb_WRITE(struct brw_codegen *p,
 332                        struct brw_reg payload,
 333                        struct brw_reg implied_header,
 334                        unsigned msg_control,
 335                        unsigned binding_table_index,
 336                        unsigned msg_length,
 337                        unsigned response_length,
 338                        bool eot,
 339                        bool last_render_target,
 340                        bool header_present);
 341
 342 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 343                        struct brw_reg dst,
 344                        struct brw_reg payload,
 345                        unsigned binding_table_index,
 346                        unsigned msg_length,
 347                        unsigned response_length,
 348                        bool per_sample);
 349
 350 void brw_SAMPLE(struct brw_codegen *p,
 351                 struct brw_reg dest,
 352                 unsigned msg_reg_nr,
 353                 struct brw_reg src0,
 354                 unsigned binding_table_index,
 355                 unsigned sampler,
 356                 unsigned msg_type,
 357                 unsigned response_length,
 358                 unsigned msg_length,
 359                 unsigned header_present,
 360                 unsigned simd_mode,
 361                 unsigned return_format);
 362
 363 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 364                                       struct brw_reg header,
 365                                       struct brw_reg sampler_index);
 366
 367 void gen4_math(struct brw_codegen *p,
 368                struct brw_reg dest,
 369                unsigned function,
 370                unsigned msg_reg_nr,
 371                struct brw_reg src,
 372                unsigned precision );
 373
 374 void gen6_math(struct brw_codegen *p,
 375                struct brw_reg dest,
 376                unsigned function,
 377                struct brw_reg src0,
 378                struct brw_reg src1);
 379
 380 void brw_oword_block_read(struct brw_codegen *p,
 381                           struct brw_reg dest,
 382                           struct brw_reg mrf,
 383                           uint32_t offset,
 384                           uint32_t bind_table_index);
 385
 386 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 387
 388 void brw_oword_block_read_scratch(struct brw_codegen *p,
 389                                   struct brw_reg dest,
 390                                   struct brw_reg mrf,
 391                                   int num_regs,
 392                                   unsigned offset);
 393
 394 void brw_oword_block_write_scratch(struct brw_codegen *p,
 395                                    struct brw_reg mrf,
 396                                    int num_regs,
 397                                    unsigned offset);
 398
 399 void gen7_block_read_scratch(struct brw_codegen *p,
 400                              struct brw_reg dest,
 401                              int num_regs,
 402                              unsigned offset);
 403
 404 void brw_shader_time_add(struct brw_codegen *p,
 405                          struct brw_reg payload,
 406                          uint32_t surf_index);
 407
 408 /**
 409  * Return the generation-specific jump distance scaling factor.
 410  *
 411  * Given the number of instructions to jump, we need to scale by
 412  * some number to obtain the actual jump distance to program in an
 413  * instruction.
 414  */
 415 static inline unsigned
 416 brw_jump_scale(const struct gen_device_info *devinfo)
 417 {
 418    /* Broadwell measures jump targets in bytes. */
 419    if (devinfo->gen >= 8)
 420       return 16;
 421
 422    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 423     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 424     */
 425    if (devinfo->gen >= 5)
 426       return 2;
 427
 428    /* Gen4 simply uses the number of 128-bit instructions. */
 429    return 1;
 430 }
 431
 432 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 433
 434 /* If/else/endif.  Works by manipulating the execution flags on each
 435  * channel.
 436  */
 437 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 438 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 439                   struct brw_reg src0, struct brw_reg src1);
 440
 441 void brw_ELSE(struct brw_codegen *p);
 442 void brw_ENDIF(struct brw_codegen *p);
 443
 444 /* DO/WHILE loops:
 445  */
 446 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 447
 448 brw_inst *brw_WHILE(struct brw_codegen *p);
 449
 450 brw_inst *brw_BREAK(struct brw_codegen *p);
 451 brw_inst *brw_CONT(struct brw_codegen *p);
 452 brw_inst *gen6_HALT(struct brw_codegen *p);
 453
 454 /* Forward jumps:
 455  */
 456 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 457
 458 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 459                    unsigned predicate_control);
 460
 461 void brw_NOP(struct brw_codegen *p);
 462
 463 void brw_WAIT(struct brw_codegen *p);
 464
 465 /* Special case: there is never a destination, execution size will be
 466  * taken from src0:
 467  */
 468 void brw_CMP(struct brw_codegen *p,
 469              struct brw_reg dest,
 470              unsigned conditional,
 471              struct brw_reg src0,
 472              struct brw_reg src1);
 473
 474 void
 475 brw_untyped_atomic(struct brw_codegen *p,
 476                    struct brw_reg dst,
 477                    struct brw_reg payload,
 478                    struct brw_reg surface,
 479                    unsigned atomic_op,
 480                    unsigned msg_length,
 481                    bool response_expected,
 482                    bool header_present);
 483
 484 void
 485 brw_untyped_surface_read(struct brw_codegen *p,
 486                          struct brw_reg dst,
 487                          struct brw_reg payload,
 488                          struct brw_reg surface,
 489                          unsigned msg_length,
 490                          unsigned num_channels);
 491
 492 void
 493 brw_untyped_surface_write(struct brw_codegen *p,
 494                           struct brw_reg payload,
 495                           struct brw_reg surface,
 496                           unsigned msg_length,
 497                           unsigned num_channels,
 498                           bool header_present);
 499
 500 void
 501 brw_typed_atomic(struct brw_codegen *p,
 502                  struct brw_reg dst,
 503                  struct brw_reg payload,
 504                  struct brw_reg surface,
 505                  unsigned atomic_op,
 506                  unsigned msg_length,
 507                  bool response_expected,
 508                  bool header_present);
 509
 510 void
 511 brw_typed_surface_read(struct brw_codegen *p,
 512                        struct brw_reg dst,
 513                        struct brw_reg payload,
 514                        struct brw_reg surface,
 515                        unsigned msg_length,
 516                        unsigned num_channels,
 517                        bool header_present);
 518
 519 void
 520 brw_typed_surface_write(struct brw_codegen *p,
 521                         struct brw_reg payload,
 522                         struct brw_reg surface,
 523                         unsigned msg_length,
 524                         unsigned num_channels,
 525                         bool header_present);
 526
 527 void
 528 brw_byte_scattered_read(struct brw_codegen *p,
 529                         struct brw_reg dst,
 530                         struct brw_reg payload,
 531                         struct brw_reg surface,
 532                         unsigned msg_length,
 533                         unsigned bit_size);
 534
 535 void
 536 brw_byte_scattered_write(struct brw_codegen *p,
 537                          struct brw_reg payload,
 538                          struct brw_reg surface,
 539                          unsigned msg_length,
 540                          unsigned bit_size,
 541                          bool header_present);
 542
 543 void
 544 brw_memory_fence(struct brw_codegen *p,
 545                  struct brw_reg dst,
 546                  enum opcode send_op);
 547
 548 void
 549 brw_pixel_interpolator_query(struct brw_codegen *p,
 550                              struct brw_reg dest,
 551                              struct brw_reg mrf,
 552                              bool noperspective,
 553                              unsigned mode,
 554                              struct brw_reg data,
 555                              unsigned msg_length,
 556                              unsigned response_length);
 557
 558 void
 559 brw_find_live_channel(struct brw_codegen *p,
 560                       struct brw_reg dst,
 561                       struct brw_reg mask);
 562
 563 void
 564 brw_broadcast(struct brw_codegen *p,
 565               struct brw_reg dst,
 566               struct brw_reg src,
 567               struct brw_reg idx);
 568
 569 void
 570 brw_rounding_mode(struct brw_codegen *p,
 571                   enum brw_rnd_mode mode);
 572
 573 /***********************************************************************
 574  * brw_eu_util.c:
 575  */
 576
 577 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 578                                    struct brw_indirect dst_ptr,
 579                                    struct brw_indirect src_ptr,
 580                                    unsigned count);
 581
 582 void brw_copy_from_indirect(struct brw_codegen *p,
 583                             struct brw_reg dst,
 584                             struct brw_indirect ptr,
 585                             unsigned count);
 586
 587 void brw_copy4(struct brw_codegen *p,
 588                struct brw_reg dst,
 589                struct brw_reg src,
 590                unsigned count);
 591
 592 void brw_copy8(struct brw_codegen *p,
 593                struct brw_reg dst,
 594                struct brw_reg src,
 595                unsigned count);
 596
 597 void brw_math_invert( struct brw_codegen *p,
 598                       struct brw_reg dst,
 599                       struct brw_reg src);
 600
 601 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 602
 603 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 604
 605 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 606 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 607
 608 /* brw_eu_compact.c */
 609 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 610 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 611                               struct disasm_info *disasm);
 612 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 613                                brw_inst *dst, brw_compact_inst *src);
 614 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 615                                  brw_compact_inst *dst, const brw_inst *src);
 616
 617 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 618                                  brw_inst *orig, brw_inst *uncompacted);
 619
 620 /* brw_eu_validate.c */
 621 bool brw_validate_instructions(const struct gen_device_info *devinfo,
 622                                const void *assembly, int start_offset, int end_offset,
 623                                struct disasm_info *disasm);
 624
 625 static inline int
 626 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 627 {
 628    brw_inst *insn = (brw_inst *)((char *)store + offset);
 629
 630    if (brw_inst_cmpt_control(devinfo, insn))
 631       return offset + 8;
 632    else
 633       return offset + 16;
 634 }
 635
 636 struct opcode_desc {
 637    /* The union is an implementation detail used by brw_opcode_desc() to handle
 638     * opcodes that have been reused for different instructions across hardware
 639     * generations.
 640     *
 641     * The gens field acts as a tag. If it is non-zero, name points to a string
 642     * containing the instruction mnemonic. If it is zero, the table field is
 643     * valid and either points to a secondary opcode_desc table with 'size'
 644     * elements or is NULL and no such instruction exists for the opcode.
 645     */
 646    union {
 647       struct {
 648          char    *name;
 649          int      nsrc;
 650       };
 651       struct {
 652          const struct opcode_desc *table;
 653          unsigned size;
 654       };
 655    };
 656    int      ndst;
 657    int      gens;
 658 };
 659
 660 const struct opcode_desc *
 661 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 662
 663 static inline bool
 664 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 665 {
 666    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 667    return desc && desc->nsrc == 3;
 668 }
 669
 670 /** Maximum SEND message length */
 671 #define BRW_MAX_MSG_LENGTH 15
 672
 673 /** First MRF register used by pull loads */
 674 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 675
 676 /** First MRF register used by spills */
 677 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 678
 679 #ifdef __cplusplus
 680 }
 681 #endif
 682
 683 #endif