src/intel/compiler/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include <stdio.h>
  38 #include "brw_inst.h"
  39 #include "brw_eu_defines.h"
  40 #include "brw_reg.h"
  41 #include "brw_disasm_info.h"
  42
  43 #ifdef __cplusplus
  44 extern "C" {
  45 #endif
  46
  47 #define BRW_EU_MAX_INSN_STACK 5
  48
  49 struct brw_insn_state {
  50    /* One of BRW_EXECUTE_* */
  51    unsigned exec_size:3;
  52
  53    /* Group in units of channels */
  54    unsigned group:5;
  55
  56    /* Compression control on gen4-5 */
  57    bool compressed:1;
  58
  59    /* One of BRW_MASK_* */
  60    unsigned mask_control:1;
  61
  62    bool saturate:1;
  63
  64    /* One of BRW_ALIGN_* */
  65    unsigned access_mode:1;
  66
  67    /* One of BRW_PREDICATE_* */
  68    enum brw_predicate predicate:4;
  69
  70    bool pred_inv:1;
  71
  72    /* Flag subreg.  Bottom bit is subreg, top bit is reg */
  73    unsigned flag_subreg:2;
  74
  75    bool acc_wr_control:1;
  76 };
  77
  78
  79 /* A helper for accessing the last instruction emitted.  This makes it easy
  80  * to set various bits on an instruction without having to create temporary
  81  * variable and assign the emitted instruction to those.
  82  */
  83 #define brw_last_inst (&p->store[p->nr_insn - 1])
  84
  85 struct brw_codegen {
  86    brw_inst *store;
  87    int store_size;
  88    unsigned nr_insn;
  89    unsigned int next_insn_offset;
  90
  91    void *mem_ctx;
  92
  93    /* Allow clients to push/pop instruction state:
  94     */
  95    struct brw_insn_state stack[BRW_EU_MAX_INSN_STACK];
  96    struct brw_insn_state *current;
  97
  98    /** Whether or not the user wants automatic exec sizes
  99     *
 100     * If true, codegen will try to automatically infer the exec size of an
 101     * instruction from the width of the destination register.  If false, it
 102     * will take whatever is set by brw_set_default_exec_size verbatim.
 103     *
 104     * This is set to true by default in brw_init_codegen.
 105     */
 106    bool automatic_exec_sizes;
 107
 108    bool single_program_flow;
 109    const struct gen_device_info *devinfo;
 110
 111    /* Control flow stacks:
 112     * - if_stack contains IF and ELSE instructions which must be patched
 113     *   (and popped) once the matching ENDIF instruction is encountered.
 114     *
 115     *   Just store the instruction pointer(an index).
 116     */
 117    int *if_stack;
 118    int if_stack_depth;
 119    int if_stack_array_size;
 120
 121    /**
 122     * loop_stack contains the instruction pointers of the starts of loops which
 123     * must be patched (and popped) once the matching WHILE instruction is
 124     * encountered.
 125     */
 126    int *loop_stack;
 127    /**
 128     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
 129     * blocks they were popping out of, to fix up the mask stack.  This tracks
 130     * the IF/ENDIF nesting in each current nested loop level.
 131     */
 132    int *if_depth_in_loop;
 133    int loop_stack_depth;
 134    int loop_stack_array_size;
 135 };
 136
 137 void brw_pop_insn_state( struct brw_codegen *p );
 138 void brw_push_insn_state( struct brw_codegen *p );
 139 unsigned brw_get_default_exec_size(struct brw_codegen *p);
 140 unsigned brw_get_default_group(struct brw_codegen *p);
 141 unsigned brw_get_default_access_mode(struct brw_codegen *p);
 142 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 143 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 144 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 145 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 146 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 147                               brw_inst *inst, bool on);
 148 void brw_set_default_compression(struct brw_codegen *p, bool on);
 149 void brw_inst_set_group(const struct gen_device_info *devinfo,
 150                         brw_inst *inst, unsigned group);
 151 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 152 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 153 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 154 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 155 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 156 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 157
 158 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 159                       void *mem_ctx);
 160 int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
 161                          const struct brw_inst *inst, bool is_compacted);
 162 void brw_disassemble(const struct gen_device_info *devinfo,
 163                      const void *assembly, int start, int end, FILE *out);
 164 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 165
 166 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 167 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 168 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 169
 170 void gen6_resolve_implied_move(struct brw_codegen *p,
 171                                struct brw_reg *src,
 172                                unsigned msg_reg_nr);
 173
 174 /* Helpers for regular instructions:
 175  */
 176 #define ALU1(OP)                                \
 177 brw_inst *brw_##OP(struct brw_codegen *p,       \
 178               struct brw_reg dest,              \
 179               struct brw_reg src0);
 180
 181 #define ALU2(OP)                                \
 182 brw_inst *brw_##OP(struct brw_codegen *p,       \
 183               struct brw_reg dest,              \
 184               struct brw_reg src0,              \
 185               struct brw_reg src1);
 186
 187 #define ALU3(OP)                                \
 188 brw_inst *brw_##OP(struct brw_codegen *p,       \
 189               struct brw_reg dest,              \
 190               struct brw_reg src0,              \
 191               struct brw_reg src1,              \
 192               struct brw_reg src2);
 193
 194 #define ROUND(OP) \
 195 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 196
 197 ALU1(MOV)
 198 ALU2(SEL)
 199 ALU1(NOT)
 200 ALU2(AND)
 201 ALU2(OR)
 202 ALU2(XOR)
 203 ALU2(SHR)
 204 ALU2(SHL)
 205 ALU1(DIM)
 206 ALU2(ASR)
 207 ALU3(CSEL)
 208 ALU1(F32TO16)
 209 ALU1(F16TO32)
 210 ALU2(ADD)
 211 ALU2(AVG)
 212 ALU2(MUL)
 213 ALU1(FRC)
 214 ALU1(RNDD)
 215 ALU2(MAC)
 216 ALU2(MACH)
 217 ALU1(LZD)
 218 ALU2(DP4)
 219 ALU2(DPH)
 220 ALU2(DP3)
 221 ALU2(DP2)
 222 ALU2(LINE)
 223 ALU2(PLN)
 224 ALU3(MAD)
 225 ALU3(LRP)
 226 ALU1(BFREV)
 227 ALU3(BFE)
 228 ALU2(BFI1)
 229 ALU3(BFI2)
 230 ALU1(FBH)
 231 ALU1(FBL)
 232 ALU1(CBIT)
 233 ALU2(ADDC)
 234 ALU2(SUBB)
 235 ALU2(MAC)
 236
 237 ROUND(RNDZ)
 238 ROUND(RNDE)
 239
 240 #undef ALU1
 241 #undef ALU2
 242 #undef ALU3
 243 #undef ROUND
 244
 245
 246 /* Helpers for SEND instruction:
 247  */
 248 void brw_set_sampler_message(struct brw_codegen *p,
 249                              brw_inst *insn,
 250                              unsigned binding_table_index,
 251                              unsigned sampler,
 252                              unsigned msg_type,
 253                              unsigned response_length,
 254                              unsigned msg_length,
 255                              unsigned header_present,
 256                              unsigned simd_mode,
 257                              unsigned return_format);
 258
 259 void brw_set_dp_read_message(struct brw_codegen *p,
 260                              brw_inst *insn,
 261                              unsigned binding_table_index,
 262                              unsigned msg_control,
 263                              unsigned msg_type,
 264                              unsigned target_cache,
 265                              unsigned msg_length,
 266                              bool header_present,
 267                              unsigned response_length);
 268
 269 void brw_set_dp_write_message(struct brw_codegen *p,
 270                               brw_inst *insn,
 271                               unsigned binding_table_index,
 272                               unsigned msg_control,
 273                               unsigned msg_type,
 274                               unsigned target_cache,
 275                               unsigned msg_length,
 276                               bool header_present,
 277                               unsigned last_render_target,
 278                               unsigned response_length,
 279                               unsigned end_of_thread,
 280                               unsigned send_commit_msg);
 281
 282 /**
 283  * Construct a message descriptor immediate with the specified common
 284  * descriptor controls.
 285  */
 286 static inline uint32_t
 287 brw_message_desc(const struct gen_device_info *devinfo,
 288                  unsigned msg_length,
 289                  unsigned response_length,
 290                  bool header_present)
 291 {
 292    if (devinfo->gen >= 5) {
 293       return (SET_BITS(msg_length, 28, 25) |
 294               SET_BITS(response_length, 24, 20) |
 295               SET_BITS(header_present, 19, 19));
 296    } else {
 297       return (SET_BITS(msg_length, 23, 20) |
 298               SET_BITS(response_length, 19, 16));
 299    }
 300 }
 301
 302
 303 void brw_urb_WRITE(struct brw_codegen *p,
 304                    struct brw_reg dest,
 305                    unsigned msg_reg_nr,
 306                    struct brw_reg src0,
 307                    enum brw_urb_write_flags flags,
 308                    unsigned msg_length,
 309                    unsigned response_length,
 310                    unsigned offset,
 311                    unsigned swizzle);
 312
 313 /**
 314  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 315  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 316  * address register using an OR instruction.  The returned instruction can be
 317  * passed as argument to the usual brw_set_*_message() functions in order to
 318  * specify any additional descriptor bits -- If \p desc is an immediate this
 319  * will be the SEND instruction itself, otherwise it will be the OR
 320  * instruction.
 321  */
 322 struct brw_inst *
 323 brw_send_indirect_message(struct brw_codegen *p,
 324                           unsigned sfid,
 325                           struct brw_reg dst,
 326                           struct brw_reg payload,
 327                           struct brw_reg desc,
 328                           unsigned desc_imm);
 329
 330 void brw_ff_sync(struct brw_codegen *p,
 331                    struct brw_reg dest,
 332                    unsigned msg_reg_nr,
 333                    struct brw_reg src0,
 334                    bool allocate,
 335                    unsigned response_length,
 336                    bool eot);
 337
 338 void brw_svb_write(struct brw_codegen *p,
 339                    struct brw_reg dest,
 340                    unsigned msg_reg_nr,
 341                    struct brw_reg src0,
 342                    unsigned binding_table_index,
 343                    bool   send_commit_msg);
 344
 345 brw_inst *brw_fb_WRITE(struct brw_codegen *p,
 346                        struct brw_reg payload,
 347                        struct brw_reg implied_header,
 348                        unsigned msg_control,
 349                        unsigned binding_table_index,
 350                        unsigned msg_length,
 351                        unsigned response_length,
 352                        bool eot,
 353                        bool last_render_target,
 354                        bool header_present);
 355
 356 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 357                        struct brw_reg dst,
 358                        struct brw_reg payload,
 359                        unsigned binding_table_index,
 360                        unsigned msg_length,
 361                        unsigned response_length,
 362                        bool per_sample);
 363
 364 void brw_SAMPLE(struct brw_codegen *p,
 365                 struct brw_reg dest,
 366                 unsigned msg_reg_nr,
 367                 struct brw_reg src0,
 368                 unsigned binding_table_index,
 369                 unsigned sampler,
 370                 unsigned msg_type,
 371                 unsigned response_length,
 372                 unsigned msg_length,
 373                 unsigned header_present,
 374                 unsigned simd_mode,
 375                 unsigned return_format);
 376
 377 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 378                                       struct brw_reg header,
 379                                       struct brw_reg sampler_index);
 380
 381 void gen4_math(struct brw_codegen *p,
 382                struct brw_reg dest,
 383                unsigned function,
 384                unsigned msg_reg_nr,
 385                struct brw_reg src,
 386                unsigned precision );
 387
 388 void gen6_math(struct brw_codegen *p,
 389                struct brw_reg dest,
 390                unsigned function,
 391                struct brw_reg src0,
 392                struct brw_reg src1);
 393
 394 void brw_oword_block_read(struct brw_codegen *p,
 395                           struct brw_reg dest,
 396                           struct brw_reg mrf,
 397                           uint32_t offset,
 398                           uint32_t bind_table_index);
 399
 400 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 401
 402 void brw_oword_block_read_scratch(struct brw_codegen *p,
 403                                   struct brw_reg dest,
 404                                   struct brw_reg mrf,
 405                                   int num_regs,
 406                                   unsigned offset);
 407
 408 void brw_oword_block_write_scratch(struct brw_codegen *p,
 409                                    struct brw_reg mrf,
 410                                    int num_regs,
 411                                    unsigned offset);
 412
 413 void gen7_block_read_scratch(struct brw_codegen *p,
 414                              struct brw_reg dest,
 415                              int num_regs,
 416                              unsigned offset);
 417
 418 void brw_shader_time_add(struct brw_codegen *p,
 419                          struct brw_reg payload,
 420                          uint32_t surf_index);
 421
 422 /**
 423  * Return the generation-specific jump distance scaling factor.
 424  *
 425  * Given the number of instructions to jump, we need to scale by
 426  * some number to obtain the actual jump distance to program in an
 427  * instruction.
 428  */
 429 static inline unsigned
 430 brw_jump_scale(const struct gen_device_info *devinfo)
 431 {
 432    /* Broadwell measures jump targets in bytes. */
 433    if (devinfo->gen >= 8)
 434       return 16;
 435
 436    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 437     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 438     */
 439    if (devinfo->gen >= 5)
 440       return 2;
 441
 442    /* Gen4 simply uses the number of 128-bit instructions. */
 443    return 1;
 444 }
 445
 446 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 447
 448 /* If/else/endif.  Works by manipulating the execution flags on each
 449  * channel.
 450  */
 451 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 452 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 453                   struct brw_reg src0, struct brw_reg src1);
 454
 455 void brw_ELSE(struct brw_codegen *p);
 456 void brw_ENDIF(struct brw_codegen *p);
 457
 458 /* DO/WHILE loops:
 459  */
 460 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 461
 462 brw_inst *brw_WHILE(struct brw_codegen *p);
 463
 464 brw_inst *brw_BREAK(struct brw_codegen *p);
 465 brw_inst *brw_CONT(struct brw_codegen *p);
 466 brw_inst *gen6_HALT(struct brw_codegen *p);
 467
 468 /* Forward jumps:
 469  */
 470 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 471
 472 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 473                    unsigned predicate_control);
 474
 475 void brw_NOP(struct brw_codegen *p);
 476
 477 void brw_WAIT(struct brw_codegen *p);
 478
 479 /* Special case: there is never a destination, execution size will be
 480  * taken from src0:
 481  */
 482 void brw_CMP(struct brw_codegen *p,
 483              struct brw_reg dest,
 484              unsigned conditional,
 485              struct brw_reg src0,
 486              struct brw_reg src1);
 487
 488 void
 489 brw_untyped_atomic(struct brw_codegen *p,
 490                    struct brw_reg dst,
 491                    struct brw_reg payload,
 492                    struct brw_reg surface,
 493                    unsigned atomic_op,
 494                    unsigned msg_length,
 495                    bool response_expected,
 496                    bool header_present);
 497
 498 void
 499 brw_untyped_surface_read(struct brw_codegen *p,
 500                          struct brw_reg dst,
 501                          struct brw_reg payload,
 502                          struct brw_reg surface,
 503                          unsigned msg_length,
 504                          unsigned num_channels);
 505
 506 void
 507 brw_untyped_surface_write(struct brw_codegen *p,
 508                           struct brw_reg payload,
 509                           struct brw_reg surface,
 510                           unsigned msg_length,
 511                           unsigned num_channels,
 512                           bool header_present);
 513
 514 void
 515 brw_typed_atomic(struct brw_codegen *p,
 516                  struct brw_reg dst,
 517                  struct brw_reg payload,
 518                  struct brw_reg surface,
 519                  unsigned atomic_op,
 520                  unsigned msg_length,
 521                  bool response_expected,
 522                  bool header_present);
 523
 524 void
 525 brw_typed_surface_read(struct brw_codegen *p,
 526                        struct brw_reg dst,
 527                        struct brw_reg payload,
 528                        struct brw_reg surface,
 529                        unsigned msg_length,
 530                        unsigned num_channels,
 531                        bool header_present);
 532
 533 void
 534 brw_typed_surface_write(struct brw_codegen *p,
 535                         struct brw_reg payload,
 536                         struct brw_reg surface,
 537                         unsigned msg_length,
 538                         unsigned num_channels,
 539                         bool header_present);
 540
 541 void
 542 brw_byte_scattered_read(struct brw_codegen *p,
 543                         struct brw_reg dst,
 544                         struct brw_reg payload,
 545                         struct brw_reg surface,
 546                         unsigned msg_length,
 547                         unsigned bit_size);
 548
 549 void
 550 brw_byte_scattered_write(struct brw_codegen *p,
 551                          struct brw_reg payload,
 552                          struct brw_reg surface,
 553                          unsigned msg_length,
 554                          unsigned bit_size,
 555                          bool header_present);
 556
 557 void
 558 brw_memory_fence(struct brw_codegen *p,
 559                  struct brw_reg dst,
 560                  enum opcode send_op);
 561
 562 void
 563 brw_pixel_interpolator_query(struct brw_codegen *p,
 564                              struct brw_reg dest,
 565                              struct brw_reg mrf,
 566                              bool noperspective,
 567                              unsigned mode,
 568                              struct brw_reg data,
 569                              unsigned msg_length,
 570                              unsigned response_length);
 571
 572 void
 573 brw_find_live_channel(struct brw_codegen *p,
 574                       struct brw_reg dst,
 575                       struct brw_reg mask);
 576
 577 void
 578 brw_broadcast(struct brw_codegen *p,
 579               struct brw_reg dst,
 580               struct brw_reg src,
 581               struct brw_reg idx);
 582
 583 void
 584 brw_rounding_mode(struct brw_codegen *p,
 585                   enum brw_rnd_mode mode);
 586
 587 /***********************************************************************
 588  * brw_eu_util.c:
 589  */
 590
 591 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 592                                    struct brw_indirect dst_ptr,
 593                                    struct brw_indirect src_ptr,
 594                                    unsigned count);
 595
 596 void brw_copy_from_indirect(struct brw_codegen *p,
 597                             struct brw_reg dst,
 598                             struct brw_indirect ptr,
 599                             unsigned count);
 600
 601 void brw_copy4(struct brw_codegen *p,
 602                struct brw_reg dst,
 603                struct brw_reg src,
 604                unsigned count);
 605
 606 void brw_copy8(struct brw_codegen *p,
 607                struct brw_reg dst,
 608                struct brw_reg src,
 609                unsigned count);
 610
 611 void brw_math_invert( struct brw_codegen *p,
 612                       struct brw_reg dst,
 613                       struct brw_reg src);
 614
 615 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 616
 617 void brw_set_desc_ex(struct brw_codegen *p, brw_inst *insn,
 618                      unsigned desc, unsigned ex_desc);
 619
 620 static inline void
 621 brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc)
 622 {
 623    brw_set_desc_ex(p, insn, desc, 0);
 624 }
 625
 626 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 627
 628 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 629 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 630
 631 /* brw_eu_compact.c */
 632 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 633 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 634                               struct disasm_info *disasm);
 635 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 636                                brw_inst *dst, brw_compact_inst *src);
 637 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 638                                  brw_compact_inst *dst, const brw_inst *src);
 639
 640 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 641                                  brw_inst *orig, brw_inst *uncompacted);
 642
 643 /* brw_eu_validate.c */
 644 bool brw_validate_instructions(const struct gen_device_info *devinfo,
 645                                const void *assembly, int start_offset, int end_offset,
 646                                struct disasm_info *disasm);
 647
 648 static inline int
 649 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 650 {
 651    brw_inst *insn = (brw_inst *)((char *)store + offset);
 652
 653    if (brw_inst_cmpt_control(devinfo, insn))
 654       return offset + 8;
 655    else
 656       return offset + 16;
 657 }
 658
 659 struct opcode_desc {
 660    /* The union is an implementation detail used by brw_opcode_desc() to handle
 661     * opcodes that have been reused for different instructions across hardware
 662     * generations.
 663     *
 664     * The gens field acts as a tag. If it is non-zero, name points to a string
 665     * containing the instruction mnemonic. If it is zero, the table field is
 666     * valid and either points to a secondary opcode_desc table with 'size'
 667     * elements or is NULL and no such instruction exists for the opcode.
 668     */
 669    union {
 670       struct {
 671          char    *name;
 672          int      nsrc;
 673       };
 674       struct {
 675          const struct opcode_desc *table;
 676          unsigned size;
 677       };
 678    };
 679    int      ndst;
 680    int      gens;
 681 };
 682
 683 const struct opcode_desc *
 684 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 685
 686 static inline bool
 687 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 688 {
 689    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 690    return desc && desc->nsrc == 3;
 691 }
 692
 693 /** Maximum SEND message length */
 694 #define BRW_MAX_MSG_LENGTH 15
 695
 696 /** First MRF register used by pull loads */
 697 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 698
 699 /** First MRF register used by spills */
 700 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 701
 702 #ifdef __cplusplus
 703 }
 704 #endif
 705
 706 #endif