2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
31 #include "brw_shader.h"
32 #include "brw_ir_fs.h"
33 #include "brw_fs_builder.h"
34 #include "compiler/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(const fs_reg
®
, const brw::fs_builder
&bld
, unsigned delta
)
50 return offset(reg
, bld
.dispatch_width(), delta
);
53 #define UBO_START ((1 << 16) - 4)
56 const char *scheduler_mode
;
57 unsigned promoted_constants
;
61 * The fragment shader front-end.
63 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
65 class fs_visitor
: public backend_shader
68 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
70 const brw_base_prog_key
*key
,
71 struct brw_stage_prog_data
*prog_data
,
72 const nir_shader
*shader
,
73 unsigned dispatch_width
,
74 int shader_time_index
,
75 const struct brw_vue_map
*input_vue_map
= NULL
);
76 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
78 struct brw_gs_compile
*gs_compile
,
79 struct brw_gs_prog_data
*prog_data
,
80 const nir_shader
*shader
,
81 int shader_time_index
);
85 fs_reg
vgrf(const glsl_type
*const type
);
86 void import_uniforms(fs_visitor
*v
);
88 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
90 const fs_reg
&surf_index
,
91 const fs_reg
&varying_offset
,
92 uint32_t const_offset
);
93 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
95 bool run_fs(bool allow_spilling
, bool do_rep_send
);
100 bool run_cs(unsigned min_dispatch_width
);
102 void allocate_registers(unsigned min_dispatch_width
, bool allow_spilling
);
103 void setup_fs_payload_gen4();
104 void setup_fs_payload_gen6();
105 void setup_vs_payload();
106 void setup_gs_payload();
107 void setup_cs_payload();
108 bool fixup_sends_duplicate_payload();
109 void fixup_3src_null_dest();
110 void assign_curb_setup();
111 void assign_urb_setup();
112 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
113 void assign_vs_urb_setup();
114 void assign_tcs_urb_setup();
115 void assign_tes_urb_setup();
116 void assign_gs_urb_setup();
117 bool assign_regs(bool allow_spilling
, bool spill_all
);
118 void assign_regs_trivial();
119 void calculate_payload_ranges(int payload_node_count
,
120 int *payload_last_use_ip
);
121 void split_virtual_grfs();
122 bool compact_virtual_grfs();
123 void assign_constant_locations();
124 bool get_pull_locs(const fs_reg
&src
, unsigned *out_surf_index
,
125 unsigned *out_pull_index
);
126 void lower_constant_loads();
127 void invalidate_live_intervals();
128 void calculate_live_intervals();
129 void calculate_register_pressure();
131 bool opt_algebraic();
132 bool opt_redundant_discard_jumps();
134 bool opt_cse_local(bblock_t
*block
, int &ip
);
135 bool opt_copy_propagation();
136 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
137 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
138 bool opt_copy_propagation_local(void *mem_ctx
, bblock_t
*block
,
140 bool opt_drop_redundant_mov_to_flags();
141 bool opt_register_renaming();
142 bool opt_bank_conflicts();
143 unsigned bank_conflict_cycles(const fs_inst
*inst
) const;
144 bool register_coalesce();
145 bool compute_to_mrf();
146 bool eliminate_find_live_channel();
147 bool dead_code_eliminate();
148 bool remove_duplicate_mrf_writes();
149 bool remove_extra_rounding_modes();
151 bool opt_sampler_eot();
152 bool virtual_grf_interferes(int a
, int b
);
153 void schedule_instructions(instruction_scheduler_mode mode
);
154 void insert_gen4_send_dependency_workarounds();
155 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
157 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
159 void vfail(const char *msg
, va_list args
);
160 void fail(const char *msg
, ...);
161 void limit_dispatch_width(unsigned n
, const char *msg
);
162 void lower_uniform_pull_constant_loads();
163 bool lower_load_payload();
165 bool lower_regioning();
166 bool lower_logical_sends();
167 bool lower_integer_multiplication();
169 bool lower_simd_width();
170 bool lower_scoreboard();
171 bool opt_combine_constants();
173 void emit_dummy_fs();
174 void emit_repclear_shader();
175 void emit_fragcoord_interpolation(fs_reg wpos
);
176 fs_reg
*emit_frontfacing_interpolation();
177 fs_reg
*emit_samplepos_setup();
178 fs_reg
*emit_sampleid_setup();
179 fs_reg
*emit_samplemaskin_setup();
180 void emit_interpolation_setup_gen4();
181 void emit_interpolation_setup_gen6();
182 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
183 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
184 const fs_reg
&texture
,
185 const fs_reg
&texture_handle
);
186 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
187 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
188 void emit_discard_jump();
189 void emit_fsign(const class brw::fs_builder
&, const nir_alu_instr
*instr
,
190 fs_reg result
, fs_reg
*op
, unsigned fsign_src
);
191 void emit_shader_float_controls_execution_mode();
192 bool opt_peephole_sel();
193 bool opt_peephole_predicated_break();
194 bool opt_saturate_propagation();
195 bool opt_cmod_propagation();
196 bool opt_zero_samples();
198 void set_tcs_invocation_id();
200 void emit_nir_code();
201 void nir_setup_outputs();
202 void nir_setup_uniforms();
203 void nir_emit_system_values();
204 void nir_emit_impl(nir_function_impl
*impl
);
205 void nir_emit_cf_list(exec_list
*list
);
206 void nir_emit_if(nir_if
*if_stmt
);
207 void nir_emit_loop(nir_loop
*loop
);
208 void nir_emit_block(nir_block
*block
);
209 void nir_emit_instr(nir_instr
*instr
);
210 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
,
212 bool try_emit_b2fi_of_inot(const brw::fs_builder
&bld
, fs_reg result
,
213 nir_alu_instr
*instr
);
214 void nir_emit_load_const(const brw::fs_builder
&bld
,
215 nir_load_const_instr
*instr
);
216 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
217 nir_intrinsic_instr
*instr
);
218 void nir_emit_tcs_intrinsic(const brw::fs_builder
&bld
,
219 nir_intrinsic_instr
*instr
);
220 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
221 nir_intrinsic_instr
*instr
);
222 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
223 nir_intrinsic_instr
*instr
);
224 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
225 nir_intrinsic_instr
*instr
);
226 fs_reg
get_nir_image_intrinsic_image(const brw::fs_builder
&bld
,
227 nir_intrinsic_instr
*instr
);
228 fs_reg
get_nir_ssbo_intrinsic_index(const brw::fs_builder
&bld
,
229 nir_intrinsic_instr
*instr
);
230 fs_reg
swizzle_nir_scratch_addr(const brw::fs_builder
&bld
,
233 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
234 nir_intrinsic_instr
*instr
);
235 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
236 nir_intrinsic_instr
*instr
);
237 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
238 int op
, nir_intrinsic_instr
*instr
);
239 void nir_emit_ssbo_atomic_float(const brw::fs_builder
&bld
,
240 int op
, nir_intrinsic_instr
*instr
);
241 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
242 int op
, nir_intrinsic_instr
*instr
);
243 void nir_emit_shared_atomic_float(const brw::fs_builder
&bld
,
244 int op
, nir_intrinsic_instr
*instr
);
245 void nir_emit_global_atomic(const brw::fs_builder
&bld
,
246 int op
, nir_intrinsic_instr
*instr
);
247 void nir_emit_global_atomic_float(const brw::fs_builder
&bld
,
248 int op
, nir_intrinsic_instr
*instr
);
249 void nir_emit_texture(const brw::fs_builder
&bld
,
250 nir_tex_instr
*instr
);
251 void nir_emit_jump(const brw::fs_builder
&bld
,
252 nir_jump_instr
*instr
);
253 fs_reg
get_nir_src(const nir_src
&src
);
254 fs_reg
get_nir_src_imm(const nir_src
&src
);
255 fs_reg
get_nir_dest(const nir_dest
&dest
);
256 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
257 fs_reg
get_tcs_single_patch_icp_handle(const brw::fs_builder
&bld
,
258 nir_intrinsic_instr
*instr
);
259 fs_reg
get_tcs_eight_patch_icp_handle(const brw::fs_builder
&bld
,
260 nir_intrinsic_instr
*instr
);
261 struct brw_reg
get_tcs_output_urb_handle();
263 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
266 bool optimize_extract_to_float(nir_alu_instr
*instr
,
267 const fs_reg
&result
);
268 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
269 const fs_reg
&result
);
271 void emit_alpha_test();
272 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
273 fs_reg color1
, fs_reg color2
,
274 fs_reg src0_alpha
, unsigned components
);
275 void emit_alpha_to_coverage_workaround(const fs_reg
&src0_alpha
);
276 void emit_fb_writes();
277 fs_inst
*emit_non_coherent_fb_read(const brw::fs_builder
&bld
,
278 const fs_reg
&dst
, unsigned target
);
279 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
280 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
282 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
283 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
284 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
286 void emit_gs_thread_end();
287 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
288 unsigned base_offset
, const nir_src
&offset_src
,
289 unsigned num_components
, unsigned first_component
);
290 void emit_cs_terminate();
291 fs_reg
*emit_cs_work_group_id_setup();
295 void emit_shader_time_begin();
296 void emit_shader_time_end();
297 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
298 int shader_time_subindex
,
301 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
303 fs_reg
interp_reg(int location
, int channel
);
305 virtual void dump_instructions();
306 virtual void dump_instructions(const char *name
);
307 void dump_instruction(backend_instruction
*inst
);
308 void dump_instruction(backend_instruction
*inst
, FILE *file
);
310 const brw_base_prog_key
*const key
;
311 const struct brw_sampler_prog_key_data
*key_tex
;
313 struct brw_gs_compile
*gs_compile
;
315 struct brw_stage_prog_data
*prog_data
;
317 const struct brw_vue_map
*input_vue_map
;
319 int *virtual_grf_start
;
320 int *virtual_grf_end
;
321 brw::fs_live_variables
*live_intervals
;
323 int *regs_live_at_ip
;
325 /** Number of uniform variable components visited. */
328 /** Byte-offset for the next available spot in the scratch space buffer. */
329 unsigned last_scratch
;
332 * Array mapping UNIFORM register numbers to the pull parameter index,
333 * or -1 if this uniform register isn't being uploaded as a pull constant.
335 int *pull_constant_loc
;
338 * Array mapping UNIFORM register numbers to the push parameter index,
339 * or -1 if this uniform register isn't being uploaded as a push constant.
341 int *push_constant_loc
;
348 fs_reg outputs
[VARYING_SLOT_MAX
];
349 fs_reg dual_src_output
;
350 int first_non_payload_grf
;
351 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
355 fs_reg
*nir_ssa_values
;
356 fs_reg
*nir_system_values
;
361 /** Register numbers for thread payload fields. */
362 struct thread_payload
{
363 uint8_t subspan_coord_reg
[2];
364 uint8_t source_depth_reg
[2];
365 uint8_t source_w_reg
[2];
366 uint8_t aa_dest_stencil_reg
[2];
367 uint8_t dest_depth_reg
[2];
368 uint8_t sample_pos_reg
[2];
369 uint8_t sample_mask_in_reg
[2];
370 uint8_t barycentric_coord_reg
[BRW_BARYCENTRIC_MODE_COUNT
][2];
371 uint8_t local_invocation_id_reg
[2];
373 /** The number of thread payload registers the hardware will supply. */
377 bool source_depth_to_render_target
;
378 bool runtime_check_aads_emit
;
384 fs_reg delta_xy
[BRW_BARYCENTRIC_MODE_COUNT
];
385 fs_reg shader_start_time
;
386 fs_reg final_gs_vertex_count
;
387 fs_reg control_data_bits
;
388 fs_reg invocation_id
;
391 bool spilled_any_registers
;
393 const unsigned dispatch_width
; /**< 8, 16 or 32 */
394 unsigned max_dispatch_width
;
396 int shader_time_index
;
398 struct shader_stats shader_stats
;
403 fs_reg
prepare_alu_destination_and_sources(const brw::fs_builder
&bld
,
404 nir_alu_instr
*instr
,
408 void resolve_inot_sources(const brw::fs_builder
&bld
, nir_alu_instr
*instr
,
410 void lower_mul_dword_inst(fs_inst
*inst
, bblock_t
*block
);
411 void lower_mul_qword_inst(fs_inst
*inst
, bblock_t
*block
);
412 void lower_mulh_inst(fs_inst
*inst
, bblock_t
*block
);
416 * The fragment shader code generator.
418 * Translates FS IR to actual i965 assembly code.
423 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
425 struct brw_stage_prog_data
*prog_data
,
426 struct shader_stats shader_stats
,
427 bool runtime_check_aads_emit
,
428 gl_shader_stage stage
);
431 void enable_debug(const char *shader_name
);
432 int generate_code(const cfg_t
*cfg
, int dispatch_width
,
433 struct brw_compile_stats
*stats
);
434 const unsigned *get_assembly();
437 void fire_fb_write(fs_inst
*inst
,
438 struct brw_reg payload
,
439 struct brw_reg implied_header
,
441 void generate_send(fs_inst
*inst
,
444 struct brw_reg ex_desc
,
445 struct brw_reg payload
,
446 struct brw_reg payload2
);
447 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
448 void generate_fb_read(fs_inst
*inst
, struct brw_reg dst
,
449 struct brw_reg payload
);
450 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
451 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
452 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
453 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
454 bool generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
455 struct brw_reg
*src
);
456 void generate_tex(fs_inst
*inst
, struct brw_reg dst
,
457 struct brw_reg surface_index
,
458 struct brw_reg sampler_index
);
459 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
461 struct brw_reg surf_index
);
462 void generate_ddx(const fs_inst
*inst
,
463 struct brw_reg dst
, struct brw_reg src
);
464 void generate_ddy(const fs_inst
*inst
,
465 struct brw_reg dst
, struct brw_reg src
);
466 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
467 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
468 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
469 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
470 struct brw_reg index
,
471 struct brw_reg offset
);
472 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
474 struct brw_reg surf_index
,
475 struct brw_reg payload
);
476 void generate_varying_pull_constant_load_gen4(fs_inst
*inst
,
478 struct brw_reg index
);
479 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
481 void generate_pixel_interpolator_query(fs_inst
*inst
,
484 struct brw_reg msg_data
,
487 void generate_set_sample_id(fs_inst
*inst
,
490 struct brw_reg src1
);
492 void generate_discard_jump(fs_inst
*inst
);
494 void generate_pack_half_2x16_split(fs_inst
*inst
,
499 void generate_shader_time_add(fs_inst
*inst
,
500 struct brw_reg payload
,
501 struct brw_reg offset
,
502 struct brw_reg value
);
504 void generate_mov_indirect(fs_inst
*inst
,
507 struct brw_reg indirect_byte_offset
);
509 void generate_shuffle(fs_inst
*inst
,
514 void generate_quad_swizzle(const fs_inst
*inst
,
515 struct brw_reg dst
, struct brw_reg src
,
518 bool patch_discard_jumps_to_fb_writes();
520 const struct brw_compiler
*compiler
;
521 void *log_data
; /* Passed to compiler->*_log functions */
523 const struct gen_device_info
*devinfo
;
525 struct brw_codegen
*p
;
526 struct brw_stage_prog_data
* const prog_data
;
528 unsigned dispatch_width
; /**< 8, 16 or 32 */
530 exec_list discard_halt_patches
;
531 struct shader_stats shader_stats
;
532 bool runtime_check_aads_emit
;
534 const char *shader_name
;
535 gl_shader_stage stage
;
541 fetch_payload_reg(const brw::fs_builder
&bld
, uint8_t regs
[2],
542 brw_reg_type type
= BRW_REGISTER_TYPE_F
, unsigned n
= 1)
547 if (bld
.dispatch_width() > 16) {
548 const fs_reg tmp
= bld
.vgrf(type
, n
);
549 const brw::fs_builder hbld
= bld
.exec_all().group(16, 0);
550 const unsigned m
= bld
.dispatch_width() / hbld
.dispatch_width();
551 fs_reg
*const components
= new fs_reg
[n
* m
];
553 for (unsigned c
= 0; c
< n
; c
++) {
554 for (unsigned g
= 0; g
< m
; g
++) {
555 components
[c
* m
+ g
] =
556 offset(retype(brw_vec8_grf(regs
[g
], 0), type
), hbld
, c
);
560 hbld
.LOAD_PAYLOAD(tmp
, components
, n
* m
, 0);
566 return fs_reg(retype(brw_vec8_grf(regs
[0], 0), type
));
571 lower_src_modifiers(fs_visitor
*v
, bblock_t
*block
, fs_inst
*inst
, unsigned i
);
574 void shuffle_from_32bit_read(const brw::fs_builder
&bld
,
577 uint32_t first_component
,
578 uint32_t components
);
580 fs_reg
setup_imm_df(const brw::fs_builder
&bld
,
583 fs_reg
setup_imm_b(const brw::fs_builder
&bld
,
586 fs_reg
setup_imm_ub(const brw::fs_builder
&bld
,
589 enum brw_barycentric_mode
brw_barycentric_mode(enum glsl_interp_mode mode
,
590 nir_intrinsic_op op
);
592 uint32_t brw_fb_write_msg_control(const fs_inst
*inst
,
593 const struct brw_wm_prog_data
*prog_data
);
596 #endif /* BRW_FS_H */