2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
31 #include "brw_shader.h"
32 #include "brw_ir_fs.h"
33 #include "brw_fs_builder.h"
34 #include "compiler/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(const fs_reg
®
, const brw::fs_builder
&bld
, unsigned delta
)
50 return offset(reg
, bld
.dispatch_width(), delta
);
53 #define UBO_START ((1 << 16) - 4)
56 * The fragment shader front-end.
58 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
60 class fs_visitor
: public backend_shader
63 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
66 struct brw_stage_prog_data
*prog_data
,
67 struct gl_program
*prog
,
68 const nir_shader
*shader
,
69 unsigned dispatch_width
,
70 int shader_time_index
,
71 const struct brw_vue_map
*input_vue_map
= NULL
);
72 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
74 struct brw_gs_compile
*gs_compile
,
75 struct brw_gs_prog_data
*prog_data
,
76 const nir_shader
*shader
,
77 int shader_time_index
);
81 fs_reg
vgrf(const glsl_type
*const type
);
82 void import_uniforms(fs_visitor
*v
);
83 void setup_uniform_clipplane_values();
84 void compute_clip_distance();
86 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
90 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
92 const fs_reg
&surf_index
,
93 const fs_reg
&varying_offset
,
94 uint32_t const_offset
);
95 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
97 bool run_fs(bool allow_spilling
, bool do_rep_send
);
99 bool run_tcs_single_patch();
102 bool run_cs(unsigned min_dispatch_width
);
104 void allocate_registers(unsigned min_dispatch_width
, bool allow_spilling
);
105 void setup_fs_payload_gen4();
106 void setup_fs_payload_gen6();
107 void setup_vs_payload();
108 void setup_gs_payload();
109 void setup_cs_payload();
110 void fixup_3src_null_dest();
111 void assign_curb_setup();
112 void calculate_urb_setup();
113 void assign_urb_setup();
114 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
115 void assign_vs_urb_setup();
116 void assign_tcs_single_patch_urb_setup();
117 void assign_tes_urb_setup();
118 void assign_gs_urb_setup();
119 bool assign_regs(bool allow_spilling
, bool spill_all
);
120 void assign_regs_trivial();
121 void calculate_payload_ranges(int payload_node_count
,
122 int *payload_last_use_ip
);
123 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
124 int first_payload_node
);
125 int choose_spill_reg(struct ra_graph
*g
);
126 void spill_reg(int spill_reg
);
127 void split_virtual_grfs();
128 bool compact_virtual_grfs();
129 void assign_constant_locations();
130 bool get_pull_locs(const fs_reg
&src
, unsigned *out_surf_index
,
131 unsigned *out_pull_index
);
132 void lower_constant_loads();
133 void invalidate_live_intervals();
134 void calculate_live_intervals();
135 void calculate_register_pressure();
137 bool opt_algebraic();
138 bool opt_redundant_discard_jumps();
140 bool opt_cse_local(bblock_t
*block
);
141 bool opt_copy_propagation();
142 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
143 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
144 bool opt_copy_propagation_local(void *mem_ctx
, bblock_t
*block
,
146 bool opt_drop_redundant_mov_to_flags();
147 bool opt_register_renaming();
148 bool opt_bank_conflicts();
149 unsigned bank_conflict_cycles(const fs_inst
*inst
) const;
150 bool register_coalesce();
151 bool compute_to_mrf();
152 bool eliminate_find_live_channel();
153 bool dead_code_eliminate();
154 bool remove_duplicate_mrf_writes();
155 bool remove_extra_rounding_modes();
157 bool opt_sampler_eot();
158 bool virtual_grf_interferes(int a
, int b
);
159 void schedule_instructions(instruction_scheduler_mode mode
);
160 void insert_gen4_send_dependency_workarounds();
161 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
163 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
165 void vfail(const char *msg
, va_list args
);
166 void fail(const char *msg
, ...);
167 void limit_dispatch_width(unsigned n
, const char *msg
);
168 void lower_uniform_pull_constant_loads();
169 bool lower_load_payload();
171 bool lower_conversions();
172 bool lower_logical_sends();
173 bool lower_integer_multiplication();
175 bool lower_simd_width();
176 bool opt_combine_constants();
178 void emit_dummy_fs();
179 void emit_repclear_shader();
180 void emit_fragcoord_interpolation(fs_reg wpos
);
181 fs_reg
*emit_frontfacing_interpolation();
182 fs_reg
*emit_samplepos_setup();
183 fs_reg
*emit_sampleid_setup();
184 fs_reg
*emit_samplemaskin_setup();
185 void emit_interpolation_setup_gen4();
186 void emit_interpolation_setup_gen6();
187 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
188 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
189 const fs_reg
&sampler
);
190 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
191 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
192 void emit_discard_jump();
193 bool opt_peephole_sel();
194 bool opt_peephole_csel();
195 bool opt_peephole_predicated_break();
196 bool opt_saturate_propagation();
197 bool opt_cmod_propagation();
198 bool opt_zero_samples();
200 void emit_nir_code();
201 void nir_setup_outputs();
202 void nir_setup_uniforms();
203 void nir_emit_system_values();
204 void nir_emit_impl(nir_function_impl
*impl
);
205 void nir_emit_cf_list(exec_list
*list
);
206 void nir_emit_if(nir_if
*if_stmt
);
207 void nir_emit_loop(nir_loop
*loop
);
208 void nir_emit_block(nir_block
*block
);
209 void nir_emit_instr(nir_instr
*instr
);
210 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
211 void nir_emit_load_const(const brw::fs_builder
&bld
,
212 nir_load_const_instr
*instr
);
213 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
214 nir_intrinsic_instr
*instr
);
215 void nir_emit_tcs_intrinsic(const brw::fs_builder
&bld
,
216 nir_intrinsic_instr
*instr
);
217 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
218 nir_intrinsic_instr
*instr
);
219 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
220 nir_intrinsic_instr
*instr
);
221 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
222 nir_intrinsic_instr
*instr
);
223 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
224 nir_intrinsic_instr
*instr
);
225 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
226 nir_intrinsic_instr
*instr
);
227 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
228 int op
, nir_intrinsic_instr
*instr
);
229 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
230 int op
, nir_intrinsic_instr
*instr
);
231 void nir_emit_texture(const brw::fs_builder
&bld
,
232 nir_tex_instr
*instr
);
233 void nir_emit_jump(const brw::fs_builder
&bld
,
234 nir_jump_instr
*instr
);
235 fs_reg
get_nir_src(const nir_src
&src
);
236 fs_reg
get_nir_src_imm(const nir_src
&src
);
237 fs_reg
get_nir_dest(const nir_dest
&dest
);
238 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
239 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
240 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
243 bool optimize_extract_to_float(nir_alu_instr
*instr
,
244 const fs_reg
&result
);
245 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
246 const fs_reg
&result
);
248 void emit_alpha_test();
249 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
250 fs_reg color1
, fs_reg color2
,
251 fs_reg src0_alpha
, unsigned components
);
252 void emit_fb_writes();
253 fs_inst
*emit_non_coherent_fb_read(const brw::fs_builder
&bld
,
254 const fs_reg
&dst
, unsigned target
);
255 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
256 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
258 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
259 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
260 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
262 void emit_gs_thread_end();
263 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
264 unsigned base_offset
, const nir_src
&offset_src
,
265 unsigned num_components
, unsigned first_component
);
266 void emit_cs_terminate();
267 fs_reg
*emit_cs_work_group_id_setup();
271 void emit_shader_time_begin();
272 void emit_shader_time_end();
273 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
274 int shader_time_subindex
,
277 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
279 fs_reg
interp_reg(int location
, int channel
);
281 int implied_mrf_writes(fs_inst
*inst
) const;
283 virtual void dump_instructions();
284 virtual void dump_instructions(const char *name
);
285 void dump_instruction(backend_instruction
*inst
);
286 void dump_instruction(backend_instruction
*inst
, FILE *file
);
288 const void *const key
;
289 const struct brw_sampler_prog_key_data
*key_tex
;
291 struct brw_gs_compile
*gs_compile
;
293 struct brw_stage_prog_data
*prog_data
;
294 struct gl_program
*prog
;
296 const struct brw_vue_map
*input_vue_map
;
298 int *virtual_grf_start
;
299 int *virtual_grf_end
;
300 brw::fs_live_variables
*live_intervals
;
302 int *regs_live_at_ip
;
304 /** Number of uniform variable components visited. */
307 /** Byte-offset for the next available spot in the scratch space buffer. */
308 unsigned last_scratch
;
311 * Array mapping UNIFORM register numbers to the pull parameter index,
312 * or -1 if this uniform register isn't being uploaded as a pull constant.
314 int *pull_constant_loc
;
317 * Array mapping UNIFORM register numbers to the push parameter index,
318 * or -1 if this uniform register isn't being uploaded as a push constant.
320 int *push_constant_loc
;
326 fs_reg outputs
[VARYING_SLOT_MAX
];
327 fs_reg dual_src_output
;
328 int first_non_payload_grf
;
329 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
333 fs_reg
*nir_ssa_values
;
334 fs_reg
*nir_system_values
;
339 /** Register numbers for thread payload fields. */
340 struct thread_payload
{
341 uint8_t source_depth_reg
;
342 uint8_t source_w_reg
;
343 uint8_t aa_dest_stencil_reg
;
344 uint8_t dest_depth_reg
;
345 uint8_t sample_pos_reg
;
346 uint8_t sample_mask_in_reg
;
347 uint8_t barycentric_coord_reg
[BRW_BARYCENTRIC_MODE_COUNT
];
348 uint8_t local_invocation_id_reg
;
350 /** The number of thread payload registers the hardware will supply. */
354 bool source_depth_to_render_target
;
355 bool runtime_check_aads_emit
;
361 fs_reg delta_xy
[BRW_BARYCENTRIC_MODE_COUNT
];
362 fs_reg shader_start_time
;
363 fs_reg userplane
[MAX_CLIP_PLANES
];
364 fs_reg final_gs_vertex_count
;
365 fs_reg control_data_bits
;
366 fs_reg invocation_id
;
369 bool spilled_any_registers
;
371 const unsigned dispatch_width
; /**< 8, 16 or 32 */
372 unsigned max_dispatch_width
;
374 int shader_time_index
;
376 unsigned promoted_constants
;
381 * The fragment shader code generator.
383 * Translates FS IR to actual i965 assembly code.
388 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
391 struct brw_stage_prog_data
*prog_data
,
392 unsigned promoted_constants
,
393 bool runtime_check_aads_emit
,
394 gl_shader_stage stage
);
397 void enable_debug(const char *shader_name
);
398 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
399 const unsigned *get_assembly();
402 void fire_fb_write(fs_inst
*inst
,
403 struct brw_reg payload
,
404 struct brw_reg implied_header
,
406 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
407 void generate_fb_read(fs_inst
*inst
, struct brw_reg dst
,
408 struct brw_reg payload
);
409 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
410 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
411 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
412 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
413 bool generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
414 struct brw_reg
*src
);
415 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
416 struct brw_reg surface_index
,
417 struct brw_reg sampler_index
);
418 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
420 struct brw_reg surf_index
);
421 void generate_ddx(const fs_inst
*inst
,
422 struct brw_reg dst
, struct brw_reg src
);
423 void generate_ddy(const fs_inst
*inst
,
424 struct brw_reg dst
, struct brw_reg src
);
425 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
426 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
427 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
428 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
429 struct brw_reg index
,
430 struct brw_reg offset
);
431 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
433 struct brw_reg surf_index
,
434 struct brw_reg payload
);
435 void generate_varying_pull_constant_load_gen4(fs_inst
*inst
,
437 struct brw_reg index
);
438 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
440 struct brw_reg index
,
441 struct brw_reg offset
);
442 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
444 void generate_pixel_interpolator_query(fs_inst
*inst
,
447 struct brw_reg msg_data
,
450 void generate_set_sample_id(fs_inst
*inst
,
453 struct brw_reg src1
);
455 void generate_discard_jump(fs_inst
*inst
);
457 void generate_pack_half_2x16_split(fs_inst
*inst
,
461 void generate_unpack_half_2x16_split(fs_inst
*inst
,
465 void generate_shader_time_add(fs_inst
*inst
,
466 struct brw_reg payload
,
467 struct brw_reg offset
,
468 struct brw_reg value
);
470 void generate_mov_indirect(fs_inst
*inst
,
473 struct brw_reg indirect_byte_offset
);
475 void generate_shuffle(fs_inst
*inst
,
480 bool patch_discard_jumps_to_fb_writes();
482 const struct brw_compiler
*compiler
;
483 void *log_data
; /* Passed to compiler->*_log functions */
485 const struct gen_device_info
*devinfo
;
487 struct brw_codegen
*p
;
488 const void * const key
;
489 struct brw_stage_prog_data
* const prog_data
;
491 unsigned dispatch_width
; /**< 8, 16 or 32 */
493 exec_list discard_halt_patches
;
494 unsigned promoted_constants
;
495 bool runtime_check_aads_emit
;
497 const char *shader_name
;
498 gl_shader_stage stage
;
502 void shuffle_32bit_load_result_to_64bit_data(const brw::fs_builder
&bld
,
505 uint32_t components
);
507 fs_reg
shuffle_64bit_data_for_32bit_write(const brw::fs_builder
&bld
,
509 uint32_t components
);
511 void shuffle_from_32bit_read(const brw::fs_builder
&bld
,
514 uint32_t first_component
,
515 uint32_t components
);
517 fs_reg
shuffle_for_32bit_write(const brw::fs_builder
&bld
,
519 uint32_t first_component
,
520 uint32_t components
);
522 fs_reg
setup_imm_df(const brw::fs_builder
&bld
,
525 enum brw_barycentric_mode
brw_barycentric_mode(enum glsl_interp_mode mode
,
526 nir_intrinsic_op op
);
528 #endif /* BRW_FS_H */