src/intel/compiler/brw_fs_cmod_propagation.cpp

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26 #include "brw_eu.h"
  27
  28 /** @file brw_fs_cmod_propagation.cpp
  29  *
  30  * Implements a pass that propagates the conditional modifier from a CMP x 0.0
  31  * instruction into the instruction that generated x. For instance, in this
  32  * sequence
  33  *
  34  *    add(8)          g70<1>F    g69<8,8,1>F    4096F
  35  *    cmp.ge.f0(8)    null       g70<8,8,1>F    0F
  36  *
  37  * we can do the comparison as part of the ADD instruction directly:
  38  *
  39  *    add.ge.f0(8)    g70<1>F    g69<8,8,1>F    4096F
  40  *
  41  * If there had been a use of the flag register and another CMP using g70
  42  *
  43  *    add.ge.f0(8)    g70<1>F    g69<8,8,1>F    4096F
  44  *    (+f0) sel(8)    g71<F>     g72<8,8,1>F    g73<8,8,1>F
  45  *    cmp.ge.f0(8)    null       g70<8,8,1>F    0F
  46  *
  47  * we can recognize that the CMP is generating the flag value that already
  48  * exists and therefore remove the instruction.
  49  */
  50
  51 static bool
  52 cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
  53                           fs_inst *inst)
  54 {
  55    bool read_flag = false;
  56    const unsigned flags_written = inst->flags_written();
  57
  58    foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
  59       if (scan_inst->opcode == BRW_OPCODE_ADD &&
  60           !scan_inst->is_partial_write() &&
  61           scan_inst->exec_size == inst->exec_size) {
  62          bool negate;
  63
  64          /* A CMP is basically a subtraction.  The result of the
  65           * subtraction must be the same as the result of the addition.
  66           * This means that one of the operands must be negated.  So (a +
  67           * b) vs (a == -b) or (a + -b) vs (a == b).
  68           */
  69          if ((inst->src[0].equals(scan_inst->src[0]) &&
  70               inst->src[1].negative_equals(scan_inst->src[1])) ||
  71              (inst->src[0].equals(scan_inst->src[1]) &&
  72               inst->src[1].negative_equals(scan_inst->src[0]))) {
  73             negate = false;
  74          } else if ((inst->src[0].negative_equals(scan_inst->src[0]) &&
  75                      inst->src[1].equals(scan_inst->src[1])) ||
  76                     (inst->src[0].negative_equals(scan_inst->src[1]) &&
  77                      inst->src[1].equals(scan_inst->src[0]))) {
  78             negate = true;
  79          } else {
  80             goto not_match;
  81          }
  82
  83          /* If the scan instruction writes a different flag register than the
  84           * instruction we're trying to propagate from, bail.
  85           *
  86           * FINISHME: The second part of the condition may be too strong.
  87           * Perhaps (scan_inst->flags_written() & flags_written) !=
  88           * flags_written?
  89           */
  90          if (scan_inst->flags_written() != 0 &&
  91              scan_inst->flags_written() != flags_written)
  92             goto not_match;
  93
  94          /* From the Sky Lake PRM Vol. 7 "Assigning Conditional Mods":
  95           *
  96           *    * Note that the [post condition signal] bits generated at
  97           *      the output of a compute are before the .sat.
  98           *
  99           * So we don't have to bail if scan_inst has saturate.
 100           */
 101          /* Otherwise, try propagating the conditional. */
 102          const enum brw_conditional_mod cond =
 103             negate ? brw_swap_cmod(inst->conditional_mod)
 104             : inst->conditional_mod;
 105
 106          if (scan_inst->can_do_cmod() &&
 107              ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 108               scan_inst->conditional_mod == cond)) {
 109             scan_inst->conditional_mod = cond;
 110             inst->remove(block);
 111             return true;
 112          }
 113          break;
 114       }
 115
 116    not_match:
 117       if ((scan_inst->flags_written() & flags_written) != 0)
 118          break;
 119
 120       read_flag = read_flag ||
 121                   (scan_inst->flags_read(devinfo) & flags_written) != 0;
 122    }
 123
 124    return false;
 125 }
 126
 127 /**
 128  * Propagate conditional modifiers from NOT instructions
 129  *
 130  * Attempt to convert sequences like
 131  *
 132  *    or(8)           g78<8,8,1>      g76<8,8,1>UD    g77<8,8,1>UD
 133  *    ...
 134  *    not.nz.f0(8)    null            g78<8,8,1>UD
 135  *
 136  * into
 137  *
 138  *    or.z.f0(8)      g78<8,8,1>      g76<8,8,1>UD    g77<8,8,1>UD
 139  */
 140 static bool
 141 cmod_propagate_not(const gen_device_info *devinfo, bblock_t *block,
 142                    fs_inst *inst)
 143 {
 144    const enum brw_conditional_mod cond = brw_negate_cmod(inst->conditional_mod);
 145    bool read_flag = false;
 146    const unsigned flags_written = inst->flags_written();
 147
 148    if (cond != BRW_CONDITIONAL_Z && cond != BRW_CONDITIONAL_NZ)
 149       return false;
 150
 151    foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
 152       if (regions_overlap(scan_inst->dst, scan_inst->size_written,
 153                           inst->src[0], inst->size_read(0))) {
 154          if (scan_inst->opcode != BRW_OPCODE_OR &&
 155              scan_inst->opcode != BRW_OPCODE_AND)
 156             break;
 157
 158          if (scan_inst->is_partial_write() ||
 159              scan_inst->dst.offset != inst->src[0].offset ||
 160              scan_inst->exec_size != inst->exec_size)
 161             break;
 162
 163          /* If the scan instruction writes a different flag register than the
 164           * instruction we're trying to propagate from, bail.
 165           *
 166           * FINISHME: The second part of the condition may be too strong.
 167           * Perhaps (scan_inst->flags_written() & flags_written) !=
 168           * flags_written?
 169           */
 170          if (scan_inst->flags_written() != 0 &&
 171              scan_inst->flags_written() != flags_written)
 172             break;
 173
 174          if (scan_inst->can_do_cmod() &&
 175              ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 176               scan_inst->conditional_mod == cond)) {
 177             scan_inst->conditional_mod = cond;
 178             inst->remove(block);
 179             return true;
 180          }
 181          break;
 182       }
 183
 184       if ((scan_inst->flags_written() & flags_written) != 0)
 185          break;
 186
 187       read_flag = read_flag ||
 188                   (scan_inst->flags_read(devinfo) & flags_written) != 0;
 189    }
 190
 191    return false;
 192 }
 193
 194 static bool
 195 opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
 196 {
 197    bool progress = false;
 198    int ip = block->end_ip + 1;
 199
 200    foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
 201       ip--;
 202
 203       if ((inst->opcode != BRW_OPCODE_AND &&
 204            inst->opcode != BRW_OPCODE_CMP &&
 205            inst->opcode != BRW_OPCODE_MOV &&
 206            inst->opcode != BRW_OPCODE_NOT) ||
 207           inst->predicate != BRW_PREDICATE_NONE ||
 208           !inst->dst.is_null() ||
 209           (inst->src[0].file != VGRF && inst->src[0].file != ATTR &&
 210            inst->src[0].file != UNIFORM))
 211          continue;
 212
 213       /* An ABS source modifier can only be handled when processing a compare
 214        * with a value other than zero.
 215        */
 216       if (inst->src[0].abs &&
 217           (inst->opcode != BRW_OPCODE_CMP || inst->src[1].is_zero()))
 218          continue;
 219
 220       /* Only an AND.NZ can be propagated.  Many AND.Z instructions are
 221        * generated (for ir_unop_not in fs_visitor::emit_bool_to_cond_code).
 222        * Propagating those would require inverting the condition on the CMP.
 223        * This changes both the flag value and the register destination of the
 224        * CMP.  That result may be used elsewhere, so we can't change its value
 225        * on a whim.
 226        */
 227       if (inst->opcode == BRW_OPCODE_AND &&
 228           !(inst->src[1].is_one() &&
 229             inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 230             !inst->src[0].negate))
 231          continue;
 232
 233       if (inst->opcode == BRW_OPCODE_MOV &&
 234           inst->conditional_mod != BRW_CONDITIONAL_NZ)
 235          continue;
 236
 237       /* A CMP with a second source of zero can match with anything.  A CMP
 238        * with a second source that is not zero can only match with an ADD
 239        * instruction.
 240        *
 241        * Only apply this optimization to float-point sources.  It can fail for
 242        * integers.  For inputs a = 0x80000000, b = 4, int(0x80000000) < 4, but
 243        * int(0x80000000) - 4 overflows and results in 0x7ffffffc.  that's not
 244        * less than zero, so the flags get set differently than for (a < b).
 245        */
 246       if (inst->opcode == BRW_OPCODE_CMP && !inst->src[1].is_zero()) {
 247          if (brw_reg_type_is_floating_point(inst->src[0].type) &&
 248              cmod_propagate_cmp_to_add(devinfo, block, inst))
 249             progress = true;
 250
 251          continue;
 252       }
 253
 254       if (inst->opcode == BRW_OPCODE_NOT) {
 255          progress = cmod_propagate_not(devinfo, block, inst) || progress;
 256          continue;
 257       }
 258
 259       bool read_flag = false;
 260       const unsigned flags_written = inst->flags_written();
 261       foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
 262          if (regions_overlap(scan_inst->dst, scan_inst->size_written,
 263                              inst->src[0], inst->size_read(0))) {
 264             /* If the scan instruction writes a different flag register than
 265              * the instruction we're trying to propagate from, bail.
 266              *
 267              * FINISHME: The second part of the condition may be too strong.
 268              * Perhaps (scan_inst->flags_written() & flags_written) !=
 269              * flags_written?
 270              */
 271             if (scan_inst->flags_written() != 0 &&
 272                 scan_inst->flags_written() != flags_written)
 273                break;
 274
 275             if (scan_inst->is_partial_write() ||
 276                 scan_inst->dst.offset != inst->src[0].offset ||
 277                 scan_inst->exec_size != inst->exec_size)
 278                break;
 279
 280             /* CMP's result is the same regardless of dest type. */
 281             if (inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 282                 scan_inst->opcode == BRW_OPCODE_CMP &&
 283                 brw_reg_type_is_integer(inst->dst.type)) {
 284                inst->remove(block);
 285                progress = true;
 286                break;
 287             }
 288
 289             /* If the AND wasn't handled by the previous case, it isn't safe
 290              * to remove it.
 291              */
 292             if (inst->opcode == BRW_OPCODE_AND)
 293                break;
 294
 295             /* Not safe to use inequality operators if the types are different
 296              */
 297             if (scan_inst->dst.type != inst->src[0].type &&
 298                 inst->conditional_mod != BRW_CONDITIONAL_Z &&
 299                 inst->conditional_mod != BRW_CONDITIONAL_NZ)
 300                break;
 301
 302             /* Comparisons operate differently for ints and floats */
 303             if (scan_inst->dst.type != inst->dst.type) {
 304                /* Comparison result may be altered if the bit-size changes
 305                 * since that affects range, denorms, etc
 306                 */
 307                if (type_sz(scan_inst->dst.type) != type_sz(inst->dst.type))
 308                   break;
 309
 310                /* We should propagate from a MOV to another instruction in a
 311                 * sequence like:
 312                 *
 313                 *    and(16)         g31<1>UD       g20<8,8,1>UD   g22<8,8,1>UD
 314                 *    mov.nz.f0(16)   null<1>F       g31<8,8,1>D
 315                 */
 316                if (inst->opcode == BRW_OPCODE_MOV) {
 317                   if ((inst->src[0].type != BRW_REGISTER_TYPE_D &&
 318                        inst->src[0].type != BRW_REGISTER_TYPE_UD) ||
 319                       (scan_inst->dst.type != BRW_REGISTER_TYPE_D &&
 320                        scan_inst->dst.type != BRW_REGISTER_TYPE_UD)) {
 321                      break;
 322                   }
 323                } else if (brw_reg_type_is_floating_point(scan_inst->dst.type) !=
 324                           brw_reg_type_is_floating_point(inst->dst.type)) {
 325                   break;
 326                }
 327             }
 328
 329             /* If the instruction generating inst's source also wrote the
 330              * flag, and inst is doing a simple .nz comparison, then inst
 331              * is redundant - the appropriate value is already in the flag
 332              * register.  Delete inst.
 333              */
 334             if (inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 335                 !inst->src[0].negate &&
 336                 scan_inst->flags_written()) {
 337                inst->remove(block);
 338                progress = true;
 339                break;
 340             }
 341
 342             /* The conditional mod of the CMP/CMPN instructions behaves
 343              * specially because the flag output is not calculated from the
 344              * result of the instruction, but the other way around, which
 345              * means that even if the condmod to propagate and the condmod
 346              * from the CMP instruction are the same they will in general give
 347              * different results because they are evaluated based on different
 348              * inputs.
 349              */
 350             if (scan_inst->opcode == BRW_OPCODE_CMP ||
 351                 scan_inst->opcode == BRW_OPCODE_CMPN)
 352                break;
 353
 354             /* From the Sky Lake PRM, Vol 2a, "Multiply":
 355              *
 356              *    "When multiplying integer data types, if one of the sources
 357              *     is a DW, the resulting full precision data is stored in
 358              *     the accumulator. However, if the destination data type is
 359              *     either W or DW, the low bits of the result are written to
 360              *     the destination register and the remaining high bits are
 361              *     discarded. This results in undefined Overflow and Sign
 362              *     flags. Therefore, conditional modifiers and saturation
 363              *     (.sat) cannot be used in this case."
 364              *
 365              * We just disallow cmod propagation on all integer multiplies.
 366              */
 367             if (!brw_reg_type_is_floating_point(scan_inst->dst.type) &&
 368                 scan_inst->opcode == BRW_OPCODE_MUL)
 369                break;
 370
 371             enum brw_conditional_mod cond =
 372                inst->src[0].negate ? brw_swap_cmod(inst->conditional_mod)
 373                                    : inst->conditional_mod;
 374
 375             /* From the Sky Lake PRM Vol. 7 "Assigning Conditional Mods":
 376              *
 377              *    * Note that the [post condition signal] bits generated at
 378              *      the output of a compute are before the .sat.
 379              *
 380              * This limits the cases where we can propagate the conditional
 381              * modifier.  If scan_inst has a saturate modifier, then we can
 382              * only propagate from inst if inst is 'scan_inst <= 0',
 383              * 'scan_inst == 0', 'scan_inst != 0', or 'scan_inst > 0'.  If
 384              * inst is 'scan_inst == 0', the conditional modifier must be
 385              * replace with LE.  Likewise, if inst is 'scan_inst != 0', the
 386              * conditional modifier must be replace with G.
 387              *
 388              * The only other cases are 'scan_inst < 0' (which is a
 389              * contradiction) and 'scan_inst >= 0' (which is a tautology).
 390              */
 391             if (scan_inst->saturate) {
 392                if (scan_inst->dst.type != BRW_REGISTER_TYPE_F)
 393                   break;
 394
 395                if (cond != BRW_CONDITIONAL_Z &&
 396                    cond != BRW_CONDITIONAL_NZ &&
 397                    cond != BRW_CONDITIONAL_LE &&
 398                    cond != BRW_CONDITIONAL_G)
 399                   break;
 400
 401                if (inst->opcode != BRW_OPCODE_MOV &&
 402                    inst->opcode != BRW_OPCODE_CMP)
 403                   break;
 404
 405                /* inst->src[1].is_zero() was tested before, but be safe
 406                 * against possible future changes in this code.
 407                 */
 408                assert(inst->opcode != BRW_OPCODE_CMP || inst->src[1].is_zero());
 409
 410                if (cond == BRW_CONDITIONAL_Z)
 411                   cond = BRW_CONDITIONAL_LE;
 412                else if (cond == BRW_CONDITIONAL_NZ)
 413                   cond = BRW_CONDITIONAL_G;
 414             }
 415
 416             /* Otherwise, try propagating the conditional. */
 417             if (scan_inst->can_do_cmod() &&
 418                 ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 419                  scan_inst->conditional_mod == cond)) {
 420                scan_inst->conditional_mod = cond;
 421                scan_inst->flag_subreg = inst->flag_subreg;
 422                inst->remove(block);
 423                progress = true;
 424             }
 425             break;
 426          }
 427
 428          if ((scan_inst->flags_written() & flags_written) != 0)
 429             break;
 430
 431          read_flag = read_flag ||
 432                      (scan_inst->flags_read(devinfo) & flags_written) != 0;
 433       }
 434    }
 435
 436    return progress;
 437 }
 438
 439 bool
 440 fs_visitor::opt_cmod_propagation()
 441 {
 442    bool progress = false;
 443
 444    foreach_block_reverse(block, cfg) {
 445       progress = opt_cmod_propagation_local(devinfo, block) || progress;
 446    }
 447
 448    if (progress)
 449       invalidate_live_intervals();
 450
 451    return progress;
 452 }