src/intel/compiler/brw_fs_cmod_propagation.cpp

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26 #include "brw_eu.h"
  27
  28 /** @file brw_fs_cmod_propagation.cpp
  29  *
  30  * Implements a pass that propagates the conditional modifier from a CMP x 0.0
  31  * instruction into the instruction that generated x. For instance, in this
  32  * sequence
  33  *
  34  *    add(8)          g70<1>F    g69<8,8,1>F    4096F
  35  *    cmp.ge.f0(8)    null       g70<8,8,1>F    0F
  36  *
  37  * we can do the comparison as part of the ADD instruction directly:
  38  *
  39  *    add.ge.f0(8)    g70<1>F    g69<8,8,1>F    4096F
  40  *
  41  * If there had been a use of the flag register and another CMP using g70
  42  *
  43  *    add.ge.f0(8)    g70<1>F    g69<8,8,1>F    4096F
  44  *    (+f0) sel(8)    g71<F>     g72<8,8,1>F    g73<8,8,1>F
  45  *    cmp.ge.f0(8)    null       g70<8,8,1>F    0F
  46  *
  47  * we can recognize that the CMP is generating the flag value that already
  48  * exists and therefore remove the instruction.
  49  */
  50
  51 using namespace brw;
  52
  53 static bool
  54 cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
  55                           fs_inst *inst)
  56 {
  57    bool read_flag = false;
  58    const unsigned flags_written = inst->flags_written();
  59
  60    foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
  61       if (scan_inst->opcode == BRW_OPCODE_ADD &&
  62           !scan_inst->is_partial_write() &&
  63           scan_inst->exec_size == inst->exec_size) {
  64          bool negate;
  65
  66          /* A CMP is basically a subtraction.  The result of the
  67           * subtraction must be the same as the result of the addition.
  68           * This means that one of the operands must be negated.  So (a +
  69           * b) vs (a == -b) or (a + -b) vs (a == b).
  70           */
  71          if ((inst->src[0].equals(scan_inst->src[0]) &&
  72               inst->src[1].negative_equals(scan_inst->src[1])) ||
  73              (inst->src[0].equals(scan_inst->src[1]) &&
  74               inst->src[1].negative_equals(scan_inst->src[0]))) {
  75             negate = false;
  76          } else if ((inst->src[0].negative_equals(scan_inst->src[0]) &&
  77                      inst->src[1].equals(scan_inst->src[1])) ||
  78                     (inst->src[0].negative_equals(scan_inst->src[1]) &&
  79                      inst->src[1].equals(scan_inst->src[0]))) {
  80             negate = true;
  81          } else {
  82             goto not_match;
  83          }
  84
  85          /* If the scan instruction writes a different flag register than the
  86           * instruction we're trying to propagate from, bail.
  87           *
  88           * FINISHME: The second part of the condition may be too strong.
  89           * Perhaps (scan_inst->flags_written() & flags_written) !=
  90           * flags_written?
  91           */
  92          if (scan_inst->flags_written() != 0 &&
  93              scan_inst->flags_written() != flags_written)
  94             goto not_match;
  95
  96          /* From the Sky Lake PRM Vol. 7 "Assigning Conditional Mods":
  97           *
  98           *    * Note that the [post condition signal] bits generated at
  99           *      the output of a compute are before the .sat.
 100           *
 101           * So we don't have to bail if scan_inst has saturate.
 102           */
 103          /* Otherwise, try propagating the conditional. */
 104          const enum brw_conditional_mod cond =
 105             negate ? brw_swap_cmod(inst->conditional_mod)
 106             : inst->conditional_mod;
 107
 108          if (scan_inst->can_do_cmod() &&
 109              ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 110               scan_inst->conditional_mod == cond)) {
 111             scan_inst->conditional_mod = cond;
 112             inst->remove(block);
 113             return true;
 114          }
 115          break;
 116       }
 117
 118    not_match:
 119       if ((scan_inst->flags_written() & flags_written) != 0)
 120          break;
 121
 122       read_flag = read_flag ||
 123                   (scan_inst->flags_read(devinfo) & flags_written) != 0;
 124    }
 125
 126    return false;
 127 }
 128
 129 /**
 130  * Propagate conditional modifiers from NOT instructions
 131  *
 132  * Attempt to convert sequences like
 133  *
 134  *    or(8)           g78<8,8,1>      g76<8,8,1>UD    g77<8,8,1>UD
 135  *    ...
 136  *    not.nz.f0(8)    null            g78<8,8,1>UD
 137  *
 138  * into
 139  *
 140  *    or.z.f0(8)      g78<8,8,1>      g76<8,8,1>UD    g77<8,8,1>UD
 141  */
 142 static bool
 143 cmod_propagate_not(const gen_device_info *devinfo, bblock_t *block,
 144                    fs_inst *inst)
 145 {
 146    const enum brw_conditional_mod cond = brw_negate_cmod(inst->conditional_mod);
 147    bool read_flag = false;
 148    const unsigned flags_written = inst->flags_written();
 149
 150    if (cond != BRW_CONDITIONAL_Z && cond != BRW_CONDITIONAL_NZ)
 151       return false;
 152
 153    foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
 154       if (regions_overlap(scan_inst->dst, scan_inst->size_written,
 155                           inst->src[0], inst->size_read(0))) {
 156          if (scan_inst->opcode != BRW_OPCODE_OR &&
 157              scan_inst->opcode != BRW_OPCODE_AND)
 158             break;
 159
 160          if (scan_inst->is_partial_write() ||
 161              scan_inst->dst.offset != inst->src[0].offset ||
 162              scan_inst->exec_size != inst->exec_size)
 163             break;
 164
 165          /* If the scan instruction writes a different flag register than the
 166           * instruction we're trying to propagate from, bail.
 167           *
 168           * FINISHME: The second part of the condition may be too strong.
 169           * Perhaps (scan_inst->flags_written() & flags_written) !=
 170           * flags_written?
 171           */
 172          if (scan_inst->flags_written() != 0 &&
 173              scan_inst->flags_written() != flags_written)
 174             break;
 175
 176          if (scan_inst->can_do_cmod() &&
 177              ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 178               scan_inst->conditional_mod == cond)) {
 179             scan_inst->conditional_mod = cond;
 180             inst->remove(block);
 181             return true;
 182          }
 183          break;
 184       }
 185
 186       if ((scan_inst->flags_written() & flags_written) != 0)
 187          break;
 188
 189       read_flag = read_flag ||
 190                   (scan_inst->flags_read(devinfo) & flags_written) != 0;
 191    }
 192
 193    return false;
 194 }
 195
 196 static bool
 197 opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
 198 {
 199    bool progress = false;
 200    int ip = block->end_ip + 1;
 201
 202    foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
 203       ip--;
 204
 205       if ((inst->opcode != BRW_OPCODE_AND &&
 206            inst->opcode != BRW_OPCODE_CMP &&
 207            inst->opcode != BRW_OPCODE_MOV &&
 208            inst->opcode != BRW_OPCODE_NOT) ||
 209           inst->predicate != BRW_PREDICATE_NONE ||
 210           !inst->dst.is_null() ||
 211           (inst->src[0].file != VGRF && inst->src[0].file != ATTR &&
 212            inst->src[0].file != UNIFORM))
 213          continue;
 214
 215       /* An ABS source modifier can only be handled when processing a compare
 216        * with a value other than zero.
 217        */
 218       if (inst->src[0].abs &&
 219           (inst->opcode != BRW_OPCODE_CMP || inst->src[1].is_zero()))
 220          continue;
 221
 222       /* Only an AND.NZ can be propagated.  Many AND.Z instructions are
 223        * generated (for ir_unop_not in fs_visitor::emit_bool_to_cond_code).
 224        * Propagating those would require inverting the condition on the CMP.
 225        * This changes both the flag value and the register destination of the
 226        * CMP.  That result may be used elsewhere, so we can't change its value
 227        * on a whim.
 228        */
 229       if (inst->opcode == BRW_OPCODE_AND &&
 230           !(inst->src[1].is_one() &&
 231             inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 232             !inst->src[0].negate))
 233          continue;
 234
 235       if (inst->opcode == BRW_OPCODE_MOV &&
 236           inst->conditional_mod != BRW_CONDITIONAL_NZ)
 237          continue;
 238
 239       /* A CMP with a second source of zero can match with anything.  A CMP
 240        * with a second source that is not zero can only match with an ADD
 241        * instruction.
 242        *
 243        * Only apply this optimization to float-point sources.  It can fail for
 244        * integers.  For inputs a = 0x80000000, b = 4, int(0x80000000) < 4, but
 245        * int(0x80000000) - 4 overflows and results in 0x7ffffffc.  that's not
 246        * less than zero, so the flags get set differently than for (a < b).
 247        */
 248       if (inst->opcode == BRW_OPCODE_CMP && !inst->src[1].is_zero()) {
 249          if (brw_reg_type_is_floating_point(inst->src[0].type) &&
 250              cmod_propagate_cmp_to_add(devinfo, block, inst))
 251             progress = true;
 252
 253          continue;
 254       }
 255
 256       if (inst->opcode == BRW_OPCODE_NOT) {
 257          progress = cmod_propagate_not(devinfo, block, inst) || progress;
 258          continue;
 259       }
 260
 261       bool read_flag = false;
 262       const unsigned flags_written = inst->flags_written();
 263       foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) {
 264          if (regions_overlap(scan_inst->dst, scan_inst->size_written,
 265                              inst->src[0], inst->size_read(0))) {
 266             /* If the scan instruction writes a different flag register than
 267              * the instruction we're trying to propagate from, bail.
 268              *
 269              * FINISHME: The second part of the condition may be too strong.
 270              * Perhaps (scan_inst->flags_written() & flags_written) !=
 271              * flags_written?
 272              */
 273             if (scan_inst->flags_written() != 0 &&
 274                 scan_inst->flags_written() != flags_written)
 275                break;
 276
 277             if (scan_inst->is_partial_write() ||
 278                 scan_inst->dst.offset != inst->src[0].offset ||
 279                 scan_inst->exec_size != inst->exec_size)
 280                break;
 281
 282             /* CMP's result is the same regardless of dest type. */
 283             if (inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 284                 scan_inst->opcode == BRW_OPCODE_CMP &&
 285                 brw_reg_type_is_integer(inst->dst.type)) {
 286                inst->remove(block);
 287                progress = true;
 288                break;
 289             }
 290
 291             /* If the AND wasn't handled by the previous case, it isn't safe
 292              * to remove it.
 293              */
 294             if (inst->opcode == BRW_OPCODE_AND)
 295                break;
 296
 297             /* Not safe to use inequality operators if the types are different
 298              */
 299             if (scan_inst->dst.type != inst->src[0].type &&
 300                 inst->conditional_mod != BRW_CONDITIONAL_Z &&
 301                 inst->conditional_mod != BRW_CONDITIONAL_NZ)
 302                break;
 303
 304             /* Comparisons operate differently for ints and floats */
 305             if (scan_inst->dst.type != inst->dst.type) {
 306                /* Comparison result may be altered if the bit-size changes
 307                 * since that affects range, denorms, etc
 308                 */
 309                if (type_sz(scan_inst->dst.type) != type_sz(inst->dst.type))
 310                   break;
 311
 312                /* We should propagate from a MOV to another instruction in a
 313                 * sequence like:
 314                 *
 315                 *    and(16)         g31<1>UD       g20<8,8,1>UD   g22<8,8,1>UD
 316                 *    mov.nz.f0(16)   null<1>F       g31<8,8,1>D
 317                 */
 318                if (inst->opcode == BRW_OPCODE_MOV) {
 319                   if ((inst->src[0].type != BRW_REGISTER_TYPE_D &&
 320                        inst->src[0].type != BRW_REGISTER_TYPE_UD) ||
 321                       (scan_inst->dst.type != BRW_REGISTER_TYPE_D &&
 322                        scan_inst->dst.type != BRW_REGISTER_TYPE_UD)) {
 323                      break;
 324                   }
 325                } else if (brw_reg_type_is_floating_point(scan_inst->dst.type) !=
 326                           brw_reg_type_is_floating_point(inst->dst.type)) {
 327                   break;
 328                }
 329             }
 330
 331             /* Knowing following:
 332              * - CMP writes to flag register the result of
 333              *   applying cmod to the `src0 - src1`.
 334              *   After that it stores the same value to dst.
 335              *   Other instructions first store their result to
 336              *   dst, and then store cmod(dst) to the flag
 337              *   register.
 338              * - inst is either CMP or MOV
 339              * - inst->dst is null
 340              * - inst->src[0] overlaps with scan_inst->dst
 341              * - inst->src[1] is zero
 342              * - scan_inst wrote to a flag register
 343              *
 344              * There can be three possible paths:
 345              *
 346              * - scan_inst is CMP:
 347              *
 348              *   Considering that src0 is either 0x0 (false),
 349              *   or 0xffffffff (true), and src1 is 0x0:
 350              *
 351              *   - If inst's cmod is NZ, we can always remove
 352              *     scan_inst: NZ is invariant for false and true. This
 353              *     holds even if src0 is NaN: .nz is the only cmod,
 354              *     that returns true for NaN.
 355              *
 356              *   - .g is invariant if src0 has a UD type
 357              *
 358              *   - .l is invariant if src0 has a D type
 359              *
 360              * - scan_inst and inst have the same cmod:
 361              *
 362              *   If scan_inst is anything than CMP, it already
 363              *   wrote the appropriate value to the flag register.
 364              *
 365              * - else:
 366              *
 367              *   We can change cmod of scan_inst to that of inst,
 368              *   and remove inst. It is valid as long as we make
 369              *   sure that no instruction uses the flag register
 370              *   between scan_inst and inst.
 371              */
 372             if (!inst->src[0].negate &&
 373                 scan_inst->flags_written()) {
 374                if (scan_inst->opcode == BRW_OPCODE_CMP) {
 375                   if ((inst->conditional_mod == BRW_CONDITIONAL_NZ) ||
 376                       (inst->conditional_mod == BRW_CONDITIONAL_G &&
 377                        inst->src[0].type == BRW_REGISTER_TYPE_UD) ||
 378                       (inst->conditional_mod == BRW_CONDITIONAL_L &&
 379                        inst->src[0].type == BRW_REGISTER_TYPE_D)) {
 380                      inst->remove(block);
 381                      progress = true;
 382                      break;
 383                   }
 384                } else if (scan_inst->conditional_mod == inst->conditional_mod) {
 385                   inst->remove(block);
 386                   progress = true;
 387                   break;
 388                } else if (!read_flag) {
 389                   scan_inst->conditional_mod = inst->conditional_mod;
 390                   inst->remove(block);
 391                   progress = true;
 392                   break;
 393                }
 394             }
 395
 396             /* The conditional mod of the CMP/CMPN instructions behaves
 397              * specially because the flag output is not calculated from the
 398              * result of the instruction, but the other way around, which
 399              * means that even if the condmod to propagate and the condmod
 400              * from the CMP instruction are the same they will in general give
 401              * different results because they are evaluated based on different
 402              * inputs.
 403              */
 404             if (scan_inst->opcode == BRW_OPCODE_CMP ||
 405                 scan_inst->opcode == BRW_OPCODE_CMPN)
 406                break;
 407
 408             /* From the Sky Lake PRM, Vol 2a, "Multiply":
 409              *
 410              *    "When multiplying integer data types, if one of the sources
 411              *     is a DW, the resulting full precision data is stored in
 412              *     the accumulator. However, if the destination data type is
 413              *     either W or DW, the low bits of the result are written to
 414              *     the destination register and the remaining high bits are
 415              *     discarded. This results in undefined Overflow and Sign
 416              *     flags. Therefore, conditional modifiers and saturation
 417              *     (.sat) cannot be used in this case."
 418              *
 419              * We just disallow cmod propagation on all integer multiplies.
 420              */
 421             if (!brw_reg_type_is_floating_point(scan_inst->dst.type) &&
 422                 scan_inst->opcode == BRW_OPCODE_MUL)
 423                break;
 424
 425             enum brw_conditional_mod cond =
 426                inst->src[0].negate ? brw_swap_cmod(inst->conditional_mod)
 427                                    : inst->conditional_mod;
 428
 429             /* From the Sky Lake PRM Vol. 7 "Assigning Conditional Mods":
 430              *
 431              *    * Note that the [post condition signal] bits generated at
 432              *      the output of a compute are before the .sat.
 433              *
 434              * This limits the cases where we can propagate the conditional
 435              * modifier.  If scan_inst has a saturate modifier, then we can
 436              * only propagate from inst if inst is 'scan_inst <= 0',
 437              * 'scan_inst == 0', 'scan_inst != 0', or 'scan_inst > 0'.  If
 438              * inst is 'scan_inst == 0', the conditional modifier must be
 439              * replace with LE.  Likewise, if inst is 'scan_inst != 0', the
 440              * conditional modifier must be replace with G.
 441              *
 442              * The only other cases are 'scan_inst < 0' (which is a
 443              * contradiction) and 'scan_inst >= 0' (which is a tautology).
 444              */
 445             if (scan_inst->saturate) {
 446                if (scan_inst->dst.type != BRW_REGISTER_TYPE_F)
 447                   break;
 448
 449                if (cond != BRW_CONDITIONAL_Z &&
 450                    cond != BRW_CONDITIONAL_NZ &&
 451                    cond != BRW_CONDITIONAL_LE &&
 452                    cond != BRW_CONDITIONAL_G)
 453                   break;
 454
 455                if (inst->opcode != BRW_OPCODE_MOV &&
 456                    inst->opcode != BRW_OPCODE_CMP)
 457                   break;
 458
 459                /* inst->src[1].is_zero() was tested before, but be safe
 460                 * against possible future changes in this code.
 461                 */
 462                assert(inst->opcode != BRW_OPCODE_CMP || inst->src[1].is_zero());
 463
 464                if (cond == BRW_CONDITIONAL_Z)
 465                   cond = BRW_CONDITIONAL_LE;
 466                else if (cond == BRW_CONDITIONAL_NZ)
 467                   cond = BRW_CONDITIONAL_G;
 468             }
 469
 470             /* Otherwise, try propagating the conditional. */
 471             if (scan_inst->can_do_cmod() &&
 472                 ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 473                  scan_inst->conditional_mod == cond)) {
 474                scan_inst->conditional_mod = cond;
 475                scan_inst->flag_subreg = inst->flag_subreg;
 476                inst->remove(block);
 477                progress = true;
 478             }
 479             break;
 480          }
 481
 482          if ((scan_inst->flags_written() & flags_written) != 0)
 483             break;
 484
 485          read_flag = read_flag ||
 486                      (scan_inst->flags_read(devinfo) & flags_written) != 0;
 487       }
 488    }
 489
 490    return progress;
 491 }
 492
 493 bool
 494 fs_visitor::opt_cmod_propagation()
 495 {
 496    bool progress = false;
 497
 498    foreach_block_reverse(block, cfg) {
 499       progress = opt_cmod_propagation_local(devinfo, block) || progress;
 500    }
 501
 502    if (progress)
 503       invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
 504
 505    return progress;
 506 }