2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "brw_fs_live_variables.h"
28 /** @file brw_fs_dead_code_eliminate.cpp
30 * Dataflow-aware dead code elimination.
32 * Walks the instruction list from the bottom, removing instructions that
33 * have results that both aren't used in later blocks and haven't been read
34 * yet in the tail end of this block.
40 * Is it safe to eliminate the instruction?
43 can_eliminate(const fs_inst
*inst
, BITSET_WORD
*flag_live
)
45 return !inst
->is_control_flow() &&
46 !inst
->has_side_effects() &&
47 !(flag_live
[0] & inst
->flags_written()) &&
48 !inst
->writes_accumulator
;
52 * Is it safe to omit the write, making the destination ARF null?
55 can_omit_write(const fs_inst
*inst
)
57 switch (inst
->opcode
) {
58 case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL
:
59 case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT_LOGICAL
:
60 case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL
:
63 /* We can eliminate the destination write for ordinary instructions,
66 if (inst
->opcode
< 128 && inst
->mlen
== 0)
69 /* It might not be safe for other virtual opcodes. */
75 fs_visitor::dead_code_eliminate()
77 bool progress
= false;
79 const fs_live_variables
&live_vars
= live_analysis
.require();
80 int num_vars
= live_vars
.num_vars
;
81 BITSET_WORD
*live
= rzalloc_array(NULL
, BITSET_WORD
, BITSET_WORDS(num_vars
));
82 BITSET_WORD
*flag_live
= rzalloc_array(NULL
, BITSET_WORD
, 1);
84 foreach_block_reverse_safe(block
, cfg
) {
85 memcpy(live
, live_vars
.block_data
[block
->num
].liveout
,
86 sizeof(BITSET_WORD
) * BITSET_WORDS(num_vars
));
87 memcpy(flag_live
, live_vars
.block_data
[block
->num
].flag_liveout
,
90 foreach_inst_in_block_reverse_safe(fs_inst
, inst
, block
) {
91 if (inst
->dst
.file
== VGRF
) {
92 const unsigned var
= live_vars
.var_from_reg(inst
->dst
);
93 bool result_live
= false;
95 for (unsigned i
= 0; i
< regs_written(inst
); i
++)
96 result_live
|= BITSET_TEST(live
, var
+ i
);
99 (can_omit_write(inst
) || can_eliminate(inst
, flag_live
))) {
100 inst
->dst
= fs_reg(spread(retype(brw_null_reg(), inst
->dst
.type
),
106 if (inst
->dst
.is_null() && can_eliminate(inst
, flag_live
)) {
107 inst
->opcode
= BRW_OPCODE_NOP
;
111 if (inst
->dst
.file
== VGRF
) {
112 if (!inst
->is_partial_write()) {
113 const unsigned var
= live_vars
.var_from_reg(inst
->dst
);
114 for (unsigned i
= 0; i
< regs_written(inst
); i
++) {
115 BITSET_CLEAR(live
, var
+ i
);
120 if (!inst
->predicate
&& inst
->exec_size
>= 8)
121 flag_live
[0] &= ~inst
->flags_written();
123 if (inst
->opcode
== BRW_OPCODE_NOP
) {
128 for (int i
= 0; i
< inst
->sources
; i
++) {
129 if (inst
->src
[i
].file
== VGRF
) {
130 int var
= live_vars
.var_from_reg(inst
->src
[i
]);
132 for (unsigned j
= 0; j
< regs_read(inst
, i
); j
++) {
133 BITSET_SET(live
, var
+ j
);
138 flag_live
[0] |= inst
->flags_read(devinfo
);
143 ralloc_free(flag_live
);
146 invalidate_analysis(DEPENDENCY_INSTRUCTIONS
);