2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "brw_shader.h"
26 #include "common/gen_debug.h"
27 #include "compiler/glsl_types.h"
28 #include "compiler/nir/nir_builder.h"
31 is_input(nir_intrinsic_instr
*intrin
)
33 return intrin
->intrinsic
== nir_intrinsic_load_input
||
34 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_input
||
35 intrin
->intrinsic
== nir_intrinsic_load_interpolated_input
;
39 is_output(nir_intrinsic_instr
*intrin
)
41 return intrin
->intrinsic
== nir_intrinsic_load_output
||
42 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_output
||
43 intrin
->intrinsic
== nir_intrinsic_store_output
||
44 intrin
->intrinsic
== nir_intrinsic_store_per_vertex_output
;
48 * In many cases, we just add the base and offset together, so there's no
49 * reason to keep them separate. Sometimes, combining them is essential:
50 * if a shader only accesses part of a compound variable (such as a matrix
51 * or array), the variable's base may not actually exist in the VUE map.
53 * This pass adds constant offsets to instr->const_index[0], and resets
54 * the offset source to 0. Non-constant offsets remain unchanged - since
55 * we don't know what part of a compound variable is accessed, we allocate
56 * storage for the entire thing.
60 add_const_offset_to_base_block(nir_block
*block
, nir_builder
*b
,
61 nir_variable_mode mode
)
63 nir_foreach_instr_safe(instr
, block
) {
64 if (instr
->type
!= nir_instr_type_intrinsic
)
67 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
69 if ((mode
== nir_var_shader_in
&& is_input(intrin
)) ||
70 (mode
== nir_var_shader_out
&& is_output(intrin
))) {
71 nir_src
*offset
= nir_get_io_offset_src(intrin
);
72 nir_const_value
*const_offset
= nir_src_as_const_value(*offset
);
75 intrin
->const_index
[0] += const_offset
->u32
[0];
76 b
->cursor
= nir_before_instr(&intrin
->instr
);
77 nir_instr_rewrite_src(&intrin
->instr
, offset
,
78 nir_src_for_ssa(nir_imm_int(b
, 0)));
86 add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
)
88 nir_foreach_function(f
, nir
) {
91 nir_builder_init(&b
, f
->impl
);
92 nir_foreach_block(block
, f
->impl
) {
93 add_const_offset_to_base_block(block
, &b
, mode
);
100 remap_inputs_with_vue_map(nir_block
*block
, const struct brw_vue_map
*vue_map
)
102 nir_foreach_instr(instr
, block
) {
103 if (instr
->type
!= nir_instr_type_intrinsic
)
106 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
108 if (intrin
->intrinsic
== nir_intrinsic_load_input
||
109 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_input
) {
110 int vue_slot
= vue_map
->varying_to_slot
[intrin
->const_index
[0]];
111 assert(vue_slot
!= -1);
112 intrin
->const_index
[0] = vue_slot
;
119 remap_tess_levels(nir_builder
*b
, nir_intrinsic_instr
*intr
,
120 GLenum primitive_mode
)
122 const int location
= nir_intrinsic_base(intr
);
123 const unsigned component
= nir_intrinsic_component(intr
);
126 if (location
== VARYING_SLOT_TESS_LEVEL_INNER
) {
127 switch (primitive_mode
) {
129 /* gl_TessLevelInner[0..1] lives at DWords 3-2 (reversed). */
130 nir_intrinsic_set_base(intr
, 0);
131 nir_intrinsic_set_component(intr
, 3 - component
);
132 out_of_bounds
= false;
135 /* gl_TessLevelInner[0] lives at DWord 4. */
136 nir_intrinsic_set_base(intr
, 1);
137 out_of_bounds
= component
> 0;
140 out_of_bounds
= true;
143 unreachable("Bogus tessellation domain");
145 } else if (location
== VARYING_SLOT_TESS_LEVEL_OUTER
) {
146 if (primitive_mode
== GL_ISOLINES
) {
147 /* gl_TessLevelOuter[0..1] lives at DWords 6-7 (in order). */
148 nir_intrinsic_set_base(intr
, 1);
149 nir_intrinsic_set_component(intr
, 2 + nir_intrinsic_component(intr
));
150 out_of_bounds
= component
> 1;
152 /* Triangles use DWords 7-5 (reversed); Quads use 7-4 (reversed) */
153 nir_intrinsic_set_base(intr
, 1);
154 nir_intrinsic_set_component(intr
, 3 - nir_intrinsic_component(intr
));
155 out_of_bounds
= component
== 3 && primitive_mode
== GL_TRIANGLES
;
162 if (nir_intrinsic_infos
[intr
->intrinsic
].has_dest
) {
163 b
->cursor
= nir_before_instr(&intr
->instr
);
164 nir_ssa_def
*undef
= nir_ssa_undef(b
, 1, 32);
165 nir_ssa_def_rewrite_uses(&intr
->dest
.ssa
, nir_src_for_ssa(undef
));
167 nir_instr_remove(&intr
->instr
);
174 remap_patch_urb_offsets(nir_block
*block
, nir_builder
*b
,
175 const struct brw_vue_map
*vue_map
,
176 GLenum tes_primitive_mode
)
178 const bool is_passthrough_tcs
= b
->shader
->info
.name
&&
179 strcmp(b
->shader
->info
.name
, "passthrough") == 0;
181 nir_foreach_instr_safe(instr
, block
) {
182 if (instr
->type
!= nir_instr_type_intrinsic
)
185 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
187 gl_shader_stage stage
= b
->shader
->stage
;
189 if ((stage
== MESA_SHADER_TESS_CTRL
&& is_output(intrin
)) ||
190 (stage
== MESA_SHADER_TESS_EVAL
&& is_input(intrin
))) {
192 if (!is_passthrough_tcs
&&
193 remap_tess_levels(b
, intrin
, tes_primitive_mode
))
196 int vue_slot
= vue_map
->varying_to_slot
[intrin
->const_index
[0]];
197 assert(vue_slot
!= -1);
198 intrin
->const_index
[0] = vue_slot
;
200 nir_src
*vertex
= nir_get_io_vertex_index_src(intrin
);
202 nir_const_value
*const_vertex
= nir_src_as_const_value(*vertex
);
204 intrin
->const_index
[0] += const_vertex
->u32
[0] *
205 vue_map
->num_per_vertex_slots
;
207 b
->cursor
= nir_before_instr(&intrin
->instr
);
209 /* Multiply by the number of per-vertex slots. */
210 nir_ssa_def
*vertex_offset
=
212 nir_ssa_for_src(b
, *vertex
, 1),
214 vue_map
->num_per_vertex_slots
));
216 /* Add it to the existing offset */
217 nir_src
*offset
= nir_get_io_offset_src(intrin
);
218 nir_ssa_def
*total_offset
=
219 nir_iadd(b
, vertex_offset
,
220 nir_ssa_for_src(b
, *offset
, 1));
222 nir_instr_rewrite_src(&intrin
->instr
, offset
,
223 nir_src_for_ssa(total_offset
));
232 brw_nir_lower_vs_inputs(nir_shader
*nir
,
233 bool use_legacy_snorm_formula
,
234 const uint8_t *vs_attrib_wa_flags
)
236 /* Start with the location of the variable's base. */
237 foreach_list_typed(nir_variable
, var
, node
, &nir
->inputs
) {
238 var
->data
.driver_location
= var
->data
.location
;
241 /* Now use nir_lower_io to walk dereference chains. Attribute arrays are
242 * loaded as one vec4 or dvec4 per element (or matrix column), depending on
243 * whether it is a double-precision type or not.
245 nir_lower_io(nir
, nir_var_shader_in
, type_size_vec4
, 0);
247 /* This pass needs actual constants */
248 nir_opt_constant_folding(nir
);
250 add_const_offset_to_base(nir
, nir_var_shader_in
);
252 brw_nir_apply_attribute_workarounds(nir
, use_legacy_snorm_formula
,
255 /* The last step is to remap VERT_ATTRIB_* to actual registers */
257 /* Whether or not we have any system generated values. gl_DrawID is not
258 * included here as it lives in its own vec4.
260 const bool has_sgvs
=
261 nir
->info
.system_values_read
&
262 (BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX
) |
263 BITFIELD64_BIT(SYSTEM_VALUE_BASE_INSTANCE
) |
264 BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
) |
265 BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID
));
267 const unsigned num_inputs
= _mesa_bitcount_64(nir
->info
.inputs_read
);
269 nir_foreach_function(function
, nir
) {
274 nir_builder_init(&b
, function
->impl
);
276 nir_foreach_block(block
, function
->impl
) {
277 nir_foreach_instr_safe(instr
, block
) {
278 if (instr
->type
!= nir_instr_type_intrinsic
)
281 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
283 switch (intrin
->intrinsic
) {
284 case nir_intrinsic_load_base_vertex
:
285 case nir_intrinsic_load_base_instance
:
286 case nir_intrinsic_load_vertex_id_zero_base
:
287 case nir_intrinsic_load_instance_id
:
288 case nir_intrinsic_load_draw_id
: {
289 b
.cursor
= nir_after_instr(&intrin
->instr
);
291 /* gl_VertexID and friends are stored by the VF as the last
292 * vertex element. We convert them to load_input intrinsics at
293 * the right location.
295 nir_intrinsic_instr
*load
=
296 nir_intrinsic_instr_create(nir
, nir_intrinsic_load_input
);
297 load
->src
[0] = nir_src_for_ssa(nir_imm_int(&b
, 0));
299 nir_intrinsic_set_base(load
, num_inputs
);
300 switch (intrin
->intrinsic
) {
301 case nir_intrinsic_load_base_vertex
:
302 nir_intrinsic_set_component(load
, 0);
304 case nir_intrinsic_load_base_instance
:
305 nir_intrinsic_set_component(load
, 1);
307 case nir_intrinsic_load_vertex_id_zero_base
:
308 nir_intrinsic_set_component(load
, 2);
310 case nir_intrinsic_load_instance_id
:
311 nir_intrinsic_set_component(load
, 3);
313 case nir_intrinsic_load_draw_id
:
314 /* gl_DrawID is stored right after gl_VertexID and friends
315 * if any of them exist.
317 nir_intrinsic_set_base(load
, num_inputs
+ has_sgvs
);
318 nir_intrinsic_set_component(load
, 0);
321 unreachable("Invalid system value intrinsic");
324 load
->num_components
= 1;
325 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 1, 32, NULL
);
326 nir_builder_instr_insert(&b
, &load
->instr
);
328 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
,
329 nir_src_for_ssa(&load
->dest
.ssa
));
330 nir_instr_remove(&intrin
->instr
);
334 case nir_intrinsic_load_input
: {
335 /* Attributes come in a contiguous block, ordered by their
336 * gl_vert_attrib value. That means we can compute the slot
337 * number for an attribute by masking out the enabled attributes
338 * before it and counting the bits.
340 int attr
= nir_intrinsic_base(intrin
);
341 int slot
= _mesa_bitcount_64(nir
->info
.inputs_read
&
342 BITFIELD64_MASK(attr
));
343 nir_intrinsic_set_base(intrin
, slot
);
348 break; /* Nothing to do */
356 brw_nir_lower_vue_inputs(nir_shader
*nir
, bool is_scalar
,
357 const struct brw_vue_map
*vue_map
)
359 foreach_list_typed(nir_variable
, var
, node
, &nir
->inputs
) {
360 var
->data
.driver_location
= var
->data
.location
;
363 /* Inputs are stored in vec4 slots, so use type_size_vec4(). */
364 nir_lower_io(nir
, nir_var_shader_in
, type_size_vec4
, 0);
366 if (is_scalar
|| nir
->stage
!= MESA_SHADER_GEOMETRY
) {
367 /* This pass needs actual constants */
368 nir_opt_constant_folding(nir
);
370 add_const_offset_to_base(nir
, nir_var_shader_in
);
372 nir_foreach_function(function
, nir
) {
373 if (function
->impl
) {
374 nir_foreach_block(block
, function
->impl
) {
375 remap_inputs_with_vue_map(block
, vue_map
);
383 brw_nir_lower_tes_inputs(nir_shader
*nir
, const struct brw_vue_map
*vue_map
)
385 foreach_list_typed(nir_variable
, var
, node
, &nir
->inputs
) {
386 var
->data
.driver_location
= var
->data
.location
;
389 nir_lower_io(nir
, nir_var_shader_in
, type_size_vec4
, 0);
391 /* This pass needs actual constants */
392 nir_opt_constant_folding(nir
);
394 add_const_offset_to_base(nir
, nir_var_shader_in
);
396 nir_foreach_function(function
, nir
) {
397 if (function
->impl
) {
399 nir_builder_init(&b
, function
->impl
);
400 nir_foreach_block(block
, function
->impl
) {
401 remap_patch_urb_offsets(block
, &b
, vue_map
,
402 nir
->info
.tess
.primitive_mode
);
409 brw_nir_lower_fs_inputs(nir_shader
*nir
,
410 const struct gen_device_info
*devinfo
,
411 const struct brw_wm_prog_key
*key
)
413 foreach_list_typed(nir_variable
, var
, node
, &nir
->inputs
) {
414 var
->data
.driver_location
= var
->data
.location
;
416 /* Apply default interpolation mode.
418 * Everything defaults to smooth except for the legacy GL color
419 * built-in variables, which might be flat depending on API state.
421 if (var
->data
.interpolation
== INTERP_MODE_NONE
) {
422 const bool flat
= key
->flat_shade
&&
423 (var
->data
.location
== VARYING_SLOT_COL0
||
424 var
->data
.location
== VARYING_SLOT_COL1
);
426 var
->data
.interpolation
= flat
? INTERP_MODE_FLAT
427 : INTERP_MODE_SMOOTH
;
430 /* On Ironlake and below, there is only one interpolation mode.
431 * Centroid interpolation doesn't mean anything on this hardware --
432 * there is no multisampling.
434 if (devinfo
->gen
< 6) {
435 var
->data
.centroid
= false;
436 var
->data
.sample
= false;
440 nir_lower_io_options lower_io_options
= 0;
441 if (key
->persample_interp
)
442 lower_io_options
|= nir_lower_io_force_sample_interpolation
;
444 nir_lower_io(nir
, nir_var_shader_in
, type_size_vec4
, lower_io_options
);
446 /* This pass needs actual constants */
447 nir_opt_constant_folding(nir
);
449 add_const_offset_to_base(nir
, nir_var_shader_in
);
453 brw_nir_lower_vue_outputs(nir_shader
*nir
,
456 nir_foreach_variable(var
, &nir
->outputs
) {
457 var
->data
.driver_location
= var
->data
.location
;
460 nir_lower_io(nir
, nir_var_shader_out
, type_size_vec4
, 0);
464 brw_nir_lower_tcs_outputs(nir_shader
*nir
, const struct brw_vue_map
*vue_map
,
465 GLenum tes_primitive_mode
)
467 nir_foreach_variable(var
, &nir
->outputs
) {
468 var
->data
.driver_location
= var
->data
.location
;
471 nir_lower_io(nir
, nir_var_shader_out
, type_size_vec4
, 0);
473 /* This pass needs actual constants */
474 nir_opt_constant_folding(nir
);
476 add_const_offset_to_base(nir
, nir_var_shader_out
);
478 nir_foreach_function(function
, nir
) {
479 if (function
->impl
) {
481 nir_builder_init(&b
, function
->impl
);
482 nir_foreach_block(block
, function
->impl
) {
483 remap_patch_urb_offsets(block
, &b
, vue_map
, tes_primitive_mode
);
490 brw_nir_lower_fs_outputs(nir_shader
*nir
)
492 nir_foreach_variable(var
, &nir
->outputs
) {
493 var
->data
.driver_location
=
494 SET_FIELD(var
->data
.index
, BRW_NIR_FRAG_OUTPUT_INDEX
) |
495 SET_FIELD(var
->data
.location
, BRW_NIR_FRAG_OUTPUT_LOCATION
);
498 nir_lower_io(nir
, nir_var_shader_out
, type_size_dvec4
, 0);
502 brw_nir_lower_cs_shared(nir_shader
*nir
)
504 nir_assign_var_locations(&nir
->shared
, &nir
->num_shared
,
505 type_size_scalar_bytes
);
506 nir_lower_io(nir
, nir_var_shared
, type_size_scalar_bytes
, 0);
509 #define OPT(pass, ...) ({ \
510 bool this_progress = false; \
511 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
518 nir_optimize(nir_shader
*nir
, const struct brw_compiler
*compiler
,
521 nir_variable_mode indirect_mask
= 0;
522 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectInput
)
523 indirect_mask
|= nir_var_shader_in
;
524 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectOutput
)
525 indirect_mask
|= nir_var_shader_out
;
526 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectTemp
)
527 indirect_mask
|= nir_var_local
;
532 OPT(nir_lower_vars_to_ssa
);
533 OPT(nir_opt_copy_prop_vars
);
536 OPT(nir_lower_alu_to_scalar
);
542 OPT(nir_lower_phis_to_scalar
);
548 OPT(nir_opt_peephole_select
, 0);
549 OPT(nir_opt_algebraic
);
550 OPT(nir_opt_constant_folding
);
551 OPT(nir_opt_dead_cf
);
552 if (OPT(nir_opt_trivial_continues
)) {
553 /* If nir_opt_trivial_continues makes progress, then we need to clean
554 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
561 if (nir
->options
->max_unroll_iterations
!= 0) {
562 OPT(nir_opt_loop_unroll
, indirect_mask
);
564 OPT(nir_opt_remove_phis
);
566 OPT(nir_lower_doubles
, nir_lower_drcp
|
573 nir_lower_dround_even
|
575 OPT(nir_lower_64bit_pack
);
581 /* Does some simple lowering and runs the standard suite of optimizations
583 * This is intended to be called more-or-less directly after you get the
584 * shader out of GLSL or some other source. While it is geared towards i965,
585 * it is not at all generator-specific except for the is_scalar flag. Even
586 * there, it is safe to call with is_scalar = false for a shader that is
587 * intended for the FS backend as long as nir_optimize is called again with
588 * is_scalar = true to scalarize everything prior to code gen.
591 brw_preprocess_nir(const struct brw_compiler
*compiler
, nir_shader
*nir
)
593 const struct gen_device_info
*devinfo
= compiler
->devinfo
;
594 UNUSED
bool progress
; /* Written by OPT */
596 const bool is_scalar
= compiler
->scalar_stage
[nir
->stage
];
598 if (nir
->stage
== MESA_SHADER_GEOMETRY
)
599 OPT(nir_lower_gs_intrinsics
);
601 /* See also brw_nir_trig_workarounds.py */
602 if (compiler
->precise_trig
&&
603 !(devinfo
->gen
>= 10 || devinfo
->is_kabylake
))
604 OPT(brw_nir_apply_trig_workarounds
);
606 static const nir_lower_tex_options tex_options
= {
608 .lower_txf_offset
= true,
609 .lower_rect_offset
= true,
610 .lower_txd_cube_map
= true,
613 OPT(nir_lower_tex
, &tex_options
);
614 OPT(nir_normalize_cubemap_coords
);
616 OPT(nir_lower_global_vars_to_local
);
618 OPT(nir_split_var_copies
);
620 nir
= nir_optimize(nir
, compiler
, is_scalar
);
623 OPT(nir_lower_load_const_to_scalar
);
626 /* Lower a bunch of stuff */
627 OPT(nir_lower_var_copies
);
629 OPT(nir_lower_clip_cull_distance_arrays
);
631 nir_variable_mode indirect_mask
= 0;
632 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectInput
)
633 indirect_mask
|= nir_var_shader_in
;
634 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectOutput
)
635 indirect_mask
|= nir_var_shader_out
;
636 if (compiler
->glsl_compiler_options
[nir
->stage
].EmitNoIndirectTemp
)
637 indirect_mask
|= nir_var_local
;
639 nir_lower_indirect_derefs(nir
, indirect_mask
);
641 nir_lower_int64(nir
, nir_lower_imul64
|
645 /* Get rid of split copies */
646 nir
= nir_optimize(nir
, compiler
, is_scalar
);
648 OPT(nir_remove_dead_variables
, nir_var_local
);
653 /* Prepare the given shader for codegen
655 * This function is intended to be called right before going into the actual
656 * backend and is highly backend-specific. Also, once this function has been
657 * called on a shader, it will no longer be in SSA form so most optimizations
661 brw_postprocess_nir(nir_shader
*nir
, const struct brw_compiler
*compiler
,
664 const struct gen_device_info
*devinfo
= compiler
->devinfo
;
666 (INTEL_DEBUG
& intel_debug_flag_for_shader_stage(nir
->stage
));
668 UNUSED
bool progress
; /* Written by OPT */
673 OPT(nir_opt_algebraic_before_ffma
);
676 nir
= nir_optimize(nir
, compiler
, is_scalar
);
678 if (devinfo
->gen
>= 6) {
679 /* Try and fuse multiply-adds */
680 OPT(brw_nir_opt_peephole_ffma
);
683 OPT(nir_opt_algebraic_late
);
685 OPT(nir_lower_to_source_mods
);
688 OPT(nir_opt_move_comparisons
);
690 OPT(nir_lower_locals_to_regs
);
692 if (unlikely(debug_enabled
)) {
693 /* Re-index SSA defs so we print more sensible numbers. */
694 nir_foreach_function(function
, nir
) {
696 nir_index_ssa_defs(function
->impl
);
699 fprintf(stderr
, "NIR (SSA form) for %s shader:\n",
700 _mesa_shader_stage_to_string(nir
->stage
));
701 nir_print_shader(nir
, stderr
);
704 OPT(nir_convert_from_ssa
, true);
707 OPT(nir_move_vec_src_uses_to_dest
);
708 OPT(nir_lower_vec_to_movs
);
711 /* This is the last pass we run before we start emitting stuff. It
712 * determines when we need to insert boolean resolves on Gen <= 5. We
713 * run it last because it stashes data in instr->pass_flags and we don't
714 * want that to be squashed by other NIR passes.
716 if (devinfo
->gen
<= 5)
717 brw_nir_analyze_boolean_resolves(nir
);
721 if (unlikely(debug_enabled
)) {
722 fprintf(stderr
, "NIR (final form) for %s shader:\n",
723 _mesa_shader_stage_to_string(nir
->stage
));
724 nir_print_shader(nir
, stderr
);
731 brw_nir_apply_sampler_key(nir_shader
*nir
,
732 const struct brw_compiler
*compiler
,
733 const struct brw_sampler_prog_key_data
*key_tex
,
736 const struct gen_device_info
*devinfo
= compiler
->devinfo
;
737 nir_lower_tex_options tex_options
= { 0 };
739 /* Iron Lake and prior require lowering of all rectangle textures */
740 if (devinfo
->gen
< 6)
741 tex_options
.lower_rect
= true;
743 /* Prior to Broadwell, our hardware can't actually do GL_CLAMP */
744 if (devinfo
->gen
< 8) {
745 tex_options
.saturate_s
= key_tex
->gl_clamp_mask
[0];
746 tex_options
.saturate_t
= key_tex
->gl_clamp_mask
[1];
747 tex_options
.saturate_r
= key_tex
->gl_clamp_mask
[2];
750 /* Prior to Haswell, we have to fake texture swizzle */
751 for (unsigned s
= 0; s
< MAX_SAMPLERS
; s
++) {
752 if (key_tex
->swizzles
[s
] == SWIZZLE_NOOP
)
755 tex_options
.swizzle_result
|= (1 << s
);
756 for (unsigned c
= 0; c
< 4; c
++)
757 tex_options
.swizzles
[s
][c
] = GET_SWZ(key_tex
->swizzles
[s
], c
);
760 /* Prior to Haswell, we have to lower gradients on shadow samplers */
761 tex_options
.lower_txd_shadow
= devinfo
->gen
< 8 && !devinfo
->is_haswell
;
763 tex_options
.lower_y_uv_external
= key_tex
->y_uv_image_mask
;
764 tex_options
.lower_y_u_v_external
= key_tex
->y_u_v_image_mask
;
765 tex_options
.lower_yx_xuxv_external
= key_tex
->yx_xuxv_image_mask
;
767 if (nir_lower_tex(nir
, &tex_options
)) {
768 nir_validate_shader(nir
);
769 nir
= nir_optimize(nir
, compiler
, is_scalar
);
776 brw_type_for_nir_type(const struct gen_device_info
*devinfo
, nir_alu_type type
)
780 case nir_type_uint32
:
781 return BRW_REGISTER_TYPE_UD
;
784 case nir_type_bool32
:
786 return BRW_REGISTER_TYPE_D
;
788 case nir_type_float32
:
789 return BRW_REGISTER_TYPE_F
;
790 case nir_type_float64
:
791 return BRW_REGISTER_TYPE_DF
;
793 return devinfo
->gen
< 8 ? BRW_REGISTER_TYPE_DF
: BRW_REGISTER_TYPE_Q
;
794 case nir_type_uint64
:
795 return devinfo
->gen
< 8 ? BRW_REGISTER_TYPE_DF
: BRW_REGISTER_TYPE_UQ
;
797 unreachable("unknown type");
800 return BRW_REGISTER_TYPE_F
;
803 /* Returns the glsl_base_type corresponding to a nir_alu_type.
804 * This is used by both brw_vec4_nir and brw_fs_nir.
807 brw_glsl_base_type_for_nir_type(nir_alu_type type
)
811 case nir_type_float32
:
812 return GLSL_TYPE_FLOAT
;
814 case nir_type_float64
:
815 return GLSL_TYPE_DOUBLE
;
819 return GLSL_TYPE_INT
;
822 case nir_type_uint32
:
823 return GLSL_TYPE_UINT
;
826 unreachable("bad type");