src/intel/compiler/brw_vec4_cmod_propagation.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 /** @file brw_vec4_cmod_propagation.cpp
  26  *
  27  * Really similar to brw_fs_cmod_propagation but adapted to vec4 needs. Check
  28  * brw_fs_cmod_propagation for further details on the rationale behind this
  29  * optimization.
  30  */
  31
  32 #include "brw_vec4.h"
  33 #include "brw_cfg.h"
  34 #include "brw_eu.h"
  35
  36 namespace brw {
  37
  38 static bool
  39 opt_cmod_propagation_local(bblock_t *block)
  40 {
  41    bool progress = false;
  42    int ip = block->end_ip + 1;
  43
  44    foreach_inst_in_block_reverse_safe(vec4_instruction, inst, block) {
  45       ip--;
  46
  47       if ((inst->opcode != BRW_OPCODE_AND &&
  48            inst->opcode != BRW_OPCODE_CMP &&
  49            inst->opcode != BRW_OPCODE_MOV) ||
  50           inst->predicate != BRW_PREDICATE_NONE ||
  51           !inst->dst.is_null() ||
  52           (inst->src[0].file != VGRF && inst->src[0].file != ATTR &&
  53            inst->src[0].file != UNIFORM) ||
  54           inst->src[0].abs)
  55          continue;
  56
  57       if (inst->opcode == BRW_OPCODE_AND &&
  58           !(inst->src[1].is_one() &&
  59             inst->conditional_mod == BRW_CONDITIONAL_NZ &&
  60             !inst->src[0].negate))
  61          continue;
  62
  63       if (inst->opcode == BRW_OPCODE_CMP && !inst->src[1].is_zero())
  64          continue;
  65
  66       if (inst->opcode == BRW_OPCODE_MOV &&
  67           inst->conditional_mod != BRW_CONDITIONAL_NZ)
  68          continue;
  69
  70       bool read_flag = false;
  71       foreach_inst_in_block_reverse_starting_from(vec4_instruction, scan_inst, inst) {
  72          if (regions_overlap(inst->src[0], inst->size_read(0),
  73                              scan_inst->dst, scan_inst->size_written)) {
  74             if ((scan_inst->predicate && scan_inst->opcode != BRW_OPCODE_SEL) ||
  75                 scan_inst->dst.offset != inst->src[0].offset ||
  76                 (scan_inst->dst.writemask != WRITEMASK_X &&
  77                  scan_inst->dst.writemask != WRITEMASK_XYZW) ||
  78                 (scan_inst->dst.writemask == WRITEMASK_XYZW &&
  79                  inst->src[0].swizzle != BRW_SWIZZLE_XYZW) ||
  80                 (inst->dst.writemask & ~scan_inst->dst.writemask) != 0 ||
  81                 scan_inst->exec_size != inst->exec_size ||
  82                 scan_inst->group != inst->group) {
  83                break;
  84             }
  85
  86             /* CMP's result is the same regardless of dest type. */
  87             if (inst->conditional_mod == BRW_CONDITIONAL_NZ &&
  88                 scan_inst->opcode == BRW_OPCODE_CMP &&
  89                 (inst->dst.type == BRW_REGISTER_TYPE_D ||
  90                  inst->dst.type == BRW_REGISTER_TYPE_UD)) {
  91                inst->remove(block);
  92                progress = true;
  93                break;
  94             }
  95
  96             /* If the AND wasn't handled by the previous case, it isn't safe
  97              * to remove it.
  98              */
  99             if (inst->opcode == BRW_OPCODE_AND)
 100                break;
 101
 102             /* Comparisons operate differently for ints and floats */
 103             if (scan_inst->dst.type != inst->dst.type &&
 104                 (scan_inst->dst.type == BRW_REGISTER_TYPE_F ||
 105                  inst->dst.type == BRW_REGISTER_TYPE_F))
 106                break;
 107
 108             /* If the instruction generating inst's source also wrote the
 109              * flag, and inst is doing a simple .nz comparison, then inst
 110              * is redundant - the appropriate value is already in the flag
 111              * register.  Delete inst.
 112              */
 113             if (inst->conditional_mod == BRW_CONDITIONAL_NZ &&
 114                 !inst->src[0].negate &&
 115                 scan_inst->writes_flag()) {
 116                inst->remove(block);
 117                progress = true;
 118                break;
 119             }
 120
 121             /* The conditional mod of the CMP/CMPN instructions behaves
 122              * specially because the flag output is not calculated from the
 123              * result of the instruction, but the other way around, which
 124              * means that even if the condmod to propagate and the condmod
 125              * from the CMP instruction are the same they will in general give
 126              * different results because they are evaluated based on different
 127              * inputs.
 128              */
 129             if (scan_inst->opcode == BRW_OPCODE_CMP ||
 130                 scan_inst->opcode == BRW_OPCODE_CMPN)
 131                break;
 132
 133             /* From the Sky Lake PRM Vol. 7 "Assigning Conditional Mods":
 134              *
 135              *    * Note that the [post condition signal] bits generated at
 136              *      the output of a compute are before the .sat.
 137              */
 138             if (scan_inst->saturate)
 139                break;
 140
 141             /* From the Sky Lake PRM, Vol 2a, "Multiply":
 142              *
 143              *    "When multiplying integer data types, if one of the sources
 144              *    is a DW, the resulting full precision data is stored in
 145              *    the accumulator. However, if the destination data type is
 146              *    either W or DW, the low bits of the result are written to
 147              *    the destination register and the remaining high bits are
 148              *    discarded. This results in undefined Overflow and Sign
 149              *    flags. Therefore, conditional modifiers and saturation
 150              *    (.sat) cannot be used in this case.
 151              *
 152              * We just disallow cmod propagation on all integer multiplies.
 153              */
 154             if (!brw_reg_type_is_floating_point(scan_inst->dst.type) &&
 155                 scan_inst->opcode == BRW_OPCODE_MUL)
 156                break;
 157
 158             /* Otherwise, try propagating the conditional. */
 159             enum brw_conditional_mod cond =
 160                inst->src[0].negate ? brw_swap_cmod(inst->conditional_mod)
 161                                    : inst->conditional_mod;
 162
 163             if (scan_inst->can_do_cmod() &&
 164                 ((!read_flag && scan_inst->conditional_mod == BRW_CONDITIONAL_NONE) ||
 165                  scan_inst->conditional_mod == cond)) {
 166                scan_inst->conditional_mod = cond;
 167                inst->remove(block);
 168                progress = true;
 169             }
 170             break;
 171          }
 172
 173          if (scan_inst->writes_flag())
 174             break;
 175
 176          read_flag = read_flag || scan_inst->reads_flag();
 177       }
 178    }
 179
 180    return progress;
 181 }
 182
 183 bool
 184 vec4_visitor::opt_cmod_propagation()
 185 {
 186    bool progress = false;
 187
 188    foreach_block_reverse(block, cfg) {
 189       progress = opt_cmod_propagation_local(block) || progress;
 190    }
 191
 192    if (progress)
 193       invalidate_live_intervals();
 194
 195    return progress;
 196 }
 197
 198 } /* namespace brw */