src/intel/compiler/brw_vec4_live_variables.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #ifndef BRW_VEC4_LIVE_VARIABLES_H
  29 #define BRW_VEC4_LIVE_VARIABLES_H
  30
  31 #include "brw_ir_vec4.h"
  32 #include "util/bitset.h"
  33
  34 struct backend_shader;
  35
  36 namespace brw {
  37
  38 class vec4_live_variables {
  39 public:
  40    struct block_data {
  41       /**
  42        * Which variables are defined before being used in the block.
  43        *
  44        * Note that for our purposes, "defined" means unconditionally, completely
  45        * defined.
  46        */
  47       BITSET_WORD *def;
  48
  49       /**
  50        * Which variables are used before being defined in the block.
  51        */
  52       BITSET_WORD *use;
  53
  54       /** Which defs reach the entry point of the block. */
  55       BITSET_WORD *livein;
  56
  57       /** Which defs reach the exit point of the block. */
  58       BITSET_WORD *liveout;
  59
  60       BITSET_WORD flag_def[1];
  61       BITSET_WORD flag_use[1];
  62       BITSET_WORD flag_livein[1];
  63       BITSET_WORD flag_liveout[1];
  64    };
  65
  66    DECLARE_RALLOC_CXX_OPERATORS(vec4_live_variables)
  67
  68    vec4_live_variables(const backend_shader *s);
  69    ~vec4_live_variables();
  70
  71    bool
  72    validate(const backend_shader *s) const;
  73
  74    int num_vars;
  75    int bitset_words;
  76
  77    /** Per-basic-block information on live variables */
  78    struct block_data *block_data;
  79
  80    /** @{
  81     * Final computed live ranges for each variable.
  82     */
  83    int *start;
  84    int *end;
  85    /** @} */
  86
  87    int var_range_start(unsigned v, unsigned n) const;
  88    int var_range_end(unsigned v, unsigned n) const;
  89    bool vgrfs_interfere(int a, int b) const;
  90
  91 protected:
  92    void setup_def_use();
  93    void compute_live_variables();
  94    void compute_start_end();
  95
  96    const simple_allocator &alloc;
  97    cfg_t *cfg;
  98    void *mem_ctx;
  99 };
 100
 101 /* Returns the variable index for the k-th dword of the c-th component of
 102  * register reg.
 103  */
 104 inline unsigned
 105 var_from_reg(const simple_allocator &alloc, const src_reg &reg,
 106              unsigned c = 0, unsigned k = 0)
 107 {
 108    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
 109    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
 110    unsigned result =
 111       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
 112       (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize;
 113    /* Do not exceed the limit for this register */
 114    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
 115    return result;
 116 }
 117
 118 inline unsigned
 119 var_from_reg(const simple_allocator &alloc, const dst_reg &reg,
 120              unsigned c = 0, unsigned k = 0)
 121 {
 122    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
 123    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
 124    unsigned result =
 125       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
 126       (c + k / csize * 4) * csize + k % csize;
 127    /* Do not exceed the limit for this register */
 128    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
 129    return result;
 130 }
 131
 132 } /* namespace brw */
 133
 134 #endif /* BRW_VEC4_LIVE_VARIABLES_H */