2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include <gtest/gtest.h>
27 #include "program/program.h"
31 class cmod_propagation_test
: public ::testing::Test
{
35 struct brw_compiler
*compiler
;
36 struct gen_device_info
*devinfo
;
37 struct gl_context
*ctx
;
38 struct brw_wm_prog_data
*prog_data
;
39 struct gl_shader_program
*shader_prog
;
42 void test_positive_float_saturate_prop(enum brw_conditional_mod before
,
43 enum brw_conditional_mod after
,
46 void test_negative_float_saturate_prop(enum brw_conditional_mod before
,
49 void test_negative_int_saturate_prop(enum brw_conditional_mod before
,
53 class cmod_propagation_fs_visitor
: public fs_visitor
56 cmod_propagation_fs_visitor(struct brw_compiler
*compiler
,
57 struct brw_wm_prog_data
*prog_data
,
59 : fs_visitor(compiler
, NULL
, NULL
, NULL
,
60 &prog_data
->base
, shader
, 8, -1) {}
64 void cmod_propagation_test::SetUp()
66 ctx
= (struct gl_context
*)calloc(1, sizeof(*ctx
));
67 compiler
= (struct brw_compiler
*)calloc(1, sizeof(*compiler
));
68 devinfo
= (struct gen_device_info
*)calloc(1, sizeof(*devinfo
));
69 compiler
->devinfo
= devinfo
;
71 prog_data
= ralloc(NULL
, struct brw_wm_prog_data
);
73 nir_shader_create(NULL
, MESA_SHADER_FRAGMENT
, NULL
, NULL
);
75 v
= new cmod_propagation_fs_visitor(compiler
, prog_data
, shader
);
81 instruction(bblock_t
*block
, int num
)
83 fs_inst
*inst
= (fs_inst
*)block
->start();
84 for (int i
= 0; i
< num
; i
++) {
85 inst
= (fs_inst
*)inst
->next
;
91 cmod_propagation(fs_visitor
*v
)
93 const bool print
= getenv("TEST_DEBUG");
96 fprintf(stderr
, "= Before =\n");
100 bool ret
= v
->opt_cmod_propagation();
103 fprintf(stderr
, "\n= After =\n");
110 TEST_F(cmod_propagation_test
, basic
)
112 const fs_builder
&bld
= v
->bld
;
113 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
114 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
115 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
116 fs_reg
zero(brw_imm_f(0.0f
));
117 bld
.ADD(dest
, src0
, src1
);
118 bld
.CMP(bld
.null_reg_f(), dest
, zero
, BRW_CONDITIONAL_GE
);
122 * 0: add(8) dest src0 src1
123 * 1: cmp.ge.f0(8) null dest 0.0f
126 * 0: add.ge.f0(8) dest src0 src1
130 bblock_t
*block0
= v
->cfg
->blocks
[0];
132 EXPECT_EQ(0, block0
->start_ip
);
133 EXPECT_EQ(1, block0
->end_ip
);
135 EXPECT_TRUE(cmod_propagation(v
));
136 EXPECT_EQ(0, block0
->start_ip
);
137 EXPECT_EQ(0, block0
->end_ip
);
138 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
139 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
142 TEST_F(cmod_propagation_test
, basic_other_flag
)
144 const fs_builder
&bld
= v
->bld
;
145 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
146 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
147 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
148 fs_reg
zero(brw_imm_f(0.0f
));
149 bld
.ADD(dest
, src0
, src1
);
150 bld
.CMP(bld
.null_reg_f(), dest
, zero
, BRW_CONDITIONAL_GE
)
155 * 0: add(8) dest src0 src1
156 * 1: cmp.ge.f0.1(8) null dest 0.0f
159 * 0: add.ge.f0.1(8) dest src0 src1
163 bblock_t
*block0
= v
->cfg
->blocks
[0];
165 EXPECT_EQ(0, block0
->start_ip
);
166 EXPECT_EQ(1, block0
->end_ip
);
168 EXPECT_TRUE(cmod_propagation(v
));
169 EXPECT_EQ(0, block0
->start_ip
);
170 EXPECT_EQ(0, block0
->end_ip
);
171 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
172 EXPECT_EQ(1, instruction(block0
, 0)->flag_subreg
);
173 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
176 TEST_F(cmod_propagation_test
, cmp_nonzero
)
178 const fs_builder
&bld
= v
->bld
;
179 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
180 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
181 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
182 fs_reg
nonzero(brw_imm_f(1.0f
));
183 bld
.ADD(dest
, src0
, src1
);
184 bld
.CMP(bld
.null_reg_f(), dest
, nonzero
, BRW_CONDITIONAL_GE
);
188 * 0: add(8) dest src0 src1
189 * 1: cmp.ge.f0(8) null dest 1.0f
196 bblock_t
*block0
= v
->cfg
->blocks
[0];
198 EXPECT_EQ(0, block0
->start_ip
);
199 EXPECT_EQ(1, block0
->end_ip
);
201 EXPECT_FALSE(cmod_propagation(v
));
202 EXPECT_EQ(0, block0
->start_ip
);
203 EXPECT_EQ(1, block0
->end_ip
);
204 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
205 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
206 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 1)->conditional_mod
);
209 TEST_F(cmod_propagation_test
, non_cmod_instruction
)
211 const fs_builder
&bld
= v
->bld
;
212 fs_reg dest
= v
->vgrf(glsl_type::uint_type
);
213 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
214 fs_reg
zero(brw_imm_ud(0u));
216 bld
.CMP(bld
.null_reg_ud(), dest
, zero
, BRW_CONDITIONAL_GE
);
220 * 0: fbl(8) dest src0
221 * 1: cmp.ge.f0(8) null dest 0u
228 bblock_t
*block0
= v
->cfg
->blocks
[0];
230 EXPECT_EQ(0, block0
->start_ip
);
231 EXPECT_EQ(1, block0
->end_ip
);
233 EXPECT_FALSE(cmod_propagation(v
));
234 EXPECT_EQ(0, block0
->start_ip
);
235 EXPECT_EQ(1, block0
->end_ip
);
236 EXPECT_EQ(BRW_OPCODE_FBL
, instruction(block0
, 0)->opcode
);
237 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
238 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 1)->conditional_mod
);
241 TEST_F(cmod_propagation_test
, intervening_flag_write
)
243 const fs_builder
&bld
= v
->bld
;
244 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
245 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
246 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
247 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
248 fs_reg
zero(brw_imm_f(0.0f
));
249 bld
.ADD(dest
, src0
, src1
);
250 bld
.CMP(bld
.null_reg_f(), src2
, zero
, BRW_CONDITIONAL_GE
);
251 bld
.CMP(bld
.null_reg_f(), dest
, zero
, BRW_CONDITIONAL_GE
);
255 * 0: add(8) dest src0 src1
256 * 1: cmp.ge.f0(8) null src2 0.0f
257 * 2: cmp.ge.f0(8) null dest 0.0f
264 bblock_t
*block0
= v
->cfg
->blocks
[0];
266 EXPECT_EQ(0, block0
->start_ip
);
267 EXPECT_EQ(2, block0
->end_ip
);
269 EXPECT_FALSE(cmod_propagation(v
));
270 EXPECT_EQ(0, block0
->start_ip
);
271 EXPECT_EQ(2, block0
->end_ip
);
272 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
273 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
274 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 1)->conditional_mod
);
275 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
276 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 2)->conditional_mod
);
279 TEST_F(cmod_propagation_test
, intervening_mismatch_flag_write
)
281 const fs_builder
&bld
= v
->bld
;
282 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
283 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
284 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
285 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
286 fs_reg
zero(brw_imm_f(0.0f
));
287 bld
.ADD(dest
, src0
, src1
);
288 bld
.CMP(bld
.null_reg_f(), src2
, zero
, BRW_CONDITIONAL_GE
)
290 bld
.CMP(bld
.null_reg_f(), dest
, zero
, BRW_CONDITIONAL_GE
);
294 * 0: add(8) dest src0 src1
295 * 1: cmp.ge.f0.1(8) null src2 0.0f
296 * 2: cmp.ge.f0(8) null dest 0.0f
299 * 0: add.ge.f0(8) dest src0 src1
300 * 1: cmp.ge.f0.1(8) null src2 0.0f
304 bblock_t
*block0
= v
->cfg
->blocks
[0];
306 EXPECT_EQ(0, block0
->start_ip
);
307 EXPECT_EQ(2, block0
->end_ip
);
309 EXPECT_TRUE(cmod_propagation(v
));
310 EXPECT_EQ(0, block0
->start_ip
);
311 EXPECT_EQ(1, block0
->end_ip
);
312 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
313 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
314 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
315 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
316 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 1)->conditional_mod
);
317 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
320 TEST_F(cmod_propagation_test
, intervening_flag_read
)
322 const fs_builder
&bld
= v
->bld
;
323 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
324 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
325 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
326 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
327 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
328 fs_reg
zero(brw_imm_f(0.0f
));
329 bld
.ADD(dest0
, src0
, src1
);
330 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
));
331 bld
.CMP(bld
.null_reg_f(), dest0
, zero
, BRW_CONDITIONAL_GE
);
335 * 0: add(8) dest0 src0 src1
336 * 1: (+f0) sel(8) dest1 src2 0.0f
337 * 2: cmp.ge.f0(8) null dest0 0.0f
344 bblock_t
*block0
= v
->cfg
->blocks
[0];
346 EXPECT_EQ(0, block0
->start_ip
);
347 EXPECT_EQ(2, block0
->end_ip
);
349 EXPECT_FALSE(cmod_propagation(v
));
350 EXPECT_EQ(0, block0
->start_ip
);
351 EXPECT_EQ(2, block0
->end_ip
);
352 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
353 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
354 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
355 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
356 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 2)->conditional_mod
);
359 TEST_F(cmod_propagation_test
, intervening_mismatch_flag_read
)
361 const fs_builder
&bld
= v
->bld
;
362 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
363 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
364 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
365 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
366 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
367 fs_reg
zero(brw_imm_f(0.0f
));
368 bld
.ADD(dest0
, src0
, src1
);
369 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
))
371 bld
.CMP(bld
.null_reg_f(), dest0
, zero
, BRW_CONDITIONAL_GE
);
375 * 0: add(8) dest0 src0 src1
376 * 1: (+f0.1) sel(8) dest1 src2 0.0f
377 * 2: cmp.ge.f0(8) null dest0 0.0f
380 * 0: add.ge.f0(8) dest0 src0 src1
381 * 1: (+f0.1) sel(8) dest1 src2 0.0f
385 bblock_t
*block0
= v
->cfg
->blocks
[0];
387 EXPECT_EQ(0, block0
->start_ip
);
388 EXPECT_EQ(2, block0
->end_ip
);
390 EXPECT_TRUE(cmod_propagation(v
));
391 EXPECT_EQ(0, block0
->start_ip
);
392 EXPECT_EQ(1, block0
->end_ip
);
393 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
394 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
395 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
396 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
397 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
398 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
401 TEST_F(cmod_propagation_test
, intervening_dest_write
)
403 const fs_builder
&bld
= v
->bld
;
404 fs_reg dest
= v
->vgrf(glsl_type::vec4_type
);
405 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
406 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
407 fs_reg src2
= v
->vgrf(glsl_type::vec2_type
);
408 fs_reg
zero(brw_imm_f(0.0f
));
409 bld
.ADD(offset(dest
, bld
, 2), src0
, src1
);
410 bld
.emit(SHADER_OPCODE_TEX
, dest
, src2
)
411 ->size_written
= 4 * REG_SIZE
;
412 bld
.CMP(bld
.null_reg_f(), offset(dest
, bld
, 2), zero
, BRW_CONDITIONAL_GE
);
416 * 0: add(8) dest+2 src0 src1
417 * 1: tex(8) rlen 4 dest+0 src2
418 * 2: cmp.ge.f0(8) null dest+2 0.0f
425 bblock_t
*block0
= v
->cfg
->blocks
[0];
427 EXPECT_EQ(0, block0
->start_ip
);
428 EXPECT_EQ(2, block0
->end_ip
);
430 EXPECT_FALSE(cmod_propagation(v
));
431 EXPECT_EQ(0, block0
->start_ip
);
432 EXPECT_EQ(2, block0
->end_ip
);
433 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
434 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
435 EXPECT_EQ(SHADER_OPCODE_TEX
, instruction(block0
, 1)->opcode
);
436 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
437 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
438 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 2)->conditional_mod
);
441 TEST_F(cmod_propagation_test
, intervening_flag_read_same_value
)
443 const fs_builder
&bld
= v
->bld
;
444 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
445 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
446 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
447 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
448 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
449 fs_reg
zero(brw_imm_f(0.0f
));
450 set_condmod(BRW_CONDITIONAL_GE
, bld
.ADD(dest0
, src0
, src1
));
451 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
));
452 bld
.CMP(bld
.null_reg_f(), dest0
, zero
, BRW_CONDITIONAL_GE
);
456 * 0: add.ge.f0(8) dest0 src0 src1
457 * 1: (+f0) sel(8) dest1 src2 0.0f
458 * 2: cmp.ge.f0(8) null dest0 0.0f
461 * 0: add.ge.f0(8) dest0 src0 src1
462 * 1: (+f0) sel(8) dest1 src2 0.0f
466 bblock_t
*block0
= v
->cfg
->blocks
[0];
468 EXPECT_EQ(0, block0
->start_ip
);
469 EXPECT_EQ(2, block0
->end_ip
);
471 EXPECT_TRUE(cmod_propagation(v
));
472 EXPECT_EQ(0, block0
->start_ip
);
473 EXPECT_EQ(1, block0
->end_ip
);
474 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
475 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
476 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
477 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
480 TEST_F(cmod_propagation_test
, negate
)
482 const fs_builder
&bld
= v
->bld
;
483 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
484 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
485 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
486 fs_reg
zero(brw_imm_f(0.0f
));
487 bld
.ADD(dest
, src0
, src1
);
489 bld
.CMP(bld
.null_reg_f(), dest
, zero
, BRW_CONDITIONAL_GE
);
493 * 0: add(8) dest src0 src1
494 * 1: cmp.ge.f0(8) null -dest 0.0f
497 * 0: add.le.f0(8) dest src0 src1
501 bblock_t
*block0
= v
->cfg
->blocks
[0];
503 EXPECT_EQ(0, block0
->start_ip
);
504 EXPECT_EQ(1, block0
->end_ip
);
506 EXPECT_TRUE(cmod_propagation(v
));
507 EXPECT_EQ(0, block0
->start_ip
);
508 EXPECT_EQ(0, block0
->end_ip
);
509 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
510 EXPECT_EQ(BRW_CONDITIONAL_LE
, instruction(block0
, 0)->conditional_mod
);
513 TEST_F(cmod_propagation_test
, movnz
)
515 const fs_builder
&bld
= v
->bld
;
516 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
517 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
518 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
519 bld
.CMP(dest
, src0
, src1
, BRW_CONDITIONAL_GE
);
520 set_condmod(BRW_CONDITIONAL_NZ
,
521 bld
.MOV(bld
.null_reg_f(), dest
));
525 * 0: cmp.ge.f0(8) dest src0 src1
526 * 1: mov.nz.f0(8) null dest
529 * 0: cmp.ge.f0(8) dest src0 src1
533 bblock_t
*block0
= v
->cfg
->blocks
[0];
535 EXPECT_EQ(0, block0
->start_ip
);
536 EXPECT_EQ(1, block0
->end_ip
);
538 EXPECT_TRUE(cmod_propagation(v
));
539 EXPECT_EQ(0, block0
->start_ip
);
540 EXPECT_EQ(0, block0
->end_ip
);
541 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
542 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 0)->conditional_mod
);
545 TEST_F(cmod_propagation_test
, different_types_cmod_with_zero
)
547 const fs_builder
&bld
= v
->bld
;
548 fs_reg dest
= v
->vgrf(glsl_type::int_type
);
549 fs_reg src0
= v
->vgrf(glsl_type::int_type
);
550 fs_reg src1
= v
->vgrf(glsl_type::int_type
);
551 fs_reg
zero(brw_imm_f(0.0f
));
552 bld
.ADD(dest
, src0
, src1
);
553 bld
.CMP(bld
.null_reg_f(), retype(dest
, BRW_REGISTER_TYPE_F
), zero
,
558 * 0: add(8) dest:D src0:D src1:D
559 * 1: cmp.ge.f0(8) null:F dest:F 0.0f
566 bblock_t
*block0
= v
->cfg
->blocks
[0];
568 EXPECT_EQ(0, block0
->start_ip
);
569 EXPECT_EQ(1, block0
->end_ip
);
571 EXPECT_FALSE(cmod_propagation(v
));
572 EXPECT_EQ(0, block0
->start_ip
);
573 EXPECT_EQ(1, block0
->end_ip
);
574 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
575 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
576 EXPECT_EQ(BRW_CONDITIONAL_GE
, instruction(block0
, 1)->conditional_mod
);
579 TEST_F(cmod_propagation_test
, andnz_one
)
581 const fs_builder
&bld
= v
->bld
;
582 fs_reg dest
= v
->vgrf(glsl_type::int_type
);
583 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
584 fs_reg
zero(brw_imm_f(0.0f
));
585 fs_reg
one(brw_imm_d(1));
587 bld
.CMP(retype(dest
, BRW_REGISTER_TYPE_F
), src0
, zero
, BRW_CONDITIONAL_L
);
588 set_condmod(BRW_CONDITIONAL_NZ
,
589 bld
.AND(bld
.null_reg_d(), dest
, one
));
592 * 0: cmp.l.f0(8) dest:F src0:F 0F
593 * 1: and.nz.f0(8) null:D dest:D 1D
596 * 0: cmp.l.f0(8) dest:F src0:F 0F
600 bblock_t
*block0
= v
->cfg
->blocks
[0];
602 EXPECT_EQ(0, block0
->start_ip
);
603 EXPECT_EQ(1, block0
->end_ip
);
605 EXPECT_TRUE(cmod_propagation(v
));
606 EXPECT_EQ(0, block0
->start_ip
);
607 EXPECT_EQ(0, block0
->end_ip
);
608 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
609 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
610 EXPECT_TRUE(retype(dest
, BRW_REGISTER_TYPE_F
)
611 .equals(instruction(block0
, 0)->dst
));
614 TEST_F(cmod_propagation_test
, andnz_non_one
)
616 const fs_builder
&bld
= v
->bld
;
617 fs_reg dest
= v
->vgrf(glsl_type::int_type
);
618 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
619 fs_reg
zero(brw_imm_f(0.0f
));
620 fs_reg
nonone(brw_imm_d(38));
622 bld
.CMP(retype(dest
, BRW_REGISTER_TYPE_F
), src0
, zero
, BRW_CONDITIONAL_L
);
623 set_condmod(BRW_CONDITIONAL_NZ
,
624 bld
.AND(bld
.null_reg_d(), dest
, nonone
));
627 * 0: cmp.l.f0(8) dest:F src0:F 0F
628 * 1: and.nz.f0(8) null:D dest:D 38D
635 bblock_t
*block0
= v
->cfg
->blocks
[0];
637 EXPECT_EQ(0, block0
->start_ip
);
638 EXPECT_EQ(1, block0
->end_ip
);
640 EXPECT_FALSE(cmod_propagation(v
));
641 EXPECT_EQ(0, block0
->start_ip
);
642 EXPECT_EQ(1, block0
->end_ip
);
643 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
644 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
645 EXPECT_EQ(BRW_OPCODE_AND
, instruction(block0
, 1)->opcode
);
646 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 1)->conditional_mod
);
649 TEST_F(cmod_propagation_test
, cmp_cmpnz
)
651 const fs_builder
&bld
= v
->bld
;
653 fs_reg dst0
= v
->vgrf(glsl_type::float_type
);
654 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
655 fs_reg
zero(brw_imm_f(0));
657 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
658 bld
.CMP(bld
.null_reg_f(), dst0
, zero
, BRW_CONDITIONAL_NZ
);
661 * 0: cmp.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
662 * 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
665 * 0: cmp.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
669 bblock_t
*block0
= v
->cfg
->blocks
[0];
671 EXPECT_TRUE(cmod_propagation(v
));
672 EXPECT_EQ(0, block0
->start_ip
);
673 EXPECT_EQ(0, block0
->end_ip
);
674 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
675 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
678 TEST_F(cmod_propagation_test
, cmp_cmpg
)
680 const fs_builder
&bld
= v
->bld
;
682 fs_reg dst0
= v
->vgrf(glsl_type::float_type
);
683 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
684 fs_reg
zero(brw_imm_f(0));
686 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
687 bld
.CMP(bld
.null_reg_f(), dst0
, zero
, BRW_CONDITIONAL_G
);
690 * 0: cmp.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
691 * 1: cmp.g.f0.0(8) null:F, vgrf0:F, 0f
698 bblock_t
*block0
= v
->cfg
->blocks
[0];
700 EXPECT_FALSE(cmod_propagation(v
));
701 EXPECT_EQ(0, block0
->start_ip
);
702 EXPECT_EQ(1, block0
->end_ip
);
703 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
704 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
705 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
706 EXPECT_EQ(BRW_CONDITIONAL_G
, instruction(block0
, 1)->conditional_mod
);
709 TEST_F(cmod_propagation_test
, plnnz_cmpnz
)
711 const fs_builder
&bld
= v
->bld
;
713 fs_reg dst0
= v
->vgrf(glsl_type::float_type
);
714 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
715 fs_reg
zero(brw_imm_f(0));
717 set_condmod(BRW_CONDITIONAL_NZ
, bld
.PLN(dst0
, src0
, zero
));
718 bld
.CMP(bld
.null_reg_f(), dst0
, zero
, BRW_CONDITIONAL_NZ
);
721 * 0: pln.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
722 * 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
725 * 0: pln.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
729 bblock_t
*block0
= v
->cfg
->blocks
[0];
731 EXPECT_TRUE(cmod_propagation(v
));
732 EXPECT_EQ(0, block0
->start_ip
);
733 EXPECT_EQ(0, block0
->end_ip
);
734 EXPECT_EQ(BRW_OPCODE_PLN
, instruction(block0
, 0)->opcode
);
735 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
738 TEST_F(cmod_propagation_test
, plnnz_cmpz
)
740 const fs_builder
&bld
= v
->bld
;
742 fs_reg dst0
= v
->vgrf(glsl_type::float_type
);
743 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
744 fs_reg
zero(brw_imm_f(0));
746 set_condmod(BRW_CONDITIONAL_NZ
, bld
.PLN(dst0
, src0
, zero
));
747 bld
.CMP(bld
.null_reg_f(), dst0
, zero
, BRW_CONDITIONAL_Z
);
750 * 0: pln.nz.f0.0(8) vgrf0:F, vgrf1:F, 0f
751 * 1: cmp.z.f0.0(8) null:F, vgrf0:F, 0f
754 * 0: pln.z.f0.0(8) vgrf0:F, vgrf1:F, 0f
758 bblock_t
*block0
= v
->cfg
->blocks
[0];
760 EXPECT_TRUE(cmod_propagation(v
));
761 EXPECT_EQ(0, block0
->start_ip
);
762 EXPECT_EQ(0, block0
->end_ip
);
763 EXPECT_EQ(BRW_OPCODE_PLN
, instruction(block0
, 0)->opcode
);
764 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
767 TEST_F(cmod_propagation_test
, plnnz_sel_cmpz
)
769 const fs_builder
&bld
= v
->bld
;
771 fs_reg dst0
= v
->vgrf(glsl_type::float_type
);
772 fs_reg dst1
= v
->vgrf(glsl_type::float_type
);
773 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
774 fs_reg
zero(brw_imm_f(0));
776 set_condmod(BRW_CONDITIONAL_NZ
, bld
.PLN(dst0
, src0
, zero
));
777 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dst1
, src0
, zero
));
778 bld
.CMP(bld
.null_reg_f(), dst0
, zero
, BRW_CONDITIONAL_Z
);
781 * 0: pln.nz.f0.0(8) vgrf0:F, vgrf2:F, 0f
782 * 1: (+f0.0) sel(8) vgrf1:F, vgrf2:F, 0f
783 * 2: cmp.z.f0.0(8) null:F, vgrf0:F, 0f
790 bblock_t
*block0
= v
->cfg
->blocks
[0];
792 EXPECT_FALSE(cmod_propagation(v
));
793 EXPECT_EQ(0, block0
->start_ip
);
794 EXPECT_EQ(2, block0
->end_ip
);
795 EXPECT_EQ(BRW_OPCODE_PLN
, instruction(block0
, 0)->opcode
);
796 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
797 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
798 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
799 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
800 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 2)->conditional_mod
);
803 TEST_F(cmod_propagation_test
, cmp_cmpg_D
)
805 const fs_builder
&bld
= v
->bld
;
807 fs_reg dst0
= v
->vgrf(glsl_type::int_type
);
808 fs_reg src0
= v
->vgrf(glsl_type::int_type
);
809 fs_reg
zero(brw_imm_d(0));
810 fs_reg
one(brw_imm_d(1));
812 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
813 bld
.CMP(bld
.null_reg_d(), dst0
, zero
, BRW_CONDITIONAL_G
);
816 * 0: cmp.nz.f0.0(8) vgrf0:D, vgrf1:D, 0d
817 * 1: cmp.g.f0.0(8) null:D, vgrf0:D, 0d
824 bblock_t
*block0
= v
->cfg
->blocks
[0];
826 EXPECT_FALSE(cmod_propagation(v
));
827 EXPECT_EQ(0, block0
->start_ip
);
828 EXPECT_EQ(1, block0
->end_ip
);
829 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
830 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
831 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
832 EXPECT_EQ(BRW_CONDITIONAL_G
, instruction(block0
, 1)->conditional_mod
);
835 TEST_F(cmod_propagation_test
, cmp_cmpg_UD
)
837 const fs_builder
&bld
= v
->bld
;
839 fs_reg dst0
= v
->vgrf(glsl_type::uint_type
);
840 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
841 fs_reg
zero(brw_imm_ud(0));
843 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
844 bld
.CMP(bld
.null_reg_ud(), dst0
, zero
, BRW_CONDITIONAL_G
);
847 * 0: cmp.nz.f0.0(8) vgrf0:UD, vgrf1:UD, 0u
848 * 1: cmp.g.f0.0(8) null:UD, vgrf0:UD, 0u
851 * 0: cmp.nz.f0.0(8) vgrf0:UD, vgrf1:UD, 0u
855 bblock_t
*block0
= v
->cfg
->blocks
[0];
857 EXPECT_TRUE(cmod_propagation(v
));
858 EXPECT_EQ(0, block0
->start_ip
);
859 EXPECT_EQ(0, block0
->end_ip
);
860 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
861 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
864 TEST_F(cmod_propagation_test
, cmp_cmpl_D
)
866 const fs_builder
&bld
= v
->bld
;
868 fs_reg dst0
= v
->vgrf(glsl_type::int_type
);
869 fs_reg src0
= v
->vgrf(glsl_type::int_type
);
870 fs_reg
zero(brw_imm_d(0));
872 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
873 bld
.CMP(bld
.null_reg_d(), dst0
, zero
, BRW_CONDITIONAL_L
);
876 * 0: cmp.nz.f0.0(8) vgrf0:D, vgrf1:D, 0d
877 * 1: cmp.l.f0.0(8) null:D, vgrf0:D, 0d
880 * 0: cmp.nz.f0.0(8) vgrf0:D, vgrf1:D, 0d
884 bblock_t
*block0
= v
->cfg
->blocks
[0];
886 EXPECT_TRUE(cmod_propagation(v
));
887 EXPECT_EQ(0, block0
->start_ip
);
888 EXPECT_EQ(0, block0
->end_ip
);
889 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
890 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
893 TEST_F(cmod_propagation_test
, cmp_cmpl_UD
)
895 const fs_builder
&bld
= v
->bld
;
897 fs_reg dst0
= v
->vgrf(glsl_type::uint_type
);
898 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
899 fs_reg
zero(brw_imm_ud(0));
901 bld
.CMP(dst0
, src0
, zero
, BRW_CONDITIONAL_NZ
);
902 bld
.CMP(bld
.null_reg_ud(), dst0
, zero
, BRW_CONDITIONAL_L
);
905 * 0: cmp.nz.f0.0(8) vgrf0:UD, vgrf1:UD, 0u
906 * 1: cmp.l.f0.0(8) null:UD, vgrf0:UD, 0u
913 bblock_t
*block0
= v
->cfg
->blocks
[0];
915 EXPECT_FALSE(cmod_propagation(v
));
916 EXPECT_EQ(0, block0
->start_ip
);
917 EXPECT_EQ(1, block0
->end_ip
);
918 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
919 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
920 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
921 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 1)->conditional_mod
);
924 TEST_F(cmod_propagation_test
, andz_one
)
926 const fs_builder
&bld
= v
->bld
;
927 fs_reg dest
= v
->vgrf(glsl_type::int_type
);
928 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
929 fs_reg
zero(brw_imm_f(0.0f
));
930 fs_reg
one(brw_imm_d(1));
932 bld
.CMP(retype(dest
, BRW_REGISTER_TYPE_F
), src0
, zero
, BRW_CONDITIONAL_L
);
933 set_condmod(BRW_CONDITIONAL_Z
,
934 bld
.AND(bld
.null_reg_d(), dest
, one
));
937 * 0: cmp.l.f0(8) dest:F src0:F 0F
938 * 1: and.z.f0(8) null:D dest:D 1D
945 bblock_t
*block0
= v
->cfg
->blocks
[0];
947 EXPECT_EQ(0, block0
->start_ip
);
948 EXPECT_EQ(1, block0
->end_ip
);
950 EXPECT_FALSE(cmod_propagation(v
));
951 EXPECT_EQ(0, block0
->start_ip
);
952 EXPECT_EQ(1, block0
->end_ip
);
953 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 0)->opcode
);
954 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
955 EXPECT_EQ(BRW_OPCODE_AND
, instruction(block0
, 1)->opcode
);
956 EXPECT_EQ(BRW_CONDITIONAL_EQ
, instruction(block0
, 1)->conditional_mod
);
959 TEST_F(cmod_propagation_test
, add_not_merge_with_compare
)
961 const fs_builder
&bld
= v
->bld
;
962 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
963 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
964 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
965 bld
.ADD(dest
, src0
, src1
);
966 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
968 /* The addition and the implicit subtraction in the compare do not compute
972 * 0: add(8) dest:F src0:F src1:F
973 * 1: cmp.l.f0(8) null:F src0:F src1:F
979 bblock_t
*block0
= v
->cfg
->blocks
[0];
981 EXPECT_EQ(0, block0
->start_ip
);
982 EXPECT_EQ(1, block0
->end_ip
);
984 EXPECT_FALSE(cmod_propagation(v
));
985 EXPECT_EQ(0, block0
->start_ip
);
986 EXPECT_EQ(1, block0
->end_ip
);
987 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
988 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
989 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
990 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 1)->conditional_mod
);
993 TEST_F(cmod_propagation_test
, subtract_merge_with_compare
)
995 const fs_builder
&bld
= v
->bld
;
996 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
997 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
998 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
999 bld
.ADD(dest
, src0
, negate(src1
));
1000 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1003 * 0: add(8) dest:F src0:F -src1:F
1004 * 1: cmp.l.f0(8) null:F src0:F src1:F
1007 * 0: add.l.f0(8) dest:F src0:F -src1:F
1010 bblock_t
*block0
= v
->cfg
->blocks
[0];
1012 EXPECT_EQ(0, block0
->start_ip
);
1013 EXPECT_EQ(1, block0
->end_ip
);
1015 EXPECT_TRUE(cmod_propagation(v
));
1016 EXPECT_EQ(0, block0
->start_ip
);
1017 EXPECT_EQ(0, block0
->end_ip
);
1018 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1019 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1022 TEST_F(cmod_propagation_test
, subtract_immediate_merge_with_compare
)
1024 const fs_builder
&bld
= v
->bld
;
1025 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1026 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1027 fs_reg
one(brw_imm_f(1.0f
));
1028 fs_reg
negative_one(brw_imm_f(-1.0f
));
1030 bld
.ADD(dest
, src0
, negative_one
);
1031 bld
.CMP(bld
.null_reg_f(), src0
, one
, BRW_CONDITIONAL_NZ
);
1034 * 0: add(8) dest:F src0:F -1.0f
1035 * 1: cmp.nz.f0(8) null:F src0:F 1.0f
1038 * 0: add.nz.f0(8) dest:F src0:F -1.0f
1041 bblock_t
*block0
= v
->cfg
->blocks
[0];
1043 EXPECT_EQ(0, block0
->start_ip
);
1044 EXPECT_EQ(1, block0
->end_ip
);
1046 EXPECT_TRUE(cmod_propagation(v
));
1047 EXPECT_EQ(0, block0
->start_ip
);
1048 EXPECT_EQ(0, block0
->end_ip
);
1049 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1050 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
1053 TEST_F(cmod_propagation_test
, subtract_merge_with_compare_intervening_add
)
1055 const fs_builder
&bld
= v
->bld
;
1056 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1057 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1058 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1059 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1060 bld
.ADD(dest0
, src0
, negate(src1
));
1061 bld
.ADD(dest1
, src0
, src1
);
1062 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1065 * 0: add(8) dest0:F src0:F -src1:F
1066 * 1: add(8) dest1:F src0:F src1:F
1067 * 2: cmp.l.f0(8) null:F src0:F src1:F
1070 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1071 * 1: add(8) dest1:F src0:F src1:F
1074 bblock_t
*block0
= v
->cfg
->blocks
[0];
1076 EXPECT_EQ(0, block0
->start_ip
);
1077 EXPECT_EQ(2, block0
->end_ip
);
1079 EXPECT_TRUE(cmod_propagation(v
));
1080 EXPECT_EQ(0, block0
->start_ip
);
1081 EXPECT_EQ(1, block0
->end_ip
);
1082 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1083 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1084 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 1)->opcode
);
1085 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 1)->conditional_mod
);
1088 TEST_F(cmod_propagation_test
, subtract_not_merge_with_compare_intervening_partial_write
)
1090 const fs_builder
&bld
= v
->bld
;
1091 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1092 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1093 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1094 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1095 bld
.ADD(dest0
, src0
, negate(src1
));
1096 set_predicate(BRW_PREDICATE_NORMAL
, bld
.ADD(dest1
, src0
, negate(src1
)));
1097 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1100 * 0: add(8) dest0:F src0:F -src1:F
1101 * 1: (+f0) add(8) dest1:F src0:F -src1:F
1102 * 2: cmp.l.f0(8) null:F src0:F src1:F
1108 bblock_t
*block0
= v
->cfg
->blocks
[0];
1110 EXPECT_EQ(0, block0
->start_ip
);
1111 EXPECT_EQ(2, block0
->end_ip
);
1113 EXPECT_FALSE(cmod_propagation(v
));
1114 EXPECT_EQ(0, block0
->start_ip
);
1115 EXPECT_EQ(2, block0
->end_ip
);
1116 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1117 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
1118 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 1)->opcode
);
1119 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 1)->conditional_mod
);
1120 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
1121 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 2)->conditional_mod
);
1124 TEST_F(cmod_propagation_test
, subtract_not_merge_with_compare_intervening_add
)
1126 const fs_builder
&bld
= v
->bld
;
1127 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1128 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1129 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1130 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1131 bld
.ADD(dest0
, src0
, negate(src1
));
1132 set_condmod(BRW_CONDITIONAL_EQ
, bld
.ADD(dest1
, src0
, src1
));
1133 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1136 * 0: add(8) dest0:F src0:F -src1:F
1137 * 1: add.z.f0(8) dest1:F src0:F src1:F
1138 * 2: cmp.l.f0(8) null:F src0:F src1:F
1144 bblock_t
*block0
= v
->cfg
->blocks
[0];
1146 EXPECT_EQ(0, block0
->start_ip
);
1147 EXPECT_EQ(2, block0
->end_ip
);
1149 EXPECT_FALSE(cmod_propagation(v
));
1150 EXPECT_EQ(0, block0
->start_ip
);
1151 EXPECT_EQ(2, block0
->end_ip
);
1152 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1153 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
1154 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 1)->opcode
);
1155 EXPECT_EQ(BRW_CONDITIONAL_EQ
, instruction(block0
, 1)->conditional_mod
);
1156 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 2)->opcode
);
1157 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 2)->conditional_mod
);
1160 TEST_F(cmod_propagation_test
, add_merge_with_compare
)
1162 const fs_builder
&bld
= v
->bld
;
1163 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1164 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1165 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1166 bld
.ADD(dest
, src0
, src1
);
1167 bld
.CMP(bld
.null_reg_f(), src0
, negate(src1
), BRW_CONDITIONAL_L
);
1170 * 0: add(8) dest:F src0:F src1:F
1171 * 1: cmp.l.f0(8) null:F src0:F -src1:F
1174 * 0: add.l.f0(8) dest:F src0:F src1:F
1177 bblock_t
*block0
= v
->cfg
->blocks
[0];
1179 EXPECT_EQ(0, block0
->start_ip
);
1180 EXPECT_EQ(1, block0
->end_ip
);
1182 EXPECT_TRUE(cmod_propagation(v
));
1183 EXPECT_EQ(0, block0
->start_ip
);
1184 EXPECT_EQ(0, block0
->end_ip
);
1185 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1186 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1189 TEST_F(cmod_propagation_test
, negative_subtract_merge_with_compare
)
1191 const fs_builder
&bld
= v
->bld
;
1192 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1193 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1194 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1195 bld
.ADD(dest
, src1
, negate(src0
));
1196 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1198 /* The result of the subtract is the negatiion of the result of the
1199 * implicit subtract in the compare, so the condition must change.
1202 * 0: add(8) dest:F src1:F -src0:F
1203 * 1: cmp.l.f0(8) null:F src0:F src1:F
1206 * 0: add.g.f0(8) dest:F src0:F -src1:F
1209 bblock_t
*block0
= v
->cfg
->blocks
[0];
1211 EXPECT_EQ(0, block0
->start_ip
);
1212 EXPECT_EQ(1, block0
->end_ip
);
1214 EXPECT_TRUE(cmod_propagation(v
));
1215 EXPECT_EQ(0, block0
->start_ip
);
1216 EXPECT_EQ(0, block0
->end_ip
);
1217 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1218 EXPECT_EQ(BRW_CONDITIONAL_G
, instruction(block0
, 0)->conditional_mod
);
1221 TEST_F(cmod_propagation_test
, subtract_delete_compare
)
1223 const fs_builder
&bld
= v
->bld
;
1224 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1225 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1226 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1227 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1228 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
1230 set_condmod(BRW_CONDITIONAL_L
, bld
.ADD(dest
, src0
, negate(src1
)));
1231 set_predicate(BRW_PREDICATE_NORMAL
, bld
.MOV(dest1
, src2
));
1232 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1235 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1236 * 1: (+f0) mov(0) dest1:F src2:F
1237 * 2: cmp.l.f0(8) null:F src0:F src1:F
1240 * 0: add.l.f0(8) dest:F src0:F -src1:F
1241 * 1: (+f0) mov(0) dest1:F src2:F
1244 bblock_t
*block0
= v
->cfg
->blocks
[0];
1246 EXPECT_EQ(0, block0
->start_ip
);
1247 EXPECT_EQ(2, block0
->end_ip
);
1249 EXPECT_TRUE(cmod_propagation(v
));
1250 EXPECT_EQ(0, block0
->start_ip
);
1251 EXPECT_EQ(1, block0
->end_ip
);
1252 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1253 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1254 EXPECT_EQ(BRW_OPCODE_MOV
, instruction(block0
, 1)->opcode
);
1255 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
1258 TEST_F(cmod_propagation_test
, subtract_delete_compare_other_flag
)
1260 /* This test is the same as subtract_delete_compare but it explicitly used
1261 * flag f0.1 for the subtraction and the comparison.
1263 const fs_builder
&bld
= v
->bld
;
1264 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1265 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1266 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1267 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1268 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
1270 set_condmod(BRW_CONDITIONAL_L
, bld
.ADD(dest
, src0
, negate(src1
)))
1272 set_predicate(BRW_PREDICATE_NORMAL
, bld
.MOV(dest1
, src2
));
1273 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
)
1277 * 0: add.l.f0.1(8) dest0:F src0:F -src1:F
1278 * 1: (+f0) mov(0) dest1:F src2:F
1279 * 2: cmp.l.f0.1(8) null:F src0:F src1:F
1282 * 0: add.l.f0.1(8) dest:F src0:F -src1:F
1283 * 1: (+f0) mov(0) dest1:F src2:F
1286 bblock_t
*block0
= v
->cfg
->blocks
[0];
1288 EXPECT_EQ(0, block0
->start_ip
);
1289 EXPECT_EQ(2, block0
->end_ip
);
1291 EXPECT_TRUE(cmod_propagation(v
));
1292 EXPECT_EQ(0, block0
->start_ip
);
1293 EXPECT_EQ(1, block0
->end_ip
);
1294 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1295 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1296 EXPECT_EQ(1, instruction(block0
, 0)->flag_subreg
);
1297 EXPECT_EQ(BRW_OPCODE_MOV
, instruction(block0
, 1)->opcode
);
1298 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
1301 TEST_F(cmod_propagation_test
, subtract_to_mismatch_flag
)
1303 const fs_builder
&bld
= v
->bld
;
1304 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1305 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1306 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1308 set_condmod(BRW_CONDITIONAL_L
, bld
.ADD(dest
, src0
, negate(src1
)));
1309 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
)
1313 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1314 * 1: cmp.l.f0.1(8) null:F src0:F src1:F
1320 bblock_t
*block0
= v
->cfg
->blocks
[0];
1322 EXPECT_EQ(0, block0
->start_ip
);
1323 EXPECT_EQ(1, block0
->end_ip
);
1325 EXPECT_FALSE(cmod_propagation(v
));
1326 EXPECT_EQ(0, block0
->start_ip
);
1327 EXPECT_EQ(1, block0
->end_ip
);
1328 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1329 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1330 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
1331 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
1332 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 1)->conditional_mod
);
1333 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
1336 TEST_F(cmod_propagation_test
,
1337 subtract_merge_with_compare_intervening_mismatch_flag_write
)
1339 const fs_builder
&bld
= v
->bld
;
1340 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1341 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1342 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1344 bld
.ADD(dest0
, src0
, negate(src1
));
1345 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
)
1347 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1350 * 0: add(8) dest0:F src0:F -src1:F
1351 * 1: cmp.l.f0.1(8) null:F src0:F src1:F
1352 * 2: cmp.l.f0(8) null:F src0:F src1:F
1355 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1356 * 1: cmp.l.f0.1(8) null:F src0:F src1:F
1358 * NOTE: Another perfectly valid after sequence would be:
1360 * 0: add.f0.1(8) dest0:F src0:F -src1:F
1361 * 1: cmp.l.f0(8) null:F src0:F src1:F
1363 * However, the optimization pass starts at the end of the basic block.
1364 * Because of this, the cmp.l.f0 will always be chosen. If the pass
1365 * changes its strategy, this test will also need to change.
1368 bblock_t
*block0
= v
->cfg
->blocks
[0];
1370 EXPECT_EQ(0, block0
->start_ip
);
1371 EXPECT_EQ(2, block0
->end_ip
);
1373 EXPECT_TRUE(cmod_propagation(v
));
1374 EXPECT_EQ(0, block0
->start_ip
);
1375 EXPECT_EQ(1, block0
->end_ip
);
1376 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1377 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1378 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
1379 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
1380 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 1)->conditional_mod
);
1381 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
1384 TEST_F(cmod_propagation_test
,
1385 subtract_merge_with_compare_intervening_mismatch_flag_read
)
1387 const fs_builder
&bld
= v
->bld
;
1388 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1389 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1390 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1391 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1392 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
1393 fs_reg
zero(brw_imm_f(0.0f
));
1395 bld
.ADD(dest0
, src0
, negate(src1
));
1396 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
))
1398 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1401 * 0: add(8) dest0:F src0:F -src1:F
1402 * 1: (+f0.1) sel(8) dest1 src2 0.0f
1403 * 2: cmp.l.f0(8) null:F src0:F src1:F
1406 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1407 * 1: (+f0.1) sel(8) dest1 src2 0.0f
1410 bblock_t
*block0
= v
->cfg
->blocks
[0];
1412 EXPECT_EQ(0, block0
->start_ip
);
1413 EXPECT_EQ(2, block0
->end_ip
);
1415 EXPECT_TRUE(cmod_propagation(v
));
1416 EXPECT_EQ(0, block0
->start_ip
);
1417 EXPECT_EQ(1, block0
->end_ip
);
1418 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1419 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1420 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
1421 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
1422 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
1423 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
1426 TEST_F(cmod_propagation_test
, subtract_delete_compare_derp
)
1428 const fs_builder
&bld
= v
->bld
;
1429 fs_reg dest0
= v
->vgrf(glsl_type::float_type
);
1430 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
1431 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1432 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1434 set_condmod(BRW_CONDITIONAL_L
, bld
.ADD(dest0
, src0
, negate(src1
)));
1435 set_predicate(BRW_PREDICATE_NORMAL
, bld
.ADD(dest1
, negate(src0
), src1
));
1436 bld
.CMP(bld
.null_reg_f(), src0
, src1
, BRW_CONDITIONAL_L
);
1439 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1440 * 1: (+f0) add(0) dest1:F -src0:F src1:F
1441 * 2: cmp.l.f0(8) null:F src0:F src1:F
1444 * 0: add.l.f0(8) dest0:F src0:F -src1:F
1445 * 1: (+f0) add(0) dest1:F -src0:F src1:F
1448 bblock_t
*block0
= v
->cfg
->blocks
[0];
1450 EXPECT_EQ(0, block0
->start_ip
);
1451 EXPECT_EQ(2, block0
->end_ip
);
1453 EXPECT_TRUE(cmod_propagation(v
));
1454 EXPECT_EQ(0, block0
->start_ip
);
1455 EXPECT_EQ(1, block0
->end_ip
);
1456 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1457 EXPECT_EQ(BRW_CONDITIONAL_L
, instruction(block0
, 0)->conditional_mod
);
1458 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 1)->opcode
);
1459 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
1462 TEST_F(cmod_propagation_test
, signed_unsigned_comparison_mismatch
)
1464 const fs_builder
&bld
= v
->bld
;
1465 fs_reg dest0
= v
->vgrf(glsl_type::int_type
);
1466 fs_reg src0
= v
->vgrf(glsl_type::int_type
);
1467 src0
.type
= BRW_REGISTER_TYPE_W
;
1469 bld
.ASR(dest0
, negate(src0
), brw_imm_d(15));
1470 bld
.CMP(bld
.null_reg_ud(), retype(dest0
, BRW_REGISTER_TYPE_UD
),
1471 brw_imm_ud(0u), BRW_CONDITIONAL_LE
);
1474 * 0: asr(8) dest:D -src0:W 15D
1475 * 1: cmp.le.f0(8) null:UD dest:UD 0UD
1481 bblock_t
*block0
= v
->cfg
->blocks
[0];
1483 EXPECT_EQ(0, block0
->start_ip
);
1484 EXPECT_EQ(1, block0
->end_ip
);
1486 EXPECT_FALSE(cmod_propagation(v
));
1487 EXPECT_EQ(0, block0
->start_ip
);
1488 EXPECT_EQ(1, block0
->end_ip
);
1489 EXPECT_EQ(BRW_OPCODE_ASR
, instruction(block0
, 0)->opcode
);
1490 EXPECT_EQ(BRW_OPCODE_CMP
, instruction(block0
, 1)->opcode
);
1491 EXPECT_EQ(BRW_CONDITIONAL_LE
, instruction(block0
, 1)->conditional_mod
);
1495 cmod_propagation_test::test_positive_float_saturate_prop(enum brw_conditional_mod before
,
1496 enum brw_conditional_mod after
,
1499 const fs_builder
&bld
= v
->bld
;
1500 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1501 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1502 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1503 fs_reg
zero(brw_imm_f(0.0f
));
1504 bld
.ADD(dest
, src0
, src1
)->saturate
= true;
1506 assert(op
== BRW_OPCODE_CMP
|| op
== BRW_OPCODE_MOV
);
1507 if (op
== BRW_OPCODE_CMP
)
1508 bld
.CMP(bld
.null_reg_f(), dest
, zero
, before
);
1510 bld
.MOV(bld
.null_reg_f(), dest
)->conditional_mod
= before
;
1513 bblock_t
*block0
= v
->cfg
->blocks
[0];
1515 EXPECT_EQ(0, block0
->start_ip
);
1516 EXPECT_EQ(1, block0
->end_ip
);
1518 EXPECT_TRUE(cmod_propagation(v
));
1519 EXPECT_EQ(0, block0
->start_ip
);
1520 EXPECT_EQ(0, block0
->end_ip
);
1521 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1522 EXPECT_TRUE(instruction(block0
, 0)->saturate
);
1523 EXPECT_EQ(after
, instruction(block0
, 0)->conditional_mod
);
1527 cmod_propagation_test::test_negative_float_saturate_prop(enum brw_conditional_mod before
,
1530 const fs_builder
&bld
= v
->bld
;
1531 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
1532 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
1533 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
1534 fs_reg
zero(brw_imm_f(0.0f
));
1535 bld
.ADD(dest
, src0
, src1
)->saturate
= true;
1537 assert(op
== BRW_OPCODE_CMP
|| op
== BRW_OPCODE_MOV
);
1538 if (op
== BRW_OPCODE_CMP
)
1539 bld
.CMP(bld
.null_reg_f(), dest
, zero
, before
);
1541 bld
.MOV(bld
.null_reg_f(), dest
)->conditional_mod
= before
;
1544 bblock_t
*block0
= v
->cfg
->blocks
[0];
1546 EXPECT_EQ(0, block0
->start_ip
);
1547 EXPECT_EQ(1, block0
->end_ip
);
1549 EXPECT_FALSE(cmod_propagation(v
));
1550 EXPECT_EQ(0, block0
->start_ip
);
1551 EXPECT_EQ(1, block0
->end_ip
);
1552 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1553 EXPECT_TRUE(instruction(block0
, 0)->saturate
);
1554 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
1555 EXPECT_EQ(op
, instruction(block0
, 1)->opcode
);
1556 EXPECT_FALSE(instruction(block0
, 1)->saturate
);
1557 EXPECT_EQ(before
, instruction(block0
, 1)->conditional_mod
);
1561 cmod_propagation_test::test_negative_int_saturate_prop(enum brw_conditional_mod before
,
1564 const fs_builder
&bld
= v
->bld
;
1565 fs_reg dest
= v
->vgrf(glsl_type::int_type
);
1566 fs_reg src0
= v
->vgrf(glsl_type::int_type
);
1567 fs_reg src1
= v
->vgrf(glsl_type::int_type
);
1568 fs_reg
zero(brw_imm_d(0));
1569 bld
.ADD(dest
, src0
, src1
)->saturate
= true;
1571 assert(op
== BRW_OPCODE_CMP
|| op
== BRW_OPCODE_MOV
);
1572 if (op
== BRW_OPCODE_CMP
)
1573 bld
.CMP(bld
.null_reg_d(), dest
, zero
, before
);
1575 bld
.MOV(bld
.null_reg_d(), dest
)->conditional_mod
= before
;
1578 bblock_t
*block0
= v
->cfg
->blocks
[0];
1580 EXPECT_EQ(0, block0
->start_ip
);
1581 EXPECT_EQ(1, block0
->end_ip
);
1583 EXPECT_FALSE(cmod_propagation(v
));
1584 EXPECT_EQ(0, block0
->start_ip
);
1585 EXPECT_EQ(1, block0
->end_ip
);
1586 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
1587 EXPECT_TRUE(instruction(block0
, 0)->saturate
);
1588 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
1589 EXPECT_EQ(op
, instruction(block0
, 1)->opcode
);
1590 EXPECT_FALSE(instruction(block0
, 1)->saturate
);
1591 EXPECT_EQ(before
, instruction(block0
, 1)->conditional_mod
);
1594 TEST_F(cmod_propagation_test
, float_saturate_nz_cmp
)
1596 /* With the saturate modifier, the comparison happens before clamping to
1597 * [0, 1]. (sat(x) != 0) == (x > 0).
1601 * 0: add.sat(8) dest src0 src1
1602 * 1: cmp.nz.f0(8) null dest 0.0f
1605 * 0: add.sat.g.f0(8) dest src0 src1
1607 test_positive_float_saturate_prop(BRW_CONDITIONAL_NZ
, BRW_CONDITIONAL_G
,
1611 TEST_F(cmod_propagation_test
, float_saturate_nz_mov
)
1613 /* With the saturate modifier, the comparison happens before clamping to
1614 * [0, 1]. (sat(x) != 0) == (x > 0).
1618 * 0: add.sat(8) dest src0 src1
1619 * 1: mov.nz.f0(8) null dest
1622 * 0: add.sat.g.f0(8) dest src0 src1
1624 test_positive_float_saturate_prop(BRW_CONDITIONAL_NZ
, BRW_CONDITIONAL_G
,
1628 TEST_F(cmod_propagation_test
, float_saturate_z_cmp
)
1630 /* With the saturate modifier, the comparison happens before clamping to
1631 * [0, 1]. (sat(x) == 0) == (x <= 0).
1635 * 0: add.sat(8) dest src0 src1
1636 * 1: cmp.z.f0(8) null dest 0.0f
1639 * 0: add.sat.le.f0(8) dest src0 src1
1641 test_positive_float_saturate_prop(BRW_CONDITIONAL_Z
, BRW_CONDITIONAL_LE
,
1645 TEST_F(cmod_propagation_test
, float_saturate_z_mov
)
1647 /* With the saturate modifier, the comparison happens before clamping to
1648 * [0, 1]. (sat(x) == 0) == (x <= 0).
1652 * 0: add.sat(8) dest src0 src1
1653 * 1: mov.z.f0(8) null dest
1656 * 0: add.sat.le.f0(8) dest src0 src1
1659 /* cmod propagation bails on every MOV except MOV.NZ. */
1660 test_negative_float_saturate_prop(BRW_CONDITIONAL_Z
, BRW_OPCODE_MOV
);
1662 test_positive_float_saturate_prop(BRW_CONDITIONAL_Z
, BRW_CONDITIONAL_LE
,
1667 TEST_F(cmod_propagation_test
, float_saturate_g_cmp
)
1669 /* With the saturate modifier, the comparison happens before clamping to
1670 * [0, 1]. (sat(x) > 0) == (x > 0).
1674 * 0: add.sat(8) dest src0 src1
1675 * 1: cmp.g.f0(8) null dest 0.0f
1678 * 0: add.sat.g.f0(8) dest src0 src1
1680 test_positive_float_saturate_prop(BRW_CONDITIONAL_G
, BRW_CONDITIONAL_G
,
1684 TEST_F(cmod_propagation_test
, float_saturate_g_mov
)
1686 /* With the saturate modifier, the comparison happens before clamping to
1687 * [0, 1]. (sat(x) > 0) == (x > 0).
1691 * 0: add.sat(8) dest src0 src1
1692 * 1: mov.g.f0(8) null dest
1695 * 0: add.sat.g.f0(8) dest src0 src1
1698 /* cmod propagation bails on every MOV except MOV.NZ. */
1699 test_negative_float_saturate_prop(BRW_CONDITIONAL_G
, BRW_OPCODE_MOV
);
1701 test_positive_float_saturate_prop(BRW_CONDITIONAL_G
, BRW_CONDITIONAL_G
,
1706 TEST_F(cmod_propagation_test
, float_saturate_le_cmp
)
1708 /* With the saturate modifier, the comparison happens before clamping to
1709 * [0, 1]. (sat(x) <= 0) == (x <= 0).
1713 * 0: add.sat(8) dest src0 src1
1714 * 1: cmp.le.f0(8) null dest 0.0f
1717 * 0: add.sat.le.f0(8) dest src0 src1
1719 test_positive_float_saturate_prop(BRW_CONDITIONAL_LE
, BRW_CONDITIONAL_LE
,
1723 TEST_F(cmod_propagation_test
, float_saturate_le_mov
)
1725 /* With the saturate modifier, the comparison happens before clamping to
1726 * [0, 1]. (sat(x) <= 0) == (x <= 0).
1730 * 0: add.sat(8) dest src0 src1
1731 * 1: mov.le.f0(8) null dest
1734 * 0: add.sat.le.f0(8) dest src0 src1
1737 /* cmod propagation bails on every MOV except MOV.NZ. */
1738 test_negative_float_saturate_prop(BRW_CONDITIONAL_LE
, BRW_OPCODE_MOV
);
1740 test_positive_float_saturate_prop(BRW_CONDITIONAL_LE
, BRW_CONDITIONAL_LE
,
1745 TEST_F(cmod_propagation_test
, float_saturate_l_cmp
)
1747 /* With the saturate modifier, the comparison happens before clamping to
1748 * [0, 1]. There is no before / after equivalence for (sat(x) < 0).
1752 * 0: add.sat(8) dest src0 src1
1753 * 1: cmp.l.f0(8) null dest 0.0f
1758 test_negative_float_saturate_prop(BRW_CONDITIONAL_L
, BRW_OPCODE_CMP
);
1762 TEST_F(cmod_propagation_test
, float_saturate_l_mov
)
1764 /* With the saturate modifier, the comparison happens before clamping to
1765 * [0, 1]. There is no before / after equivalence for (sat(x) < 0).
1769 * 0: add.sat(8) dest src0 src1
1770 * 1: mov.l.f0(8) null dest 0.0f
1775 test_negative_float_saturate_prop(BRW_CONDITIONAL_L
, BRW_OPCODE_MOV
);
1779 TEST_F(cmod_propagation_test
, float_saturate_ge_cmp
)
1781 /* With the saturate modifier, the comparison happens before clamping to
1782 * [0, 1]. There is no before / after equivalence for (sat(x) >= 0).
1786 * 0: add.sat(8) dest src0 src1
1787 * 1: cmp.ge.f0(8) null dest 0.0f
1792 test_negative_float_saturate_prop(BRW_CONDITIONAL_GE
, BRW_OPCODE_CMP
);
1795 TEST_F(cmod_propagation_test
, float_saturate_ge_mov
)
1797 /* With the saturate modifier, the comparison happens before clamping to
1798 * [0, 1]. There is no before / after equivalence for (sat(x) >= 0).
1802 * 0: add.sat(8) dest src0 src1
1803 * 1: mov.ge.f0(8) null dest 0.0f
1808 test_negative_float_saturate_prop(BRW_CONDITIONAL_GE
, BRW_OPCODE_MOV
);
1811 TEST_F(cmod_propagation_test
, int_saturate_nz_cmp
)
1815 * 0: add.sat(8) dest src0 src1
1816 * 1: cmp.nz.f0(8) null dest 0
1821 test_negative_int_saturate_prop(BRW_CONDITIONAL_NZ
, BRW_OPCODE_CMP
);
1824 TEST_F(cmod_propagation_test
, int_saturate_nz_mov
)
1828 * 0: add.sat(8) dest src0 src1
1829 * 1: mov.nz.f0(8) null dest
1834 test_negative_int_saturate_prop(BRW_CONDITIONAL_NZ
, BRW_OPCODE_MOV
);
1837 TEST_F(cmod_propagation_test
, int_saturate_z_cmp
)
1841 * 0: add.sat(8) dest src0 src1
1842 * 1: cmp.z.f0(8) null dest 0
1847 test_negative_int_saturate_prop(BRW_CONDITIONAL_Z
, BRW_OPCODE_CMP
);
1850 TEST_F(cmod_propagation_test
, int_saturate_z_mov
)
1852 /* With the saturate modifier, the comparison happens before clamping to
1853 * [0, 1]. (sat(x) == 0) == (x <= 0).
1857 * 0: add.sat(8) dest src0 src1
1858 * 1: mov.z.f0(8) null dest
1863 test_negative_int_saturate_prop(BRW_CONDITIONAL_Z
, BRW_OPCODE_MOV
);
1866 TEST_F(cmod_propagation_test
, int_saturate_g_cmp
)
1870 * 0: add.sat(8) dest src0 src1
1871 * 1: cmp.g.f0(8) null dest 0
1876 test_negative_int_saturate_prop(BRW_CONDITIONAL_G
, BRW_OPCODE_CMP
);
1879 TEST_F(cmod_propagation_test
, int_saturate_g_mov
)
1883 * 0: add.sat(8) dest src0 src1
1884 * 1: mov.g.f0(8) null dest
1889 test_negative_int_saturate_prop(BRW_CONDITIONAL_G
, BRW_OPCODE_MOV
);
1892 TEST_F(cmod_propagation_test
, int_saturate_le_cmp
)
1896 * 0: add.sat(8) dest src0 src1
1897 * 1: cmp.le.f0(8) null dest 0
1902 test_negative_int_saturate_prop(BRW_CONDITIONAL_LE
, BRW_OPCODE_CMP
);
1905 TEST_F(cmod_propagation_test
, int_saturate_le_mov
)
1909 * 0: add.sat(8) dest src0 src1
1910 * 1: mov.le.f0(8) null dest
1915 test_negative_int_saturate_prop(BRW_CONDITIONAL_LE
, BRW_OPCODE_MOV
);
1918 TEST_F(cmod_propagation_test
, int_saturate_l_cmp
)
1922 * 0: add.sat(8) dest src0 src1
1923 * 1: cmp.l.f0(8) null dest 0
1928 test_negative_int_saturate_prop(BRW_CONDITIONAL_L
, BRW_OPCODE_CMP
);
1931 TEST_F(cmod_propagation_test
, int_saturate_l_mov
)
1935 * 0: add.sat(8) dest src0 src1
1936 * 1: mov.l.f0(8) null dest 0
1941 test_negative_int_saturate_prop(BRW_CONDITIONAL_L
, BRW_OPCODE_MOV
);
1944 TEST_F(cmod_propagation_test
, int_saturate_ge_cmp
)
1948 * 0: add.sat(8) dest src0 src1
1949 * 1: cmp.ge.f0(8) null dest 0
1954 test_negative_int_saturate_prop(BRW_CONDITIONAL_GE
, BRW_OPCODE_CMP
);
1957 TEST_F(cmod_propagation_test
, int_saturate_ge_mov
)
1961 * 0: add.sat(8) dest src0 src1
1962 * 1: mov.ge.f0(8) null dest
1967 test_negative_int_saturate_prop(BRW_CONDITIONAL_GE
, BRW_OPCODE_MOV
);
1970 TEST_F(cmod_propagation_test
, not_to_or
)
1972 /* Exercise propagation of conditional modifier from a NOT instruction to
1973 * another ALU instruction as performed by cmod_propagate_not.
1975 const fs_builder
&bld
= v
->bld
;
1976 fs_reg dest
= v
->vgrf(glsl_type::uint_type
);
1977 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
1978 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
1979 bld
.OR(dest
, src0
, src1
);
1980 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest
));
1984 * 0: or(8) dest src0 src1
1985 * 1: not.nz.f0(8) null dest
1988 * 0: or.z.f0(8) dest src0 src1
1992 bblock_t
*block0
= v
->cfg
->blocks
[0];
1994 EXPECT_EQ(0, block0
->start_ip
);
1995 EXPECT_EQ(1, block0
->end_ip
);
1997 EXPECT_TRUE(cmod_propagation(v
));
1998 EXPECT_EQ(0, block0
->start_ip
);
1999 EXPECT_EQ(0, block0
->end_ip
);
2000 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2001 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2004 TEST_F(cmod_propagation_test
, not_to_and
)
2006 /* Exercise propagation of conditional modifier from a NOT instruction to
2007 * another ALU instruction as performed by cmod_propagate_not.
2009 const fs_builder
&bld
= v
->bld
;
2010 fs_reg dest
= v
->vgrf(glsl_type::uint_type
);
2011 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2012 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2013 bld
.AND(dest
, src0
, src1
);
2014 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest
));
2018 * 0: and(8) dest src0 src1
2019 * 1: not.nz.f0(8) null dest
2022 * 0: and.z.f0(8) dest src0 src1
2026 bblock_t
*block0
= v
->cfg
->blocks
[0];
2028 EXPECT_EQ(0, block0
->start_ip
);
2029 EXPECT_EQ(1, block0
->end_ip
);
2031 EXPECT_TRUE(cmod_propagation(v
));
2032 EXPECT_EQ(0, block0
->start_ip
);
2033 EXPECT_EQ(0, block0
->end_ip
);
2034 EXPECT_EQ(BRW_OPCODE_AND
, instruction(block0
, 0)->opcode
);
2035 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2038 TEST_F(cmod_propagation_test
, not_to_uadd
)
2040 /* Exercise propagation of conditional modifier from a NOT instruction to
2041 * another ALU instruction as performed by cmod_propagate_not.
2043 * The optimization pass currently restricts to just OR and AND. It's
2044 * possible that this is too restrictive, and the actual, necessary
2045 * restriction is just the the destination type of the ALU instruction is
2046 * the same as the source type of the NOT instruction.
2048 const fs_builder
&bld
= v
->bld
;
2049 fs_reg dest
= v
->vgrf(glsl_type::uint_type
);
2050 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2051 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2052 bld
.ADD(dest
, src0
, src1
);
2053 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest
));
2057 * 0: add(8) dest src0 src1
2058 * 1: not.nz.f0(8) null dest
2065 bblock_t
*block0
= v
->cfg
->blocks
[0];
2067 EXPECT_EQ(0, block0
->start_ip
);
2068 EXPECT_EQ(1, block0
->end_ip
);
2070 EXPECT_FALSE(cmod_propagation(v
));
2071 EXPECT_EQ(0, block0
->start_ip
);
2072 EXPECT_EQ(1, block0
->end_ip
);
2073 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
2074 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
2075 EXPECT_EQ(BRW_OPCODE_NOT
, instruction(block0
, 1)->opcode
);
2076 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 1)->conditional_mod
);
2079 TEST_F(cmod_propagation_test
, not_to_fadd_to_ud
)
2081 /* Exercise propagation of conditional modifier from a NOT instruction to
2082 * another ALU instruction as performed by cmod_propagate_not.
2084 * The optimization pass currently restricts to just OR and AND. It's
2085 * possible that this is too restrictive, and the actual, necessary
2086 * restriction is just the the destination type of the ALU instruction is
2087 * the same as the source type of the NOT instruction.
2089 const fs_builder
&bld
= v
->bld
;
2090 fs_reg dest
= v
->vgrf(glsl_type::uint_type
);
2091 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
2092 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
2093 bld
.ADD(dest
, src0
, src1
);
2094 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest
));
2098 * 0: add(8) dest.ud src0.f src1.f
2099 * 1: not.nz.f0(8) null dest.ud
2106 bblock_t
*block0
= v
->cfg
->blocks
[0];
2108 EXPECT_EQ(0, block0
->start_ip
);
2109 EXPECT_EQ(1, block0
->end_ip
);
2111 EXPECT_FALSE(cmod_propagation(v
));
2112 EXPECT_EQ(0, block0
->start_ip
);
2113 EXPECT_EQ(1, block0
->end_ip
);
2114 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
2115 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
2116 EXPECT_EQ(BRW_OPCODE_NOT
, instruction(block0
, 1)->opcode
);
2117 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 1)->conditional_mod
);
2120 TEST_F(cmod_propagation_test
, not_to_fadd
)
2122 /* Exercise propagation of conditional modifier from a NOT instruction to
2123 * another ALU instruction as performed by cmod_propagate_not.
2125 * The optimization pass currently restricts to just OR and AND. It's
2126 * possible that this is too restrictive, and the actual, necessary
2127 * restriction is just the the destination type of the ALU instruction is
2128 * the same as the source type of the NOT instruction.
2130 const fs_builder
&bld
= v
->bld
;
2131 fs_reg dest
= v
->vgrf(glsl_type::float_type
);
2132 fs_reg src0
= v
->vgrf(glsl_type::float_type
);
2133 fs_reg src1
= v
->vgrf(glsl_type::float_type
);
2134 bld
.ADD(dest
, src0
, src1
);
2135 set_condmod(BRW_CONDITIONAL_NZ
,
2136 bld
.NOT(bld
.null_reg_ud(),
2137 retype(dest
, BRW_REGISTER_TYPE_UD
)));
2141 * 0: add(8) dest.f src0.f src1.f
2142 * 1: not.nz.f0(8) null dest.ud
2149 bblock_t
*block0
= v
->cfg
->blocks
[0];
2151 EXPECT_EQ(0, block0
->start_ip
);
2152 EXPECT_EQ(1, block0
->end_ip
);
2154 EXPECT_FALSE(cmod_propagation(v
));
2155 EXPECT_EQ(0, block0
->start_ip
);
2156 EXPECT_EQ(1, block0
->end_ip
);
2157 EXPECT_EQ(BRW_OPCODE_ADD
, instruction(block0
, 0)->opcode
);
2158 EXPECT_EQ(BRW_CONDITIONAL_NONE
, instruction(block0
, 0)->conditional_mod
);
2159 EXPECT_EQ(BRW_OPCODE_NOT
, instruction(block0
, 1)->opcode
);
2160 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 1)->conditional_mod
);
2163 TEST_F(cmod_propagation_test
, not_to_or_intervening_flag_read_compatible_value
)
2165 /* Exercise propagation of conditional modifier from a NOT instruction to
2166 * another ALU instruction as performed by cmod_propagate_not.
2168 const fs_builder
&bld
= v
->bld
;
2169 fs_reg dest0
= v
->vgrf(glsl_type::uint_type
);
2170 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
2171 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2172 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2173 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
2174 fs_reg
zero(brw_imm_f(0.0f
));
2175 set_condmod(BRW_CONDITIONAL_Z
, bld
.OR(dest0
, src0
, src1
));
2176 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
));
2177 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest0
));
2181 * 0: or.z.f0(8) dest0 src0 src1
2182 * 1: (+f0) sel(8) dest1 src2 0.0f
2183 * 2: not.nz.f0(8) null dest0
2186 * 0: or.z.f0(8) dest0 src0 src1
2187 * 1: (+f0) sel(8) dest1 src2 0.0f
2191 bblock_t
*block0
= v
->cfg
->blocks
[0];
2193 EXPECT_EQ(0, block0
->start_ip
);
2194 EXPECT_EQ(2, block0
->end_ip
);
2196 EXPECT_TRUE(cmod_propagation(v
));
2197 EXPECT_EQ(0, block0
->start_ip
);
2198 EXPECT_EQ(1, block0
->end_ip
);
2199 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2200 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2201 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
2202 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
2205 TEST_F(cmod_propagation_test
,
2206 not_to_or_intervening_flag_read_compatible_value_mismatch_flag
)
2208 /* Exercise propagation of conditional modifier from a NOT instruction to
2209 * another ALU instruction as performed by cmod_propagate_not.
2211 const fs_builder
&bld
= v
->bld
;
2212 fs_reg dest0
= v
->vgrf(glsl_type::uint_type
);
2213 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
2214 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2215 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2216 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
2217 fs_reg
zero(brw_imm_f(0.0f
));
2218 set_condmod(BRW_CONDITIONAL_Z
, bld
.OR(dest0
, src0
, src1
))
2220 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
));
2221 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest0
));
2225 * 0: or.z.f0.1(8) dest0 src0 src1
2226 * 1: (+f0) sel(8) dest1 src2 0.0f
2227 * 2: not.nz.f0(8) null dest0
2234 bblock_t
*block0
= v
->cfg
->blocks
[0];
2236 EXPECT_EQ(0, block0
->start_ip
);
2237 EXPECT_EQ(2, block0
->end_ip
);
2239 EXPECT_FALSE(cmod_propagation(v
));
2240 EXPECT_EQ(0, block0
->start_ip
);
2241 EXPECT_EQ(2, block0
->end_ip
);
2242 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2243 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2244 EXPECT_EQ(1, instruction(block0
, 0)->flag_subreg
);
2245 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
2246 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
2247 EXPECT_EQ(BRW_OPCODE_NOT
, instruction(block0
, 2)->opcode
);
2248 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 2)->conditional_mod
);
2249 EXPECT_EQ(0, instruction(block0
, 2)->flag_subreg
);
2252 TEST_F(cmod_propagation_test
, not_to_or_intervening_flag_read_incompatible_value
)
2254 /* Exercise propagation of conditional modifier from a NOT instruction to
2255 * another ALU instruction as performed by cmod_propagate_not.
2257 const fs_builder
&bld
= v
->bld
;
2258 fs_reg dest0
= v
->vgrf(glsl_type::uint_type
);
2259 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
2260 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2261 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2262 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
2263 fs_reg
zero(brw_imm_f(0.0f
));
2264 set_condmod(BRW_CONDITIONAL_NZ
, bld
.OR(dest0
, src0
, src1
));
2265 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
));
2266 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest0
));
2270 * 0: or.nz.f0(8) dest0 src0 src1
2271 * 1: (+f0) sel(8) dest1 src2 0.0f
2272 * 2: not.nz.f0(8) null dest0
2279 bblock_t
*block0
= v
->cfg
->blocks
[0];
2281 EXPECT_EQ(0, block0
->start_ip
);
2282 EXPECT_EQ(2, block0
->end_ip
);
2284 EXPECT_FALSE(cmod_propagation(v
));
2285 EXPECT_EQ(0, block0
->start_ip
);
2286 EXPECT_EQ(2, block0
->end_ip
);
2287 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2288 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 0)->conditional_mod
);
2289 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
2290 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
2291 EXPECT_EQ(BRW_OPCODE_NOT
, instruction(block0
, 2)->opcode
);
2292 EXPECT_EQ(BRW_CONDITIONAL_NZ
, instruction(block0
, 2)->conditional_mod
);
2295 TEST_F(cmod_propagation_test
, not_to_or_intervening_mismatch_flag_write
)
2297 /* Exercise propagation of conditional modifier from a NOT instruction to
2298 * another ALU instruction as performed by cmod_propagate_not.
2300 const fs_builder
&bld
= v
->bld
;
2301 fs_reg dest0
= v
->vgrf(glsl_type::uint_type
);
2302 fs_reg dest1
= v
->vgrf(glsl_type::uint_type
);
2303 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2304 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2306 bld
.OR(dest0
, src0
, src1
);
2307 set_condmod(BRW_CONDITIONAL_Z
, bld
.OR(dest1
, src0
, src1
))
2309 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest0
));
2313 * 0: or(8) dest0 src0 src1
2314 * 1: or.z.f0.1(8) dest1 src0 src1
2315 * 2: not.nz.f0(8) null dest0
2318 * 0: or.z.f0(8) dest0 src0 src1
2319 * 1: or.z.f0.1(8) dest1 src0 src1
2323 bblock_t
*block0
= v
->cfg
->blocks
[0];
2325 EXPECT_EQ(0, block0
->start_ip
);
2326 EXPECT_EQ(2, block0
->end_ip
);
2328 EXPECT_TRUE(cmod_propagation(v
));
2329 EXPECT_EQ(0, block0
->start_ip
);
2330 EXPECT_EQ(1, block0
->end_ip
);
2331 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2332 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2333 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
2334 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 1)->opcode
);
2335 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 1)->conditional_mod
);
2336 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);
2339 TEST_F(cmod_propagation_test
, not_to_or_intervening_mismatch_flag_read
)
2341 /* Exercise propagation of conditional modifier from a NOT instruction to
2342 * another ALU instruction as performed by cmod_propagate_not.
2344 const fs_builder
&bld
= v
->bld
;
2345 fs_reg dest0
= v
->vgrf(glsl_type::uint_type
);
2346 fs_reg dest1
= v
->vgrf(glsl_type::float_type
);
2347 fs_reg src0
= v
->vgrf(glsl_type::uint_type
);
2348 fs_reg src1
= v
->vgrf(glsl_type::uint_type
);
2349 fs_reg src2
= v
->vgrf(glsl_type::float_type
);
2350 fs_reg
zero(brw_imm_f(0.0f
));
2352 bld
.OR(dest0
, src0
, src1
);
2353 set_predicate(BRW_PREDICATE_NORMAL
, bld
.SEL(dest1
, src2
, zero
))
2355 set_condmod(BRW_CONDITIONAL_NZ
, bld
.NOT(bld
.null_reg_ud(), dest0
));
2359 * 0: or(8) dest0 src0 src1
2360 * 1: (+f0.1) sel(8) dest1 src2 0.0f
2361 * 2: not.nz.f0(8) null dest0
2364 * 0: or.z.f0(8) dest0 src0 src1
2365 * 1: (+f0.1) sel(8) dest1 src2 0.0f
2369 bblock_t
*block0
= v
->cfg
->blocks
[0];
2371 EXPECT_EQ(0, block0
->start_ip
);
2372 EXPECT_EQ(2, block0
->end_ip
);
2374 EXPECT_TRUE(cmod_propagation(v
));
2375 EXPECT_EQ(0, block0
->start_ip
);
2376 EXPECT_EQ(1, block0
->end_ip
);
2377 EXPECT_EQ(BRW_OPCODE_OR
, instruction(block0
, 0)->opcode
);
2378 EXPECT_EQ(BRW_CONDITIONAL_Z
, instruction(block0
, 0)->conditional_mod
);
2379 EXPECT_EQ(0, instruction(block0
, 0)->flag_subreg
);
2380 EXPECT_EQ(BRW_OPCODE_SEL
, instruction(block0
, 1)->opcode
);
2381 EXPECT_EQ(BRW_PREDICATE_NORMAL
, instruction(block0
, 1)->predicate
);
2382 EXPECT_EQ(1, instruction(block0
, 1)->flag_subreg
);