src/intel/isl/isl_emit_depth_stencil.c

   1 /*
   2  * Copyright 2016 Intel Corporation
   3  *
   4  *  Permission is hereby granted, free of charge, to any person obtaining a
   5  *  copy of this software and associated documentation files (the "Software"),
   6  *  to deal in the Software without restriction, including without limitation
   7  *  the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  *  and/or sell copies of the Software, and to permit persons to whom the
   9  *  Software is furnished to do so, subject to the following conditions:
  10  *
  11  *  The above copyright notice and this permission notice (including the next
  12  *  paragraph) shall be included in all copies or substantial portions of the
  13  *  Software.
  14  *
  15  *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  *  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  *  IN THE SOFTWARE.
  22  */
  23
  24 #include <stdint.h>
  25
  26 #define __gen_address_type uint64_t
  27 #define __gen_user_data void
  28
  29 static inline uint64_t
  30 __gen_combine_address(void *data, void *loc, uint64_t addr, uint32_t delta)
  31 {
  32    return addr + delta;
  33 }
  34
  35 #include "genxml/gen_macros.h"
  36 #include "genxml/genX_pack.h"
  37
  38 #include "isl_priv.h"
  39
  40 #define __PASTE2(x, y) x ## y
  41 #define __PASTE(x, y) __PASTE2(x, y)
  42 #define isl_genX(x) __PASTE(isl_, genX(x))
  43
  44 static const uint32_t isl_to_gen_ds_surftype [] = {
  45 #if GEN_GEN >= 9
  46    /* From the SKL PRM, "3DSTATE_DEPTH_STENCIL::SurfaceType":
  47     *
  48     *    "If depth/stencil is enabled with 1D render target, depth/stencil
  49     *    surface type needs to be set to 2D surface type and height set to 1.
  50     *    Depth will use (legacy) TileY and stencil will use TileW. For this
  51     *    case only, the Surface Type of the depth buffer can be 2D while the
  52     *    Surface Type of the render target(s) are 1D, representing an
  53     *    exception to a programming note above.
  54     */
  55    [ISL_SURF_DIM_1D] = SURFTYPE_2D,
  56 #else
  57    [ISL_SURF_DIM_1D] = SURFTYPE_1D,
  58 #endif
  59    [ISL_SURF_DIM_2D] = SURFTYPE_2D,
  60    [ISL_SURF_DIM_3D] = SURFTYPE_3D,
  61 };
  62
  63 void
  64 isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
  65                                    const struct isl_depth_stencil_hiz_emit_info *restrict info)
  66 {
  67    struct GENX(3DSTATE_DEPTH_BUFFER) db = {
  68       GENX(3DSTATE_DEPTH_BUFFER_header),
  69    };
  70
  71    if (info->depth_surf) {
  72       db.SurfaceType = isl_to_gen_ds_surftype[info->depth_surf->dim];
  73       db.SurfaceFormat = isl_surf_get_depth_format(dev, info->depth_surf);
  74       db.Width = info->depth_surf->logical_level0_px.width - 1;
  75       db.Height = info->depth_surf->logical_level0_px.height - 1;
  76    } else if (info->stencil_surf) {
  77       db.SurfaceType = isl_to_gen_ds_surftype[info->stencil_surf->dim];
  78       db.SurfaceFormat = D32_FLOAT;
  79       db.Width = info->stencil_surf->logical_level0_px.width - 1;
  80       db.Height = info->stencil_surf->logical_level0_px.height - 1;
  81    } else {
  82       db.SurfaceType = SURFTYPE_NULL;
  83       db.SurfaceFormat = D32_FLOAT;
  84    }
  85
  86    if (info->depth_surf || info->stencil_surf) {
  87       /* These are based entirely on the view */
  88       db.Depth = db.RenderTargetViewExtent = info->view->array_len - 1;
  89       db.LOD                  = info->view->base_level;
  90       db.MinimumArrayElement  = info->view->base_array_layer;
  91    }
  92
  93    if (info->depth_surf) {
  94 #if GEN_GEN >= 7
  95       db.DepthWriteEnable = true;
  96 #endif
  97       db.SurfaceBaseAddress = info->depth_address;
  98 #if GEN_GEN >= 6
  99       db.DepthBufferMOCS = info->mocs;
 100 #endif
 101
 102 #if GEN_GEN <= 6
 103       db.TiledSurface = info->depth_surf->tiling != ISL_TILING_LINEAR;
 104       db.TileWalk = info->depth_surf->tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR :
 105                                                                 TILEWALK_XMAJOR;
 106       db.MIPMapLayoutMode = MIPLAYOUT_BELOW;
 107 #endif
 108
 109       db.SurfacePitch = info->depth_surf->row_pitch - 1;
 110 #if GEN_GEN >= 8
 111       db.SurfaceQPitch =
 112          isl_surf_get_array_pitch_el_rows(info->depth_surf) >> 2;
 113 #endif
 114    }
 115
 116 #if GEN_GEN >= 6
 117    struct GENX(3DSTATE_STENCIL_BUFFER) sb = {
 118       GENX(3DSTATE_STENCIL_BUFFER_header),
 119    };
 120 #else
 121 #  define sb db
 122 #endif
 123
 124    if (info->stencil_surf) {
 125 #if GEN_GEN >= 7
 126       db.StencilWriteEnable = true;
 127 #endif
 128 #if GEN_GEN >= 8 || GEN_IS_HASWELL
 129       sb.StencilBufferEnable = true;
 130 #endif
 131       sb.SurfaceBaseAddress = info->stencil_address;
 132 #if GEN_GEN >= 6
 133       sb.StencilBufferMOCS = info->mocs;
 134 #endif
 135       sb.SurfacePitch = info->stencil_surf->row_pitch - 1;
 136 #if GEN_GEN >= 8
 137       sb.SurfaceQPitch =
 138          isl_surf_get_array_pitch_el_rows(info->stencil_surf) >> 2;
 139 #endif
 140    }
 141
 142 #if GEN_GEN >= 6
 143    struct GENX(3DSTATE_HIER_DEPTH_BUFFER) hiz = {
 144       GENX(3DSTATE_HIER_DEPTH_BUFFER_header),
 145    };
 146    struct GENX(3DSTATE_CLEAR_PARAMS) clear = {
 147       GENX(3DSTATE_CLEAR_PARAMS_header),
 148    };
 149
 150    assert(info->hiz_usage == ISL_AUX_USAGE_NONE ||
 151           info->hiz_usage == ISL_AUX_USAGE_HIZ);
 152    if (info->hiz_usage == ISL_AUX_USAGE_HIZ) {
 153       db.HierarchicalDepthBufferEnable = true;
 154 #if GEN_GEN == 5 || GEN_GEN == 6
 155       db.SeparateStencilBufferEnable = true;
 156 #endif
 157
 158       hiz.SurfaceBaseAddress = info->hiz_address;
 159       hiz.HierarchicalDepthBufferMOCS = info->mocs;
 160       hiz.SurfacePitch = info->hiz_surf->row_pitch - 1;
 161 #if GEN_GEN >= 8
 162       /* From the SKL PRM Vol2a:
 163        *
 164        *    The interpretation of this field is dependent on Surface Type
 165        *    as follows:
 166        *    - SURFTYPE_1D: distance in pixels between array slices
 167        *    - SURFTYPE_2D/CUBE: distance in rows between array slices
 168        *    - SURFTYPE_3D: distance in rows between R - slices
 169        *
 170        * Unfortunately, the docs aren't 100% accurate here.  They fail to
 171        * mention that the 1-D rule only applies to linear 1-D images.
 172        * Since depth and HiZ buffers are always tiled, they are treated as
 173        * 2-D images.  Prior to Sky Lake, this field is always in rows.
 174        */
 175       hiz.SurfaceQPitch =
 176          isl_surf_get_array_pitch_sa_rows(info->hiz_surf) >> 2;
 177 #endif
 178
 179       clear.DepthClearValueValid = true;
 180       clear.DepthClearValue = info->depth_clear_value;
 181    }
 182 #endif /* GEN_GEN >= 6 */
 183
 184    /* Pack everything into the batch */
 185    uint32_t *dw = batch;
 186    GENX(3DSTATE_DEPTH_BUFFER_pack)(NULL, dw, &db);
 187    dw += GENX(3DSTATE_DEPTH_BUFFER_length);
 188
 189 #if GEN_GEN >= 6
 190    GENX(3DSTATE_STENCIL_BUFFER_pack)(NULL, dw, &sb);
 191    dw += GENX(3DSTATE_STENCIL_BUFFER_length);
 192
 193    GENX(3DSTATE_HIER_DEPTH_BUFFER_pack)(NULL, dw, &hiz);
 194    dw += GENX(3DSTATE_HIER_DEPTH_BUFFER_length);
 195
 196    GENX(3DSTATE_CLEAR_PARAMS_pack)(NULL, dw, &clear);
 197    dw += GENX(3DSTATE_CLEAR_PARAMS_length);
 198 #endif
 199 }